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[executorch][cuda] Run transposed convolutions on the implicit-GEMM template - #25091

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@Gasoonjia Gasoonjia commented Nov 14, 2026 •

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Stack from ghstack (oldest at bottom):

Inductor has no transposed-convolution template on CUDA. The backend rewrites conv_transpose1d and conv_transpose2d as convolutions, but aten.convolution with transposed=True (from to_edge) and conv_transpose3d failed to lower.

A transposed convolution is the same GEMM over its output pixels: output index o reads, at tap k, input (o + padding_before - k) / stride when that is an integer inside the input, and the [C_in, C_out, ...] weight is read with its first two strides swapped. One constexpr adds this gather to the implicit-GEMM kernel (with pixel tiles the image base is a scalar, so the gather adds it without indexing it, which Triton 3.9 rejects); schedules, configs, store and output layouts are shared. supports() takes dense transposed 1-D, 2-D and 3-D calls with any stride, output_padding and crop, including the asymmetric crop only the canonical op expresses. The router takes them only where the regular lowering cannot compile them, and worth_routing refuses them otherwise. The benchmark's shapes suite gains transposed 1-D upsampling (kernel 4, stride 2), timed against the backend's rewrite.

test_conv_implicit_gemm.py runs every schedule on transposed geometries (stride, output_padding, asymmetric crop, tap-major K order) in every dtype and input layout, and lowers transposed 1-D and 3-D convolutions through both APIs against eager. test_conv_routing.py checks transposed 1-D, 2-D and 3-D routing and keeps dilated and grouped ones.

This diff was authored with Claude Code.

Differential Revision: D129825956

NOTE FOR REVIEWERS: This PR has internal Meta-specific changes or comments, please review them on Phabricator!

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🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/25091

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👉 Rebase onto the `viable/strict` branch to avoid these failures

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Pull Request resolved: #25091

Inductor has no transposed-convolution template on CUDA. The backend rewrites `conv_transpose1d` and `conv_transpose2d` as convolutions, but `aten.convolution` with `transposed=True` (from `to_edge`) and `conv_transpose3d` failed to lower.

A transposed convolution is the same GEMM over its output pixels: output index `o` reads, at tap `k`, input `(o + padding_before - k) / stride` when that is an integer inside the input, and the `[C_in, C_out, ...]` weight is read with its first two strides swapped. One constexpr adds this gather to the implicit-GEMM kernel (with pixel tiles the image base is a scalar, so the gather adds it without indexing it, which Triton 3.9 rejects); schedules, configs, store and output layouts are shared. `supports()` takes dense transposed 1-D, 2-D and 3-D calls with any stride, output_padding and crop, including the asymmetric crop only the canonical op expresses. The router takes them only where the regular lowering cannot compile them, and `worth_routing` refuses them otherwise. The benchmark's `shapes` suite gains transposed 1-D upsampling (kernel 4, stride 2), timed against the backend's rewrite.

`test_conv_implicit_gemm.py` runs every schedule on transposed geometries (stride, output_padding, asymmetric crop, tap-major K order) in every dtype and input layout, and lowers transposed 1-D and 3-D convolutions through both APIs against eager. `test_conv_routing.py` checks transposed 1-D, 2-D and 3-D routing and keeps dilated and grouped ones.

This diff was authored with Claude Code.

Differential Revision: [D129825956](https://our.internmc.facebook.com/intern/diff/D129825956/)

**NOTE FOR REVIEWERS**: This PR has internal Meta-specific changes or comments, please review them on [Phabricator](https://our.internmc.facebook.com/intern/diff/D129825956/)!
ghstack-source-id: 474250251
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Gasoonjia deployed to upload-benchmark-results November 15, 2026 15:03 — with GitHub Actions Active

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