[Gasoonjia]

Stack from ghstack (oldest at bottom):

• [executorch][cuda] Run transposed convolutions on the implicit-GEMM template #25091
• [executorch][cuda] Test 3-D convolutions on the implicit-GEMM template #25090
• [executorch][cuda] Run 1-D convolutions on the implicit-GEMM template #25089
• [executorch][cuda] Converted convolutions follow the output layout the graph recorded #25088
• [executorch][cuda] Route 3-input-channel window and kernel-equals-stride convolutions to the implicit-GEMM template #25087
• [executorch][cuda] Add an implicit-GEMM template for dense triton::convolution #25086
• -> [executorch][cuda] Route 2-D depthwise and few-channel grouped convolutions to a Triton direct-stencil kernel #25085
• [executorch][cuda] Add triton::convolution and the conv routing framework #25084
• [executorch][cuda] Add planned replacement to the Triton replacement pass #25083
• [executorch][cuda] Deprecate triton_kernel_mode=OFF #25082

Inductor's Triton conv template is two to three orders of magnitude slower than a direct stencil on depthwise convolutions, and up to twenty times slower on grouped convolutions with few channels per group.

This diff adds the first triton::convolution template: a direct stencil for 2-D depthwise convolutions and grouped convolutions with up to 8 input channels per group and any channel multiplier, with dilation 1 and kernels up to 9x9, in fp32, fp16 or bf16, with NCHW- or channels-last-ordered inputs, an optional bias and asymmetric padding. Five schedules are timed at compile time: dw_flat, the portable base; dw_row8, a register sliding window for channel-contiguous inputs; dw_mult, all output channels of an input channel per load, for multipliers up to 16; grp_plane, one output channel per program with shared weights; and grp_reduce, a parallel reduction over taps for few outputs. The router takes a call only inside the range benchmarks/conv/benchmark_depthwise.py measures as faster than Inductor; grouped convolutions whose per-group matrix product suits Inductor's tensor-core template stay there. The CUDA workflow adds a small depthwise_conv model, which .ci/scripts/test_cuda_clean_runtime.sh runs with only the prebuilt runner and checks against eager.

Tests run every schedule against an FP64 reference, including a multiplier above dw_mult's bound, lower depthwise and grouped blocks with both lowering APIs, and cover routed and kept calls.

This diff was authored with Claude Code.

Differential Revision: D129596197

NOTE FOR REVIEWERS: This PR has internal Meta-specific changes or comments, please review them on Phabricator!

[pytorch-bot]

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❌ 1 New Failure, 1 Pending, 1 Unrelated Failure

As of commit cfc5893 with merge base dea39f0 ():

NEW FAILURE - The following job has failed:

• Test CUDA Builds / test-model-cuda-e2e-gemma-4-31B-it-GGUF-quantized-int4-tile-packed / linux-job (gh)
  RuntimeError: Command bash /__w/_temp/exec_script failed with exit code 1

BROKEN TRUNK - The following job failed but were present on the merge base:

👉 Rebase onto the `viable/strict` branch to avoid these failures

• Test ROCm AOTI / test-voxtral-realtime-rocm-gfx950-rocm7.2 / linux-job (gh) (trunk failure)
  ##[error]The operation was canceled.

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