deep-learning-hardware

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fatemekhasraji / FashionMnist_LeNet5

SystemVerilog FPGA acceleration of LeNet-5 CNN for Fashion-MNIST classification, powered by a 5x5 2D Torus Systolic Array with bit-exact Python simulator, and out-of-context Vivado synthesis benchmarks.

fpga matrix-multiplication vivado systemverilog fashion-mnist cnn-accelerator deep-learning-hardware lenet5-cnn systoli

Updated Jul 29, 2026
SystemVerilog

ridash2005 / Bit-Serial_Neural_Computation_Engine

Star

High-efficiency, resource-optimized Neural Network Computation Engine in SystemVerilog. Leverages bit-serial arithmetic to minimize hardware footprint (LUTs/Registers) without compromising precision. 🏆 Gold Winner @ VLSI Hackathon, NIT Jamshedpur.

fpga systemverilog computer-architecture vlsi hardware-acceleration axi-stream edge-ai rtl-design neural-network-accelerator deep-learning-hardware hackathon-winner-project asic-design-fpga-ai-ml-low-power

Updated May 14, 2026
SystemVerilog

nguyenchuyenhoa14-hub / MIPS-Assembly-CNN

Star

Convolutional Neural Network (CNN) mathematical operations—including 2D convolution, ReLU, and Max Pooling—written in pure MIPS assembly.

cnn mips-assembly low-level-programming mars-simulator deep-learning-hardware

Updated Jul 10, 2026
Assembly

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