Actions: dotnet/BenchmarkDotNet
Actions
Showing runs from all workflows
2,500+ workflow runs
2,500+ workflow runs
DefaultOrderer virtual. (#3215)
This allows subclasses to customize logical grouping.
generate-changelog
#583:
Commit ada0782
pushed
by
timcassell
DefaultOrderer virtual. (#3215)
This allows subclasses to customize logical grouping.
publish-nightly
#593:
Commit ada0782
pushed
by
timcassell
DefaultOrderer virtual. (#3215)
This allows subclasses to customize logical grouping.
run-tests
#3344:
Commit ada0782
pushed
by
timcassell
mov reg, imm64 ; call qword ptr [reg] instead of the shorter RIP-relative call qword ptr [rip+disp32] — typically when the target slot is out of ±2 GB range from the call site. The RIP-relative form is handled by IntelDisassembler today; the 2-instruction form is not, because TryGetReferencedAddress only inspects the current instruction (the CALL) and its memory...
run-tests
#3331:
Commit 17f2185
pushed
by
timcassell
mov reg, imm64 ; call qword ptr [reg] instead of the shorter RIP-relative call qword ptr [rip+disp32] — typically when the target slot is out of ±2 GB range from the call site. The RIP-relative form is handled by IntelDisassembler today; the 2-instruction form is not, because TryGetReferencedAddress only inspects the current instruction (the CALL) an...
publish-nightly
#590:
Commit 17f2185
pushed
by
timcassell
mov reg, imm64 ; call qword ptr [reg] instead of the shorter RIP-relative call qword ptr [rip+disp32] — typically when the target slot is out of ±2 GB range from the call site. The RIP-relative form is handled by IntelDisassembler today; the 2-instruction form is not, because TryGetReferencedAddress only inspects the current instruction (the CALL) and i...
generate-changelog
#580:
Commit 17f2185
pushed
by
timcassell