spec: DMA memcpy accelerator

[nicole-graus]

Description

Specifies the DMA memcpy table added by #874. It has one row per eight copied bytes (one on the tail), rows chained over a new DMA_NEXT bus, ECALL number -3. Adds the ADDNW template (ADD without wraparound) used for the address updates, and lists -3 in the ECALL overview.

One deliberate deviation from #874's Rust: 31 columns rather than 32, because the spec models timestamp as a Word, as every other chapter does.

[erik-3milabs]

Quick review:

1. As mentioned during yesterday's meeting, this chip was implemented to adhere to the EF's standardization efforts.
   Consider linking the standard (https://github.com/eth-act/zkevm-standards/tree/main/standards/accelerated-memory-operations) in the accelerator's description.
2. I don't know whether 'DMA' is the right name for this: DMA refers to a category of operations, while this is just one of them.

Do you want us to perform an in-depth analysis next? We might be able to find some optimizations (which could be very beneficial, given that this chip is expected to see a large volume of traffic).

[erik-3milabs]

see above