Delay and coalesce GIF DMA completion interrupts

[GTTeancum]

Summary

• Schedule GIF DMA completion interrupts on the EE scheduler instead of dispatching them synchronously.
• Model completion latency from transferred QWC and DMA-tag count, with a minimum delay for the runtime's coarse generated-code checkpoints.
• Coalesce multiple pending completions for the same DMAC cause while preserving events for other channels.
• Preserve the existing immediate completion behavior for non-GIF DMA channels.

The transfer-rate terms follow the same broad timing shape used by PCSX2 (2 bus cycles per QW, 2 cycles per tag, plus terminal latency). The 1024-cycle floor keeps short transfers asynchronous in PS2Recomp's current 32-cycle checkpoint model; without it, completion handlers can overtake guest packet producers.

A DMAC cause behaves as one latched status bit rather than a queue. If another completion is scheduled while the same cause is already pending, the first event remains authoritative and only one handler dispatch occurs.

Validation

• PS2RuntimeInterrupt: 12 passed, 0 failed, including delayed-deadline and same-cause coalescing regressions.
• X-Men Legends regression: a startup/reset completion and the first ring-buffer completion no longer dispatch as two queued GIF interrupts. The game now submits its own previously skipped texture packet and reaches a clean, complete 3D title scene without a game-specific texture repair.
• Runtime framebuffer checkpoint at the settled title is deterministic across the original discovery run and the final first-pending implementation (0799F698202E3F23F195F04C21996D2431B2169CBA3C0C2AD86E2D769B6FF363).