docs(cubie a7a): drop 'or 2x 2-lane MIPI CSI' wording#1899
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Milir-Radxa merged 1 commit intoJul 1, 2026
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Same correction as the A7Z docs in PR radxa-docs#1898. The v1.10 schematic (page 11, CAMERA) shows that connector J7 (CAM_31P) only brings out one MIPI clock lane (pin 18/19, net MCSIB-CKN/CKP). The second clock position (pin 9/10, MIPI_CLKBN/BP) is NC. With only one MIPI clock on the connector, the 4 data lanes cannot be split into two independent 2-lane cameras. Remove the split claim from the spec table and the MIPI CSI page so the docs match the hardware.
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Summary
Drop the "or 2x 2-lane MIPI CSI" wording in the Cubie A7A MIPI CSI page and README spec table so the docs match the actual hardware.
Background
Same correction as #1898 for A7Z. Reviewing
radxa_cubie_a7a_v1.10_schematic.pdf(page 11,CAMERA) shows that connector J7 (CAM_31P) only brings out one MIPI clock lane (pin 18/19, netMCSIB-CKN/CKP). The second clock position (pin 9/10,MIPI_CLKBN/BP) is NC. With only one MIPI clock on the connector, the 4 data lanes cannot be split into two independent 2-lane cameras.Note: A5E and Dragon Q6A were also checked — A5E's wiring is different and really does expose two MIPI clocks (MCSIA + MCSIB), and Q6A has three independent FPC connectors (1× Radxa 31P + 2× Raspberry Pi 15P), so those docs are intentionally left untouched.
Changes
docs/cubie/a7a/README.md(zh): spec table "摄像头" rowdocs/cubie/a7a/hardware-use/mipi-csi.md(zh)i18n/en/docusaurus-plugin-content-docs/current/cubie/a7a/README.md(en): spec table "Camera" rowi18n/en/docusaurus-plugin-content-docs/current/cubie/a7a/hardware-use/mipi-csi.md(en)All four now read "1 个 4 通道 MIPI CSI" / "1× 4-lane MIPI CSI".
Scope
docs-only, four files, one sentence per file. No code, no image, no schema change.
Checklist
python3 scripts/github_pr_guard.py checkokupstream-docs/main(radxa-docs/docs)