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plat-qcom: ipq96xx: add CDSP (Turing/NSP) PAS remoteproc support - #32

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Harikrishna (thariaruchamy-bit) wants to merge 2 commits into
qualcomm-linux:qcom-nextfrom
thariaruchamy-bit:drivers-qcom-nsp
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plat-qcom: ipq96xx: add CDSP (Turing/NSP) PAS remoteproc support#32
Harikrishna (thariaruchamy-bit) wants to merge 2 commits into
qualcomm-linux:qcom-nextfrom
thariaruchamy-bit:drivers-qcom-nsp

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@thariaruchamy-bit

@thariaruchamy-bit Harikrishna (thariaruchamy-bit) commented Jul 29, 2026

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Summary

Add PAS support for the ipq96xx CDSP (Turing/NSP) remote processor and
enable it on the ipq96xx target. Slots CDSP into the existing per-platform
PAS descriptor/ops framework already used by kodiak and lemans.

Testing

  • Built PLATFORM_FLAVOR=ipq96xx (feature on) and =kodiak (feature off)
    with aarch64-linux-gnu-; each commit builds independently
    (bisect-verified).
  • checkpatch clean (0/0) on both commits.
  • CDSP boot verified on ipq96xx hardware.

Known limitation

No secure image authentication, matching the rest of the upstream PAS
framework; integrity relies on the loader chain.

Comment thread core/pta/qcom/pas/platform/ipq96xx/cdsp.c
Comment thread core/pta/qcom/pas/platform/pas_data.h Outdated
Comment thread core/pta/qcom/pas/platform/ipq96xx/cdsp.c Outdated
Comment thread core/drivers/clk/qcom/platform/ipq96xx/clock-qcom-pas.c

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Pull request overview

This PR adds Qualcomm PAS (Peripheral Authentication Service) support for bringing up the ipq96xx CDSP (Turing/NSP) remote processor via the existing PAS PTA framework, along with the clock enablement and target integration needed to use it on the ipq96xx platform.

Changes:

  • Introduces an ipq96xx PAS platform implementation for CDSP firmware boot/shutdown, including DTB-based configuration programming.
  • Extends the PAS core to support “window-less” PAS images (used here for the CDSP DTB blob) by skipping controller mapping when the window size is zero.
  • Enables the PAS PTA and Qualcomm clock driver on the ipq96xx target and adds the required register window base/size definitions.

Reviewed changes

Copilot reviewed 10 out of 10 changed files in this pull request and generated 4 comments.

Show a summary per file
File Description
core/pta/qcom/pas/platform/pas_data.h Adds a PAS ID for the CDSP DTB pseudo-image.
core/pta/qcom/pas/platform/ipq96xx/subsys.c Registers ipq96xx PAS subsystems (CDSP + DTB) and their ops/reset sequencing.
core/pta/qcom/pas/platform/ipq96xx/sub.mk Adds ipq96xx PAS platform sources to the build.
core/pta/qcom/pas/platform/ipq96xx/cdsp.h Declares ipq96xx CDSP PAS ops.
core/pta/qcom/pas/platform/ipq96xx/cdsp.c Implements CDSP boot/shutdown sequences and DTB configuration programming.
core/pta/qcom/pas/pas_core.c Skips controller mapping for zero-sized (window-less) PAS images.
core/drivers/clk/qcom/platform/ipq96xx/clock-qcom-pas.c Adds ipq96xx clock enable path used by PAS for CDSP/Turing bring-up.
core/drivers/clk/qcom/platform/ipq96xx/clock_group_qcom.h Defines ipq96xx clock register offsets/bitfields for CDSP/Turing.
core/arch/arm/plat-qcom/bobcat/ipq96xx/target.mk Enables PAS PTA + QCOM clock driver on ipq96xx and registers the early TA.
core/arch/arm/plat-qcom/bobcat/ipq96xx/target_config.h Adds ipq96xx register window base/size definitions used by CDSP bring-up.
Suppressed comments (1)

core/pta/qcom/pas/platform/ipq96xx/cdsp.c:264

  • cdsp_fw_shutdown() always returns success after the idle-wait loop, even if the timeout elapses and the subsystem never reports idle. This can mask failed resets and make subsequent boots flaky. Return TEE_ERROR_TIMEOUT (and log) when the idle condition is not reached.
	timeout = timeout_init_us(5000 * 1000);
	do {
		val = io_read32(tcsr + TCSR_TURING_MASTER_IDLE);
		val2 = io_read32(tcsr + TCSR_TURING_IL1_MASTER_IDLE);
		if ((val & 0x1) && (val2 & 0x1))
			break;
	} while (!timeout_elapsed(timeout));

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Comment thread core/pta/qcom/pas/platform/ipq96xx/cdsp.c
Comment thread core/pta/qcom/pas/platform/ipq96xx/cdsp.c Outdated
Comment thread core/pta/qcom/pas/platform/ipq96xx/cdsp.c Outdated
Comment thread core/drivers/clk/qcom/platform/ipq96xx/clock_group_qcom.h

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Pull request overview

Copilot reviewed 10 out of 10 changed files in this pull request and generated no new comments.

Suppressed comments (5)

core/pta/qcom/pas/platform/ipq96xx/cdsp.c:216

  • The power-on-status poll loops tightly without any delay (up to 1s). Add a short udelay to reduce CPU burn while waiting for the hardware bit to update.
	do {
		val = io_read32(tcsr + TCSR_TURING_PWR_ON);
		if (val & 0x1)
			break;
	} while (!timeout_elapsed(timeout));

core/pta/qcom/pas/platform/ipq96xx/cdsp.c:227

  • The halt-ack poll loops tightly without any delay (up to 5s). Add a short udelay to avoid a long busy-spin if the DSP is slow to acknowledge.
		do {
			val = io_read32(tcsr + TCSR_TURING_HALTACK);
			if (val & 0x1)
				break;
		} while (!timeout_elapsed(timeout));

core/pta/qcom/pas/platform/ipq96xx/cdsp.c:262

  • The idle-state poll loops tightly without any delay (up to 5s). Add a short udelay to reduce CPU burn while waiting for the hardware idle bits to settle.
	do {
		val = io_read32(tcsr + TCSR_TURING_MASTER_IDLE);
		val2 = io_read32(tcsr + TCSR_TURING_IL1_MASTER_IDLE);
		if ((val & 0x1) && (val2 & 0x1))
			break;
	} while (!timeout_elapsed(timeout));

core/pta/qcom/pas/platform/ipq96xx/cdsp.c:173

  • The stage-2 boot-status poll is a tight busy-loop with no delay; on a 1s timeout it can burn significant CPU. Add a small udelay in the loop (consistent with other PAS/QDSP6 bring-up paths).
	do {
		boot_status = io_read32(qdsp6ss + Q6SS_BOOT_STATUS_REG);
		if (boot_status == Q6SS_BOOT_STATUS_STAGE2)
			break;
	} while (!timeout_elapsed(timeout));

core/pta/qcom/pas/platform/ipq96xx/cdsp.c:156

  • The stage-1 boot-status poll is a tight busy-loop with no delay; on a 1s timeout it can burn significant CPU. Other PAS/QDSP6 bring-up code (e.g. lemans cdsp0/cdsp1) sleeps briefly between polls. Add a small udelay in the loop.

This issue also appears in the following locations of the same file:

  • line 169
  • line 211
  • line 222
  • line 256
	do {
		boot_status = io_read32(qdsp6ss + Q6SS_BOOT_STATUS_REG);
		if (boot_status == Q6SS_BOOT_STATUS_STAGE1)
			break;
	} while (!timeout_elapsed(timeout));

@thariaruchamy-bit

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Author

Selvam Sathappan (@zelvam95) Sumit Garg (@b49020) , Have resolved the comments, please share if there are any additional ones

Harikrishna added 2 commits August 6, 2026 17:09
Add PAS support for the ipq96xx CDSP (Turing/NSP) remote processor: the
client loads the firmware and its device-tree blob, then drives the PTA to
program the QDSP6 boot registers and run the two-stage boot FSM. The blob
is a second, window-less PAS image; a generic guard in the PAS core skips
the controller mapping for those. Shutdown halts the core and resets it
via GCC. Also adds the Turing clock bring-up.

ipq96xx gates these windows to secure-only accesses via XPU, so they are
mapped MEM_AREA_IO_SEC; a new qcom_pas_data::secure flag selects the
mapping type, leaving other platforms on MEM_AREA_IO_NSEC. No secure image
authentication is done here, as elsewhere in the PAS framework.

Testing:
Built for PLATFORM_FLAVOR=ipq96xx (feature on) and kodiak (feature off)
with aarch64-linux-gnu-. CDSP boot verified on ipq96xx hardware.

Signed-off-by: Harikrishna <hart@qti.qualcomm.com>
Enable the PAS PTA and Qualcomm clock driver on ipq96xx, add the CDSP
(Turing/NSP) register window bases (Turing, GCC, MPM2, TCSR), and
register the PAS pseudo TA as an in-tree early TA.

Testing:
Built for PLATFORM_FLAVOR=ipq96xx with aarch64-linux-gnu-; the CDSP PAS
and clock objects link into the image and the PAS early TA is signed.

Signed-off-by: Harikrishna <hart@qti.qualcomm.com>

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Pull request overview

Copilot reviewed 10 out of 10 changed files in this pull request and generated 1 comment.

{
struct io_pa_va gcc = { .pa = GCC_BASE };
struct io_pa_va cdsp_tcsr = { .pa = CDSP_TCSR_BASE };
vaddr_t turing = io_pa_or_va(&data->base, data->size);
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3 participants