Fix AXI widths in synthesis benchmarks - #445
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This was referenced Aug 18, 2026
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Fix the rotated address, data, and ID width parameters on the local
AXI_BUSinstances in:synth_axi_isolatesynth_axi_serializersynth_axi_to_mem_bankedThe DUT instances already use the intended mapping. Keeping both sides consistent removes the width expansion/truncation diagnostics and prevents data-width settings such as 512 bits from becoming pathological 512-bit IDs during elaboration.
Fixes #444.