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[DYNAREC] Refined libtbb detection and optimization #4699

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Merged
ptitSeb merged 3 commits into from
Nov 13, 2026
Merged

[DYNAREC] Refined libtbb detection and optimization #4699

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135916c
[DYNAREC] Refined libtbb detection and optimization
ksco Nov 13, 2026
bc012b0
update
ksco Nov 13, 2026
08a6915
fix build
ksco Nov 13, 2026
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1 change: 1 addition & 0 deletions CMakeLists.txt
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Expand Up @@ -1033,6 +1033,7 @@ if(DYNAREC)
"${BOX64_ROOT}/src/dynarec/dynarec_native_functions.c"
"${BOX64_ROOT}/src/dynarec/dynacache_reloc.c"
"${BOX64_ROOT}/src/dynarec/dynacache_compress.c"
"${BOX64_ROOT}/src/dynarec/tbb.c"
"${BOX64_ROOT}/src/emu/x64test.c"
)
endif()
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6 changes: 3 additions & 3 deletions docs/USAGE.md
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Expand Up @@ -321,10 +321,10 @@ Enable or disable the generation of division-by-zero exception. Available in Wow

### BOX64_DYNAREC_TBB

Enable or disable libtbb detection.
Detect oneTBB (statically linked or libtbb) and emulate x86 TSO for its scheduler code range.

* 0: Do not detect libtbb.
* 1: Detect libtbb and apply conservative settings. [Default]
* 0: Do not detect oneTBB.
* 1: Detect oneTBB and apply strongmem=4 to its scheduler code range. [Default]

### BOX64_DYNAREC_X87DOUBLE

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6 changes: 3 additions & 3 deletions docs/USAGE_CN.md
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Expand Up @@ -308,10 +308,10 @@ Skip N first CPU cores (Is apply before MAXCPU) 在 WowBox64 中可用。

### BOX64_DYNAREC_TBB

启用或禁用 libtbb 检测。
检测 oneTBB（静态链接或 libtbb），并为其调度器代码范围模拟 x86 TSO。

* 0: 不检测 libtbb。
* 1: 检测 libtbb 并应用保守设置。 [默认值]
* 0: 不检测 oneTBB。
* 1: 检测 oneTBB 并对其调度器代码范围应用 strongmem=4。 [默认值]

### BOX64_DYNAREC_X87DOUBLE

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6 changes: 3 additions & 3 deletions docs/box64.pod
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Expand Up @@ -351,10 +351,10 @@ Enable the emulation of x86 strong memory model. Available in WowBox64.

=item B<BOX64_DYNAREC_TBB> =I<0|1>

Enable or disable libtbb detection.
Detect oneTBB (statically linked or libtbb) and emulate x86 TSO for its scheduler code range.

* 0 : Do not detect libtbb.
* 1 : Detect libtbb and apply conservative settings. [Default]
* 0 : Do not detect oneTBB.
* 1 : Detect oneTBB and apply strongmem=4 to its scheduler code range. [Default]


=item B<BOX64_DYNAREC_TEST> =I<0|1|0xXXXXXXXX-0xYYYYYYYY>
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6 changes: 3 additions & 3 deletions docs/gen/usage.json
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Expand Up @@ -772,19 +772,19 @@
},
{
"name": "BOX64_DYNAREC_TBB",
"description": "Enable or disable libtbb detection.",
"description": "Detect oneTBB (statically linked or libtbb) and emulate x86 TSO for its scheduler code range.",
"category": "Compatibility",
"wine": false,
"configurator": false,
"options": [
{
"key": "0",
"description": "Do not detect libtbb.",
"description": "Do not detect oneTBB.",
"default": false
},
{
"key": "1",
"description": "Detect libtbb and apply conservative settings.",
"description": "Detect oneTBB and apply strongmem=4 to its scheduler code range.",
"default": true
}
]
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6 changes: 3 additions & 3 deletions docs/gen/usage_cn.json
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Expand Up @@ -263,10 +263,10 @@
}
},
"BOX64_DYNAREC_TBB": {
"description": "启用或禁用 libtbb 检测。",
"description": "检测 oneTBB（静态链接或 libtbb），并为其调度器代码范围模拟 x86 TSO。",
"options": {
"0": "不检测 libtbb。",
"1": "检测 libtbb 并应用保守设置。"
"0": "不检测 oneTBB。",
"1": "检测 oneTBB 并对其调度器代码范围应用 strongmem=4。"
}
},
"BOX64_DYNAREC_TEST": {
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4 changes: 3 additions & 1 deletion src/dynarec/arm64/dynarec_arm64_pass0.h
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@@ -1,5 +1,7 @@
// SPDX-License-Identifier: MIT

#include "tbb.h"

#define INIT uintptr_t sav_addr=addr
#define FINI \
dyn->isize = addr-sav_addr; \
Expand Down Expand Up @@ -40,7 +42,7 @@
dyn->insts[ninst].f_entry = dyn->f; \
dyn->insts[ninst].host_call = 0; \
dyn->insts[ninst].host_call_clobber = 0;\
dyn->insts[ninst].x64.strongmem = ((box64_wine && VolatileRangesContains(ip)) ? 0 : BOX64DRENV(dynarec_strongmem)); \
dyn->insts[ninst].x64.strongmem = ((box64_wine && VolatileRangesContains(ip)) ? 0 : (TBBTSORangesContains(ip) ? 4 : BOX64DRENV(dynarec_strongmem))); \
if(dyn->insts[ninst].x64.strongmem && cpuext.lrcpc && cpuext.lrcpc2 && cpuext.uscat) dyn->insts[ninst].use_lrcpc = 1; \
if(ninst) {dyn->insts[ninst-1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst-1].x64.addr;} \
AREFLAGSNEEDED()
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47 changes: 26 additions & 21 deletions src/dynarec/la64/dynarec_la64_pass0.h
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@@ -1,4 +1,7 @@
// SPDX-License-Identifier: MIT

#include "tbb.h"

#define INIT uintptr_t sav_addr = addr
#define FINI \
dyn->isize = addr - sav_addr; \
Expand Down Expand Up @@ -70,27 +73,29 @@
} else \
dyn->insts[ninst].barrier_maybe = 1
#define SET_HASCALLRET() dyn->insts[ninst].x64.has_callret = 1
#define NEW_INST \
++dyn->size; \
dyn->insts[ninst].x64.addr = ip; \
dyn->insts[ninst].rsp_class = 0; \
dyn->lsx.combined1 = dyn->lsx.combined2 = 0; \
dyn->lsx.swapped = 0; \
dyn->lsx.barrier = 0; \
dyn->insts[ninst].up32_read = 0; \
dyn->insts[ninst].up32_write64 = 0; \
dyn->insts[ninst].up32_write32 = 0; \
dyn->insts[ninst].up32_zero = 0; \
dyn->insts[ninst].up32_skip = 0; \
dyn->insts[ninst].up32_pending = 0; \
dyn->insts[ninst].vector_liveness = (vector_liveness_t) { 0 }; \
dyn->insts[ninst].comis_fusion = -1; \
dyn->insts[ninst].comis_mark = 0; \
dyn->insts[ninst].host_call = 0; \
dyn->insts[ninst].call_window = 0; \
dyn->insts[ninst].f_entry = dyn->f; \
dyn->insts[ninst].x64.strongmem = ((box64_wine && VolatileRangesContains(ip)) ? 0 : BOX64DRENV(dynarec_strongmem)); \
if (ninst) { dyn->insts[ninst - 1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst - 1].x64.addr; } \
#define NEW_INST \
++dyn->size; \
dyn->insts[ninst].x64.addr = ip; \
dyn->insts[ninst].rsp_class = 0; \
dyn->lsx.combined1 = dyn->lsx.combined2 = 0; \
dyn->lsx.swapped = 0; \
dyn->lsx.barrier = 0; \
dyn->insts[ninst].up32_read = 0; \
dyn->insts[ninst].up32_write64 = 0; \
dyn->insts[ninst].up32_write32 = 0; \
dyn->insts[ninst].up32_zero = 0; \
dyn->insts[ninst].up32_skip = 0; \
dyn->insts[ninst].up32_pending = 0; \
dyn->insts[ninst].vector_liveness = (vector_liveness_t) { 0 }; \
dyn->insts[ninst].comis_fusion = -1; \
dyn->insts[ninst].comis_mark = 0; \
dyn->insts[ninst].host_call = 0; \
dyn->insts[ninst].call_window = 0; \
dyn->insts[ninst].f_entry = dyn->f; \
dyn->insts[ninst].x64.strongmem = ((box64_wine && VolatileRangesContains(ip)) \
? 0 \
: (TBBTSORangesContains(ip) ? 4 : BOX64DRENV(dynarec_strongmem))); \
if (ninst) { dyn->insts[ninst - 1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst - 1].x64.addr; } \
AREFLAGSNEEDED()

#define INST_EPILOG \
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38 changes: 21 additions & 17 deletions src/dynarec/rv64/dynarec_rv64_pass0.h
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@@ -1,5 +1,7 @@
// SPDX-License-Identifier: MIT

#include "tbb.h"

#define INIT uintptr_t sav_addr = addr
#define FINI \
dyn->isize = addr - sav_addr; \
Expand Down Expand Up @@ -69,23 +71,25 @@
} else \
dyn->insts[ninst].barrier_maybe = 1
#define SET_HASCALLRET() dyn->insts[ninst].x64.has_callret = 1
#define NEW_INST \
++dyn->size; \
memset(&dyn->insts[ninst], 0, sizeof(instruction_native_t)); \
dyn->insts[ninst].x64.addr = ip; \
dyn->e.combined1 = dyn->e.combined2 = 0; \
dyn->e.swapped = 0; \
dyn->e.barrier = 0; \
for (int i = 0; i < 24; ++i) \
dyn->e.olds[i].v = 0; \
dyn->insts[ninst].f_entry = dyn->f; \
dyn->insts[ninst].vector_sew_entry = dyn->vector_sew; \
dyn->inst_sew = dyn->vector_sew; \
dyn->inst_vlmul = VECTOR_LMUL1; \
dyn->inst_vl = 0; \
dyn->insts[ninst].x64.strongmem = ((box64_wine && VolatileRangesContains(ip)) ? 0 : BOX64DRENV(dynarec_strongmem));\
if (ninst) \
dyn->insts[ninst - 1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst - 1].x64.addr;\
#define NEW_INST \
++dyn->size; \
memset(&dyn->insts[ninst], 0, sizeof(instruction_native_t)); \
dyn->insts[ninst].x64.addr = ip; \
dyn->e.combined1 = dyn->e.combined2 = 0; \
dyn->e.swapped = 0; \
dyn->e.barrier = 0; \
for (int i = 0; i < 24; ++i) \
dyn->e.olds[i].v = 0; \
dyn->insts[ninst].f_entry = dyn->f; \
dyn->insts[ninst].vector_sew_entry = dyn->vector_sew; \
dyn->inst_sew = dyn->vector_sew; \
dyn->inst_vlmul = VECTOR_LMUL1; \
dyn->inst_vl = 0; \
dyn->insts[ninst].x64.strongmem = ((box64_wine && VolatileRangesContains(ip)) \
? 0 \
: (TBBTSORangesContains(ip) ? 4 : BOX64DRENV(dynarec_strongmem))); \
if (ninst) \
dyn->insts[ninst - 1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst - 1].x64.addr; \
AREFLAGSNEEDED()

#define INST_EPILOG \
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