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1. w28ahmad/EarlyExitLLM w28ahmad/EarlyExitLLM Public

   Python

2. 32-Bit-5-Stage-Pipelined-RISC-V-Processor- 32-Bit-5-Stage-Pipelined-RISC-V-Processor- Public

   Implemented a 32-bit 5-stage RISC-V processor with branch predictor using Verilog. Optimized the Fibonacci algorithm in Assembly Language and demonstrated its performance on FPGA

   Verilog 2

3. Assistance-System-for-the-Blind-using-Object-Detection Assistance-System-for-the-Blind-using-Object-Detection Public

   Designed and implemented a real-time pedestrian assistance system for visually impaired individuals, utilizing Jetson Nano board . Fine-tuned YOLOv7 with a custom dataset, optimized it with TensorR…

   C++ 1

4. CNN-Hardware-Implementation-on-FPGA CNN-Hardware-Implementation-on-FPGA Public

   Implemented hardware for CNN operations on a DE1-SoC board, addressing FPGA resource limitations by designing pipelined CNN cores. Developed memory access mechanism using on-chip SRAM blocks for co…

   Verilog 1

5. ece1755-spinquant-profiling-APPLE ece1755-spinquant-profiling-APPLE Public

   This project profiles SpinQuant (a quantized LLM model) and the original Llama model using ExecuTorch on Apple M4 Pro CPU.

   Python

6. KAIA_SamsungCEChallenge KAIA_SamsungCEChallenge Public