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45 changes: 28 additions & 17 deletions Cargo.lock

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56 changes: 34 additions & 22 deletions libkernel/src/arch/x86_64/memory/pg_walk.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,14 +4,14 @@ use crate::{
error::{MapError, Result},
memory::{
PAGE_SIZE,
address::{PA, TPA, VA},
address::{Address, TPA, VA},
paging::{
NullTlbInvalidator, PaMapper, PageTableEntry, PageTableMapper, PgTable, PgTableArray,
TableMapper,
permissions::PtePermissions,
walk::{RecursiveWalker, Translator, WalkContext},
walk::{RecursiveWalker, Translatable, Translator, WalkContext},
},
region::{PhysMemoryRegion, VirtMemoryRegion},
region::{MemoryRegion, VirtMemoryRegion},
},
};

Expand Down Expand Up @@ -115,37 +115,42 @@ pub fn get_pte<PM: PageTableMapper>(
}

impl Translator for PML4Table {
fn translate<PM: PageTableMapper>(
table_pa: TPA<PgTableArray<Self>>,
va: VA,
fn translate<M: Translatable, PM: PageTableMapper<M::Phys>>(
table_pa: Address<M::Phys, PgTableArray<PML4Table>>,
va: Address<M, ()>,
ctx: &mut WalkContext<PM>,
) -> Result<Option<(PA, usize, PtePermissions)>> {
) -> crate::error::Result<Option<(Address<M::Phys, ()>, usize, PtePermissions)>> {
let desc = unsafe {
ctx.mapper
.with_page_table(table_pa, |pgtable| Self::from_ptr(pgtable).get_desc(va))?
ctx.mapper.with_page_table(table_pa, |pgtable| {
Self::from_ptr(pgtable).get_desc(VA::from_value(va.value()))
})?
};
match desc.next_table_address() {
Some(next_pa) => PDPTable::translate(next_pa, va, ctx),
Some(next_pa) => {
let next_pa = Address::from_value(next_pa.value());
PDPTable::translate(next_pa, va, ctx)
}
None if desc.is_valid() => Err(MapError::InvalidDescriptor.into()),
None => Ok(None),
}
}
}

impl Translator for PTable {
fn translate<PM: PageTableMapper>(
table_pa: TPA<PgTableArray<Self>>,
va: VA,
fn translate<M: Translatable, PM: PageTableMapper<M::Phys>>(
table_pa: Address<M::Phys, PgTableArray<PTable>>,
va: Address<M, ()>,
ctx: &mut WalkContext<PM>,
) -> Result<Option<(PA, usize, PtePermissions)>> {
) -> crate::error::Result<Option<(Address<M::Phys, ()>, usize, PtePermissions)>> {
let desc = unsafe {
ctx.mapper
.with_page_table(table_pa, |pgtable| Self::from_ptr(pgtable).get_desc(va))?
ctx.mapper.with_page_table(table_pa, |pgtable| {
Self::from_ptr(pgtable).get_desc(VA::from_value(va.value()))
})?
};

match desc.mapped_address() {
Some(pa) => Ok(Some((
pa,
Address::from_value(pa.value()),
1 << Self::Descriptor::MAP_SHIFT,
desc.permissions(),
))),
Expand All @@ -155,12 +160,17 @@ impl Translator for PTable {
}
}

/// Result of a translation, returning the region which is mapped (could be
/// longer than [PAGE_SIZE] for block mappings), the offset of the virtual
/// address into the region and the permissions of the mapping.
pub type TranslationResult<K> = (MemoryRegion<K>, usize, PtePermissions);

/// Translates the VA into a physical region plus an offset and permissions.
pub fn translate<PM: PageTableMapper>(
pml4_table: TPA<PgTableArray<PML4Table>>,
va: VA,
pub fn translate<M: Translatable, PM: PageTableMapper<M::Phys>>(
pml4_table: Address<M::Phys, PgTableArray<PML4Table>>,
va: Address<M, ()>,
mapper: &mut PM,
) -> Result<Option<(PhysMemoryRegion, usize, PtePermissions)>> {
) -> Result<Option<TranslationResult<M::Phys>>> {
let mut walk_ctx = WalkContext {
mapper,
// Safe to not invalidate the TLB, as we are not modifying any PTEs.
Expand All @@ -172,7 +182,9 @@ pub fn translate<PM: PageTableMapper>(

let offset = va.value() & (blk_sz - 1);

Ok(Some((PhysMemoryRegion::new(pa, blk_sz), offset, perms)))
let rgn = MemoryRegion::new(pa, blk_sz);

Ok(Some((rgn, offset, perms)))
} else {
Ok(None)
}
Expand Down
24 changes: 24 additions & 0 deletions libkernel/src/memory/address.rs
Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,10 @@ pub struct Virtual;
#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)]
pub struct Physical;

/// Marker for a virtual guest memory address type.
#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)]
pub struct GuestVirtual;

/// Marker for a physical guest memory address type.
#[derive(Debug, Clone, Copy, PartialEq, Eq, PartialOrd, Ord)]
pub struct GuestPhysical;
Expand All @@ -67,11 +71,13 @@ pub struct User;

impl sealed::Sealed for Virtual {}
impl sealed::Sealed for Physical {}
impl sealed::Sealed for GuestVirtual {}
impl sealed::Sealed for GuestPhysical {}
impl sealed::Sealed for User {}

impl MemKind for Virtual {}
impl MemKind for Physical {}
impl MemKind for GuestVirtual {}
impl MemKind for GuestPhysical {}
impl MemKind for User {}

Expand Down Expand Up @@ -197,6 +203,8 @@ pub type TVA<T> = Address<Virtual, T>;
pub type TUA<T> = Address<User, T>;
/// A typed guest physical address.
pub type TGPA<T> = Address<GuestPhysical, T>;
/// A typed guest virtual address.
pub type TGVA<T> = Address<GuestVirtual, T>;
/// A typed host physical address.
pub type THPA<T> = TPA<T>;

Expand All @@ -208,6 +216,8 @@ pub type VA = Address<Virtual, ()>;
pub type UA = Address<User, ()>;
/// An untyped guest physical address.
pub type GPA = Address<GuestPhysical, ()>;
/// An untyped guest virtual address.
pub type GVA = Address<GuestVirtual, ()>;
/// An untyped host physical address.
pub type HPA = PA;

Expand Down Expand Up @@ -239,6 +249,20 @@ impl<T> TPA<T> {
}
}

impl<T> TGPA<T> {
/// Convert to an untyped guest physical address.
pub fn to_untyped(self) -> GPA {
GPA::from_value(self.value())
}
}

impl<T> TGVA<T> {
/// Convert to an untyped guest virtual address.
pub fn to_untyped(self) -> GVA {
GVA::from_value(self.value())
}
}

impl<T> Display for TPA<T> {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
write!(f, "Px{:08x}", self.inner)
Expand Down
8 changes: 4 additions & 4 deletions libkernel/src/memory/paging/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@

use super::{
PAGE_SIZE,
address::{PA, TPA, TVA, VA},
address::{Address, MemKind, PA, Physical, TPA, TVA, VA},
region::PhysMemoryRegion,
};
use core::marker::PhantomData;
Expand Down Expand Up @@ -159,7 +159,7 @@ impl<K: PgTable, const N: usize> Default for PgTableArray<K, N> {
}

/// Trait for temporarily mapping and modifying a page table located at a
/// physical address.
/// (guest/host) physical address.
///
/// During early boot, there are multiple mechanisms for accessing page table memory:
/// - Identity mapping (idmap): active very early when VA = PA
Expand All @@ -175,7 +175,7 @@ impl<K: PgTable, const N: usize> Default for PgTableArray<K, N> {
/// This function is `unsafe` because the caller must ensure:
/// - The given physical address `pa` is valid and correctly aligned for type `T`.
/// - The contents at that physical address represent a valid page table of type `T`.
pub trait PageTableMapper {
pub trait PageTableMapper<K: MemKind = Physical> {
/// Map a physical address to a usable reference of the page table, run the
/// closure, and unmap.
///
Expand All @@ -185,7 +185,7 @@ pub trait PageTableMapper {
/// - The contents at that physical address represent a valid page table of type `T`.
unsafe fn with_page_table<T: PgTable, R>(
&mut self,
pa: TPA<PgTableArray<T>>,
pa: Address<K, PgTableArray<T>>,
f: impl FnOnce(TVA<PgTableArray<T>>) -> R,
) -> crate::error::Result<R>;
}
Expand Down
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