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fix(gen-verilog): tuple literal elements and destructure regs are width-cast - #1973

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fix(gen-verilog): tuple literal elements and destructure regs are width-cast#1973
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Refs #1948

Two tuple-in-Verilog width defects:

  • Tuple return literal (1, true) packed each element via gen_verilog_expr → bare unsized literal, rejected in the concatenation ("operand has indefinite width"). Elements are width-cast to their tuple-element type now.
  • Tuple-destructure binding regs ((a,b,c,d) = mesh_ip(1)) were declared 64-bit each, so {d,c,b,a} = <32-bit packed return> sliced wrongly. Each element reg declared at its element width from the callee's return tuple type.

tri-net corpus: icarus 88 → 94 (fpga_synthesis_report, hello, integration_tests, lite_crypto, mesh_routing, packet_loss_injection). bridge.v regenerated; unit suite at the single pre-existing red. FROZEN_HASH resealed; NOW.md entries added.

🤖 Generated with Claude Code

…th-cast

Refs #1948

Two tuple-in-Verilog width defects kept several specs red under icarus:

- A tuple return literal `(1, true)` packed each element through
  gen_verilog_expr, which emits a bare unsized literal -- iverilog
  rejects an unsized operand in a concatenation ("operand has
  indefinite width"). Each element is width-cast to its declared
  tuple-element type now.
- Tuple-DESTRUCTURE binding regs (`(a,b,c,d) = mesh_ip(1)`) were each
  declared 64-bit, so `{d,c,b,a} = <32-bit packed return>` sliced the
  value wrongly and every element read garbage. Each element reg is
  declared at its element width, taken from the callee's return tuple
  type.

tri-net corpus: icarus 88 -> 94 (fpga_synthesis_report, hello,
integration_tests, lite_crypto, mesh_routing, packet_loss_injection).
bridge.v regenerated; unit suite at the single pre-existing red.
FROZEN_HASH resealed.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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gHashTag enabled auto-merge (squash) August 8, 2026 20:29
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Generated at: 2026-08-08 20:29:43 UTC

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Total Open PRs 15
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READY 5
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  • ⚠️ STALE -- sha256(compiler.rs)=3efebe5d3fb1 != manifest seal=87e5cbd3ad94.
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    Run scripts/reseal-check.sh locally for the two-step reseal command (advisory; not a merge gate).

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gHashTag merged commit 980815b into master Aug 8, 2026
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gHashTag added a commit that referenced this pull request Aug 8, 2026
…1975)

* test(gen-verilog): tuple contract expects width-cast concat operands

Follow-up to #1973: tuple literal elements are now width-cast
(`{32'((a-b)), 32'((a+b))}`) so iverilog accepts them in a
concatenation; the phase40 contract test's exact-string expectation is
updated to match. Auto-merge landed #1973 on the green required checks
before the unit suite (not a required check) was consulted.

Unit suite back to the single pre-existing red (bitnet_layer).
FROZEN_HASH resealed.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>

* docs: NOW entry for the tuple contract test update

Refs #1948

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>

---------

Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
gHashTag added a commit that referenced this pull request Aug 8, 2026
Refs #1948

Follow-up to #1973: tuple literal elements are width-cast so iverilog
accepts them in a concatenation; the phase40 contract test's exact-string
expectation is updated. Auto-merge landed #1973 on green required checks
before the unit suite (not a required check) was consulted.

Unit suite back to the single pre-existing red. FROZEN_HASH resealed;
NOW.md entries added.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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