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fix(gen-verilog): honest early-return lowering via a guard register - #1950

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fix(gen-verilog): honest early-return lowering via a guard register#1950
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Refs #1948

return X; lowered to a plain assignment with no exit — later statements overwrote the result, so a fn ending in return 0; returned 0 on every path. This is the runtime-divergence class behind Verilog-vs-Zig/C failures.

Every fn body now carries reg __t27_ret; returns set it and each remaining statement region is wrapped in if (!__t27_ret). A disable-based lowering was tried and rejected: it corrupts recursive static functions (vvp hang in adaptive_retry). The pretty if/else rewrite for else-less guarded returns is kept.

tri-net corpus: adaptive_routing 8 → 3 failed asserts (rest is the [T; N] fn-param packing class); access_control newly passes; 60-spec gate green. bridge.v regenerated. Only unit red is pre-existing bitnet_layer. FROZEN_HASH resealed; NOW.md entries added.

🤖 Generated with Claude Code

Refs #1948

`return X;` lowered to a plain assignment with no exit: execution fell
through and later statements overwrote the result -- a function ending
in `return 0;` returned 0 on EVERY path. This is the runtime-divergence
class behind the Verilog-vs-Zig/C test failures on the tri-net corpus.

Every function body now carries `reg __t27_ret`: a return sets it and
each remaining statement region is wrapped in `if (!__t27_ret)`. A
disable-based lowering was tried and rejected: `disable` of the named
body block corrupts recursive static functions (vvp hang in
adaptive_retry's total_retry_time). The existing pretty if/else rewrite
for guarded returns without an else is kept; the guard register covers
the shapes it cannot (if/else-if chains, loops with returns).

tri-net corpus: adaptive_routing drops from 8 failed asserts to 3 (the
remainder is the [T; N] fn-param packing class); access_control newly
passes; the 60-spec icarus gate is green. bridge.v regenerated under
the new lowering. FROZEN_HASH resealed; only unit red is the
pre-existing bitnet_layer iverilog test.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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gHashTag enabled auto-merge (squash) August 8, 2026 17:11
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📓 NotebookLM Notebook linked to this PR

This notebook contains session context, decisions, and artifacts for this work.

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PR Dashboard

Generated at: 2026-08-08 17:11:53 UTC

Summary

Status Count
Total Open PRs 14
PRs with Failing Checks 1
PRs with All Checks Green 13
READY 5
FAILING 1
PENDING 0

Seal Status

  • ⚠️ STALE -- sha256(compiler.rs)=b223a1d4c40c != manifest seal=87e5cbd3ad94.
    The committed NMSE numbers were certified against an older compiler.rs.
    Run scripts/reseal-check.sh locally for the two-step reseal command (advisory; not a merge gate).

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gHashTag merged commit 1acfbaa into master Aug 8, 2026
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gHashTag added a commit that referenced this pull request Aug 8, 2026
…updated (#1958)

* fix(gen-verilog): W458 keeps the legacy [N]T binding; unit contracts updated

Refs #1948

Follow-up landing the two pieces auto-merge raced past in #1952/#1957:

- The W458 array-param exclusion narrows to rust-style [T; N] primitives
  only: the legacy [N]T spelling keeps its module-array ROM binding
  contract (array_param_read_emitted asserts it)
- nested_return_lowers_as_early_exit's discriminator includes the
  early-return guard assignment introduced by #1950

Unit suite back to a single pre-existing red (bitnet_layer iverilog).
FROZEN_HASH resealed.

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>

* docs: NOW entries for the W458 follow-up

Refs #1948

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>

---------

Co-authored-by: Claude Fable 5 <noreply@anthropic.com>
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