arch/arm/am67: Add eCAP APWM lower-half driver - #20138
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Adds a PWM lower-half using the eCAP modules in APWM mode as single-channel generators rather than capture units. start() reprograms the time base only when the frequency changes, so a duty-only update does not stop or zero a live counter. t3-gem-o1 registers /dev/ecap1 and /dev/ecap2; output pad selection is left to the board, as the candidates collide with I2C0. Verified on t3-gem-o1: examples/pwm runs a 1 kHz, 50% duty train on both instances and accepts a duty-only change (25% then 75%). The output pins have not been measured on copper, as no pad is assigned to them on this board. Assisted-by: Claude Code:claude-opus-4-8 Signed-off-by: Ulaş Sertan Kemeç <sertan.usk@gmail.com>
Record the eCAP1 and eCAP2 APWM outputs in the board's Peripheral Support list. Assisted-by: Claude Code:claude-opus-5 Signed-off-by: Ulaş Sertan Kemeç <sertan.usk@gmail.com>
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Summary
the module is used as a single-channel PWM generator rather than a capture
unit.
CAP1and the compare value inCAP2, with thecounter free-running from the eCAP functional clock at 125 MHz.
start()reprograms the time base only when the frequency changes, so aduty-only update does not clear
TSCNTSTPor zeroTSCTRon a runningcounter.
/dev/ecap1and eCAP2 as/dev/ecap2. Outputpad selection is left to the board; the candidate pads collide with I2C0 on
this design.
Impact
Testing
Testing logs before change: no eCAP support on this arch.
The version string in the logs is from the tested build; the commits were
GPG-signed afterwards, which rewrites hashes. The code is unchanged.
Testing logs after change:
Measured time base, captured 2026-09-11, read back from the A53 over
/dev/memwhile NuttX drives the output.PR verification Self-Check