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ci: add riscv64 RVV cross-compile workflow ported from faiss - #705

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ihb2032:ci/rvv-cross-test
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ci: add riscv64 RVV cross-compile workflow ported from faiss#705
ihb2032 wants to merge 2 commits into
alibaba:mainfrom
ihb2032:ci/rvv-cross-test

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@ihb2032 ihb2032 commented Aug 27, 2026

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Ports faiss's linux-riscv64-DD-cmake job so PRs get riscv64 coverage without native hardware.

  • New 08-linux-riscv64-rvv-cross.yml: cross-compile with the gcc-14 riscv64 toolchain (faiss's proven multiarch apt setup, minus libopenblas-dev/libgomp1 — no BLAS, ENABLE_OPENMP=OFF), then build & run the full ailego unit test suite (61 targets) under qemu-user with -cpu rv64,v=true,zvfh=true,zihintpause=true.
  • Installs qemu-user-static >= 9.2 from the Ubuntu pool: 24.04's qemu 8.2 does not emulate the riscv_hwprobe syscall, which the CpuFeatures runtime detection relies on.
  • New cmake/toolchains/riscv64-linux-gnu.cmake ported from faiss (overridable compiler names).
  • Wired into 01-ci-pipeline.yml; 08-cmake-subproject-integration.yml renumbered to 10 to free the slot (standalone nightly, unreferenced by filename).

Passes -DENABLE_RISCV64/-DENABLE_RISCV_VECTOR/-DENABLE_RISCV_ZVFH/-DENABLE_RISCV_ZIHINTPAUSE; until #311 lands these are unused-variable warnings and the job runs as a plain rv64gc cross-compile smoke test.

ihb2032 and others added 2 commits August 27, 2026 17:37
Port faiss's linux-riscv64-DD-cmake job (build-pull-request.yml) so PRs
get riscv64 coverage without native hardware:

- .github/workflows/08-linux-riscv64-rvv-cross.yml: cross-compile with
  gcc-14-riscv64-linux-gnu using faiss's proven multiarch apt setup
  (minus libopenblas-dev/libgomp1: no BLAS, ENABLE_OPENMP=OFF), then
  build and run the whole ailego unit test suite (61 targets) under
  qemu-user-static with -cpu rv64,v=true,zihintpause=true.
- cmake/toolchains/riscv64-linux-gnu.cmake: riscv64-linux-gnu toolchain
  file ported from faiss, with overridable compiler names.
- .github/workflows/01-ci-pipeline.yml: wire the new workflow into the
  main pipeline.
- .github/workflows/10-cmake-subproject-integration.yml: renumbered from
  08 to free the slot (standalone nightly, no references by filename).

The job passes -DENABLE_RISCV64/-DENABLE_RISCV_VECTOR/
-DENABLE_RISCV_ZIHINTPAUSE; until the RISC-V platform support lands on
main these are unused warnings and the job runs as a plain rv64gc
cross-compile smoke test.

Co-authored-by: lyd1992 <liuyudong@iscas.ac.cn>
Co-authored-by: YuanSheng <yuansheng@isrc.iscas.ac.cn>
Ubuntu 24.04 ships qemu-user-static 8.2, which does not emulate the
riscv_hwprobe syscall (emulation added in qemu 9.2, reporting V and
ZVFH from the -cpu config), so the hwprobe-based CpuFeatures detection
would always report false once the RISC-V platform support lands.
Install the newest static qemu build from the Ubuntu package pool
(currently 9.2.1), enable ENABLE_RISCV_ZVFH, and run the tests with
-cpu rv64,v=true,zvfh=true,zihintpause=true.

Co-authored-by: lyd1992 <liuyudong@iscas.ac.cn>
Co-authored-by: YuanSheng <yuansheng@isrc.iscas.ac.cn>
@ihb2032
ihb2032 force-pushed the ci/rvv-cross-test branch from cb0dcfd to 8ee9c35 Compare August 27, 2026 09:38
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3 participants