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Make peakrdl exporters optional#20

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urvantsev wants to merge 2 commits into
SimplHDL:mainfrom
urvantsev:feat-peakrdl-optional-exporters
Open

Make peakrdl exporters optional#20
urvantsev wants to merge 2 commits into
SimplHDL:mainfrom
urvantsev:feat-peakrdl-optional-exporters

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@urvantsev

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The SystemRDL generator always ran regblock, pyuvm and html. A design that writes its own register file from a template could not turn the AXI4-Lite regblock off: it paid for files it never used, or broke on a map regblock cannot describe.

Gate each on a config flag, default true:

[peakrdl.regblock]
enable = false

Existing builds are untouched. The flags live in SIMPLHDL_CONFIG, beside the other peakrdl settings.

The SystemRDL generator always ran regblock, pyuvm and html. A design
that writes its own register file from a template could not turn the
AXI4-Lite regblock off: it paid for files it never used, or broke on a
map regblock cannot describe.

Gate each on a config flag, default true:

    [peakrdl.regblock]
    enable = false

Existing builds are untouched. The flags live in SIMPLHDL_CONFIG,
beside the other peakrdl settings.
Templates render with only `node` plus a fixed globals set, so a
template cannot read the environment. Add `os` so a template can branch
on an env var (e.g. a per-build flavour selector) at render time.
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