Fix packed uint1b logical array reductions

[wei-core]

Summary

• fix the uint1b_t logical OR reduction specialization to accept logical_or
• use the correct identities and packed-byte checks for logical AND and OR
• mask padding bits in partial trailing bytes
• add regression coverage across logical bit and storage boundaries

Background

The logical OR specialization currently cannot be called through ReduceArray because its operator takes logical_and. Even when called directly through the specialization, its true identity makes an all-zero array reduce to true.

The logical AND specialization checks whether each storage byte is nonzero rather than whether every valid bit is set. For example, 0x7f incorrectly reduces to true. Partial trailing bytes also need a mask so padding bits do not participate in either reduction.

This change keeps the packed-byte path: full bytes are reduced directly, while only the valid low bits of a partial trailing byte are considered.

Contribution roles

I led the contribution direction and acceptance criteria, reviewed and approved
the final design, and reviewed every changed line. I understand the change and
own the final design decision and the submission. AI assistance was used for
repository research, root-cause analysis, implementation preparation, and
automated validation execution.

Testing

• reproduced the public logical OR helper compilation failure on the unmodified main branch
• reproduced incorrect runtime results on main: AND of [1,1,1,1,1,1,1,0] returned 1, and OR of an all-zero array returned 1
• manually compiled and ran the new regression source with MSVC 19.44, CUDA 12.9 headers, CCCL headers, and GoogleTest v1.14.0
• 2/2 tests passed, exhaustively checking each logical position for N = 1, 7, 8, 9, 15, 16, 32, including padding-bit isolation
• git diff --check

Fixes #3510