diff --git a/boards.txt b/boards.txt
index b7716c50eb..47a452a2c9 100644
--- a/boards.txt
+++ b/boards.txt
@@ -17229,6 +17229,52 @@ Phoque.menu.upload_method.OpenOCDDapLink.upload.tool=openocd_upload
 Phoque.menu.upload_method.OpenOCDDapLink.debug.server.openocd.scripts.0=interface/cmsis-dap.cfg
 Phoque.menu.upload_method.OpenOCDDapLink.debug.server.openocd.scripts.1={runtime.platform.path}/debugger/select_swd.cfg
 
+################################################################################
+# Seeed Studio
+# Docs: url=https://www.seeedstudio.com/
+Seeed_studio.name=Seeed Studio
+Seeed_studio.build.core=arduino
+Seeed_studio.build.board=Seeed_studio
+Seeed_studio.build.family=SEEED_STUDIO
+Seeed_studio.build.variant_h=variant_{build.board}.h
+Seeed_studio.build.st_extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial}
+Seeed_studio.build.flash_offset=0x0
+Seeed_studio.upload.maximum_size=0
+Seeed_studio.upload.maximum_data_size=0
+Seeed_studio.vid.0=0x2886
+Seeed_studio.pid.0=0x80C5
+
+# Seeed XIAO STM32C5
+# Docs: url=https://www.seeedstudio.com/XIAO-STM32C5-p-7011.html
+# Docs: mcu=STM32C5A3CG
+Seeed_studio.menu.pnum.XIAO_STM32C5=Seeed XIAO STM32C5
+Seeed_studio.menu.pnum.XIAO_STM32C5.upload.maximum_size=1015808
+Seeed_studio.menu.pnum.XIAO_STM32C5.upload.maximum_data_size=262144
+Seeed_studio.menu.pnum.XIAO_STM32C5.build.mcu=cortex-m33
+Seeed_studio.menu.pnum.XIAO_STM32C5.build.fpu=-mfpu=fpv5-sp-d16
+Seeed_studio.menu.pnum.XIAO_STM32C5.build.float-abi=-mfloat-abi=hard
+Seeed_studio.menu.pnum.XIAO_STM32C5.build.board=XIAO_STM32C5
+Seeed_studio.menu.pnum.XIAO_STM32C5.build.series=STM32C5xx
+Seeed_studio.menu.pnum.XIAO_STM32C5.build.product_line=STM32C5A3xx
+Seeed_studio.menu.pnum.XIAO_STM32C5.build.variant=STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)
+Seeed_studio.menu.pnum.XIAO_STM32C5.build.variant_h=variant_XIAO_STM32C5.h
+Seeed_studio.menu.pnum.XIAO_STM32C5.build.ldscript=ldscript_XIAO_STM32C5.ld
+Seeed_studio.menu.pnum.XIAO_STM32C5.build.hal=-DUSE_HALV2_DRIVER
+Seeed_studio.menu.pnum.XIAO_STM32C5.build.flash_offset=0x8000
+Seeed_studio.menu.pnum.XIAO_STM32C5.build.st_extra_flags=-D{build.product_line} -DHSE_VALUE=48000000U -DUSBD_SELF_POWERED=1 -DUSBD_MAX_POWER=50 {build.enable_usb} {build.xSerial}
+Seeed_studio.menu.pnum.XIAO_STM32C5.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32C5xx/STM32C5A3.svd
+
+# Upload menu
+Seeed_studio.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
+Seeed_studio.menu.upload_method.swdMethod.upload.protocol=swd
+Seeed_studio.menu.upload_method.swdMethod.upload.options=-a {upload.address} -m {upload.mode} -s {upload.start} -f {upload.freq} -n {upload.stlink_sn}
+Seeed_studio.menu.upload_method.swdMethod.upload.tool=stm32CubeProg
+
+Seeed_studio.menu.upload_method.jlinkMethod=STM32CubeProgrammer (J-Link)
+Seeed_studio.menu.upload_method.jlinkMethod.upload.protocol=jlink
+Seeed_studio.menu.upload_method.jlinkMethod.upload.options=-a {upload.address} -s {upload.start}
+Seeed_studio.menu.upload_method.jlinkMethod.upload.tool=stm32CubeProg
+
 ################################################################################
 # Serialx activation
 Nucleo_144.menu.xserial.generic=Enabled (generic 'Serial')
@@ -17496,6 +17542,12 @@ Phoque.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE
 Phoque.menu.xserial.disabled=Disabled (no Serial support)
 Phoque.menu.xserial.disabled.build.xSerial=
 
+Seeed_studio.menu.xserial.generic=Enabled (generic 'Serial')
+Seeed_studio.menu.xserial.none=Enabled (no generic 'Serial')
+Seeed_studio.menu.xserial.none.build.xSerial=-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE
+Seeed_studio.menu.xserial.disabled=Disabled (no Serial support)
+Seeed_studio.menu.xserial.disabled.build.xSerial=
+
 # USB connectivity
 Nucleo_144.menu.usb.none=None
 Nucleo_144.menu.usb.CDCgen=CDC (generic 'Serial' supersede U(S)ART)
@@ -17890,6 +17942,12 @@ Phoque.menu.xusb.HS.build.usb_speed=-DUSE_USB_HS
 Phoque.menu.xusb.HSFS=High Speed in Full Speed mode
 Phoque.menu.xusb.HSFS.build.usb_speed=-DUSE_USB_HS -DUSE_USB_HS_IN_FS
 
+Seeed_studio.menu.usb.CDCgen=CDC (generic 'Serial' supersede U(S)ART)
+Seeed_studio.menu.usb.CDCgen.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC
+Seeed_studio.menu.usb.none=None
+Seeed_studio.menu.usb.CDC=CDC (no generic 'Serial')
+Seeed_studio.menu.usb.CDC.build.enable_usb={build.usb_flags} -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB
+
 # Optimizations
 Nucleo_144.menu.opt.osstd=Smallest (-Os default)
 Nucleo_144.menu.opt.oslto=Smallest (-Os) with LTO
@@ -18751,6 +18809,24 @@ Phoque.menu.opt.ogstd.build.flags.optimize=-Og
 Phoque.menu.opt.o0std=No Optimization (-O0)
 Phoque.menu.opt.o0std.build.flags.optimize=-O0
 
+Seeed_studio.menu.opt.osstd=Smallest (-Os default)
+Seeed_studio.menu.opt.oslto=Smallest (-Os) with LTO
+Seeed_studio.menu.opt.oslto.build.flags.optimize=-Os -flto
+Seeed_studio.menu.opt.o1std=Fast (-O1)
+Seeed_studio.menu.opt.o1std.build.flags.optimize=-O1
+Seeed_studio.menu.opt.o1lto=Fast (-O1) with LTO
+Seeed_studio.menu.opt.o1lto.build.flags.optimize=-O1 -flto
+Seeed_studio.menu.opt.o2std=Faster (-O2)
+Seeed_studio.menu.opt.o2std.build.flags.optimize=-O2
+Seeed_studio.menu.opt.o2lto=Faster (-O2) with LTO
+Seeed_studio.menu.opt.o2lto.build.flags.optimize=-O2 -flto
+Seeed_studio.menu.opt.o3std=Fastest (-O3)
+Seeed_studio.menu.opt.o3std.build.flags.optimize=-O3
+Seeed_studio.menu.opt.o3lto=Fastest (-O3) with LTO
+Seeed_studio.menu.opt.o3lto.build.flags.optimize=-O3 -flto
+Seeed_studio.menu.opt.ogstd=Debug (-Og)
+Seeed_studio.menu.opt.ogstd.build.flags.optimize=-Og
+
 # Debug information
 Nucleo_144.menu.dbg.none=None
 Nucleo_144.menu.dbg.enable_sym=Symbols Enabled (-g)
@@ -19088,6 +19164,14 @@ Phoque.menu.dbg.enable_log.build.flags.debug=
 Phoque.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g)
 Phoque.menu.dbg.enable_all.build.flags.debug=-g
 
+Seeed_studio.menu.dbg.none=None
+Seeed_studio.menu.dbg.enable_sym=Symbols Enabled (-g)
+Seeed_studio.menu.dbg.enable_sym.build.flags.debug=-g -DNDEBUG
+Seeed_studio.menu.dbg.enable_log=Core logs Enabled
+Seeed_studio.menu.dbg.enable_log.build.flags.debug=
+Seeed_studio.menu.dbg.enable_all=Core Logs and Symbols Enabled (-g)
+Seeed_studio.menu.dbg.enable_all.build.flags.debug=-g
+
 # C Runtime Library
 Nucleo_144.menu.rtlib.nano=Newlib Nano (default)
 Nucleo_144.menu.rtlib.nanofp=Newlib Nano + Float Printf
@@ -19518,3 +19602,13 @@ Phoque.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf
 Phoque.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float
 Phoque.menu.rtlib.full=Newlib Standard
 Phoque.menu.rtlib.full.build.flags.ldspecs=
+
+Seeed_studio.menu.rtlib.nano=Newlib Nano (default)
+Seeed_studio.menu.rtlib.nanofp=Newlib Nano + Float Printf
+Seeed_studio.menu.rtlib.nanofp.build.flags.ldspecs=--specs=nano.specs -u _printf_float
+Seeed_studio.menu.rtlib.nanofs=Newlib Nano + Float Scanf
+Seeed_studio.menu.rtlib.nanofs.build.flags.ldspecs=--specs=nano.specs -u _scanf_float
+Seeed_studio.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf
+Seeed_studio.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float
+Seeed_studio.menu.rtlib.full=Newlib Standard
+Seeed_studio.menu.rtlib.full.build.flags.ldspecs=
diff --git a/docs/supported-boards/index.md b/docs/supported-boards/index.md
index 9c191f4f68..606b734b9c 100644
--- a/docs/supported-boards/index.md
+++ b/docs/supported-boards/index.md
@@ -1603,3 +1603,9 @@
 | --- | --- | --- | --- | --- |
 | Phoque 1 | [STM32G431VB](https://www.st.com/en/microcontrollers-microprocessors/stm32g431vb.html) | `PHOQUE1` | Next release | STSPIN32G4-based |
 | Phoque 2 | [STM32G431CB](https://www.st.com/en/microcontrollers-microprocessors/stm32g431cb.html) | `PHOQUE2` | Next release |  |
+
+### [Seeed Studio boards](https://www.seeedstudio.com/)
+
+| Board | STM32 MCU | `build.board` | First release | Notes |
+| --- | --- | --- | --- | --- |
+| [Seeed XIAO STM32C5](https://www.seeedstudio.com/XIAO-STM32C5-p-7011.html) | [STM32C5A3CG](https://www.st.com/en/microcontrollers-microprocessors/stm32c5a3cg.html) | `XIAO_STM32C5` | Next release |  |
diff --git a/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/ldscript_XIAO_STM32C5.ld b/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/ldscript_XIAO_STM32C5.ld
new file mode 100644
index 0000000000..44856203cb
--- /dev/null
+++ b/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/ldscript_XIAO_STM32C5.ld
@@ -0,0 +1,173 @@
+/*
+ * Copyright (c) 2026, Seeed Technology Co., Ltd.
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * The application starts after the 32 KiB TinyUF2 bootloader. Memory sizes are
+ * supplied by boards.txt through LD_MAX_SIZE and LD_MAX_DATA_SIZE.
+ */
+ENTRY(Reset_Handler)
+
+HEAP_SIZE = 0x2000;
+STACK_SIZE = 0x2000;
+
+MEMORY
+{
+  ROM (rx)  : org = 0x08000000 + LD_FLASH_OFFSET, len = LD_MAX_SIZE - LD_FLASH_OFFSET
+  RAM (xrw) : org = 0x20000000, len = LD_MAX_DATA_SIZE
+}
+
+SECTIONS
+{
+  .vectors :
+  {
+    . = ALIGN(8);
+    KEEP(*(.vectors));
+    . = ALIGN(8);
+  } > ROM
+
+  .text :
+  {
+    . = ALIGN(8);
+    *(.text);
+    *(.text*);
+    *(.glue_7);
+    *(.glue_7t);
+    *(.eh_frame);
+    KEEP(*(.init));
+    KEEP(*(.fini));
+    . = ALIGN(8);
+    _etext = .;
+  } > ROM
+
+  .rodata :
+  {
+    . = ALIGN(8);
+    *(.rodata);
+    *(.rodata*);
+    . = ALIGN(8);
+  } > ROM
+
+  .ARM.extab (READONLY) :
+  {
+    . = ALIGN(8);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(8);
+  } > ROM
+
+  .ARM (READONLY) :
+  {
+    . = ALIGN(8);
+    __exidx_start = .;
+    *(.ARM.exidx*);
+    __exidx_end = .;
+    . = ALIGN(8);
+  } > ROM
+
+  .preinit_array (READONLY) :
+  {
+    . = ALIGN(8);
+    PROVIDE_HIDDEN(__preinit_array_start = .);
+    KEEP(*(.preinit_array*));
+    PROVIDE_HIDDEN(__preinit_array_end = .);
+    . = ALIGN(8);
+  } > ROM
+
+  .init_array (READONLY) :
+  {
+    . = ALIGN(8);
+    PROVIDE_HIDDEN(__init_array_start = .);
+    KEEP(*(SORT(.init_array.*)));
+    KEEP(*(.init_array*));
+    PROVIDE_HIDDEN(__init_array_end = .);
+    . = ALIGN(8);
+  } > ROM
+
+  .fini_array (READONLY) :
+  {
+    . = ALIGN(8);
+    PROVIDE_HIDDEN(__fini_array_start = .);
+    KEEP(*(SORT(.fini_array.*)));
+    KEEP(*(.fini_array*));
+    PROVIDE_HIDDEN(__fini_array_end = .);
+    . = ALIGN(8);
+  } > ROM
+
+  .copy.table (READONLY) :
+  {
+    . = ALIGN(8);
+    __copy_table_start__ = .;
+    LONG(LOADADDR(.data));
+    LONG(ADDR(.data));
+    LONG(SIZEOF(.data) / 4);
+    __copy_table_end__ = .;
+  } > ROM
+
+  .zero.table (READONLY) :
+  {
+    . = ALIGN(8);
+    __zero_table_start__ = .;
+    LONG(ADDR(.bss));
+    LONG(SIZEOF(.bss) / 4);
+    __zero_table_end__ = .;
+  } > ROM
+
+  .data :
+  {
+    . = ALIGN(8);
+    _sidata = LOADADDR(.data);
+    __data_start__ = .;
+    _sdata = .;
+    *(.data);
+    *(.data*);
+    . = ALIGN(8);
+    _edata = .;
+  } > RAM AT> ROM
+
+  .bss :
+  {
+    . = ALIGN(8);
+    _sbss = .;
+    __bss_start__ = _sbss;
+    *(.bss);
+    *(.bss*);
+    *(COMMON);
+    . = ALIGN(8);
+    _ebss = .;
+    __bss_end__ = _ebss;
+  } > RAM
+
+  .heap (NOLOAD) :
+  {
+    . = ALIGN(8);
+    __end__ = .;
+    PROVIDE(end = .);
+    _heap_start = .;
+    . += HEAP_SIZE;
+    . = ALIGN(8);
+    _heap_end = .;
+    __HeapLimit = .;
+  } > RAM
+
+  .stack (NOLOAD) :
+  {
+    . = ALIGN(8);
+    __StackLimit = .;
+    . += STACK_SIZE;
+    . = ALIGN(8);
+    __StackTop = .;
+    _estack = .;
+    __stack = .;
+  } > RAM
+
+  /DISCARD/ :
+  {
+    libc.a(*);
+    libm.a(*);
+    libgcc.a(*);
+  }
+
+  .ARM.attributes 0 :
+  {
+    *(.ARM.attributes)
+  }
+}
diff --git a/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/variant_XIAO_STM32C5.cpp b/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/variant_XIAO_STM32C5.cpp
new file mode 100644
index 0000000000..69a1ddcf3a
--- /dev/null
+++ b/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/variant_XIAO_STM32C5.cpp
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2026, Seeed Technology Co., Ltd.
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#if defined(ARDUINO_XIAO_STM32C5)
+
+#include "pins_arduino.h"
+
+const PinName digitalPin[] = {
+  PA_0,  // D0 / A0
+  PA_1,  // D1 / A1
+  PA_2,  // D2 / A2
+  PA_3,  // D3 / A3
+  PB_7,  // D4 / I2C1_SDA
+  PB_6,  // D5 / I2C1_SCL
+  PA_9,  // D6 / USART1_TX
+  PA_10, // D7 / USART1_RX
+  PE_2,  // D8 / SPI3_SCK
+  PB_0,  // D9 / SPI3_MISO
+  PB_15, // D10 / SPI3_MOSI
+  PB_8,  // D11 / FDCAN1_RX
+  PB_9,  // D12 / FDCAN1_TX
+  PB_5,  // D13 / FDCAN2_RX
+  PB_13, // D14 / FDCAN2_TX
+  NC,    // D15: unused, header net renamed D15 -> D18
+  NC,    // D16: unused
+  NC,    // D17: unused
+  PB_14, // D18 / CAN_STB (formerly D15)
+  PB_12, // D19 / Board LED, active low
+  PB_3,  // D20 / Onboard IMU / I2C2_SCL
+  PB_4,  // D21 / Onboard IMU / I2C2_SDA
+  PC_13, // D22 / Onboard IMU / INT1
+  PA_8,  // D23 / Onboard IMU heater / TIM1_CH1
+  PH_2   // D24 / BOOT0 / user button (active low)
+};
+
+const pin_size_t analogInputPin[] = {
+  D0,
+  D1,
+  D2,
+  D3
+};
+
+extern "C" void SystemClock_Config(void)
+{
+  if (HAL_RCC_HSE_Enable(HAL_RCC_HSE_ON) != HAL_OK) {
+    Error_Handler();
+  }
+
+  hal_rcc_psi_config_t psi_config;
+  psi_config.psi_source = HAL_RCC_PSI_SRC_HSE;
+  psi_config.psi_ref = HAL_RCC_PSI_REF_48MHZ;
+  psi_config.psi_out = HAL_RCC_PSI_OUT_144MHZ;
+  if (HAL_RCC_PSI_SetConfig(&psi_config) != HAL_OK) {
+    Error_Handler();
+  }
+  if (HAL_RCC_PSIS_Enable() != HAL_OK) {
+    Error_Handler();
+  }
+
+  hal_rcc_bus_clk_config_t bus_config;
+  bus_config.hclk_prescaler = HAL_RCC_HCLK_PRESCALER1;
+  bus_config.pclk1_prescaler = HAL_RCC_PCLK_PRESCALER2;
+  bus_config.pclk2_prescaler = HAL_RCC_PCLK_PRESCALER2;
+  bus_config.pclk3_prescaler = HAL_RCC_PCLK_PRESCALER2;
+  if (HAL_RCC_SetBusClockConfig(&bus_config) != HAL_OK) {
+    Error_Handler();
+  }
+
+  HAL_FLASH_ITF_SetLatency(HAL_FLASH, HAL_FLASH_ITF_LATENCY_4);
+  if (HAL_RCC_SetSYSCLKSource(HAL_RCC_SYSCLK_SRC_PSIS) != HAL_OK) {
+    Error_Handler();
+  }
+  HAL_FLASH_ITF_SetProgrammingDelay(HAL_FLASH, HAL_FLASH_ITF_PROGRAM_DELAY_2);
+  if (HAL_RCC_CK48_SetKernelClkSource(HAL_RCC_CK48_CLK_SRC_HSE) != HAL_OK) {
+    Error_Handler();
+  }
+  if (HAL_UpdateCoreClock() != HAL_OK) {
+    Error_Handler();
+  }
+}
+
+void initVariant(void)
+{
+  /* CAN_STB is active high. Keep the onboard transceiver out of standby. */
+  pinMode(D18, OUTPUT);
+  digitalWrite(D18, LOW);
+}
+
+#endif /* ARDUINO_XIAO_STM32C5 */
diff --git a/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/variant_XIAO_STM32C5.h b/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/variant_XIAO_STM32C5.h
new file mode 100644
index 0000000000..6cd26b7aef
--- /dev/null
+++ b/variants/STM32C5xx/C593C(E-G)(T-U)_C5A3CG(T-U)/variant_XIAO_STM32C5.h
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2026, Seeed Technology Co., Ltd.
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+#pragma once
+
+/* XIAO connector pin numbers. */
+#define PA0                     PIN_A0
+#define PA1                     PIN_A1
+#define PA2                     PIN_A2
+#define PA3                     PIN_A3
+#define PB7                     4
+#define PB6                     5
+#define PA9                     6
+#define PA10                    7
+#define PE2                     8
+#define PB0                     9
+#define PB15                    10
+#define PB8                     11
+#define PB9                     12
+#define PB5                     13
+#define PB13                    14
+
+/* PB14 is the XIAO D18 pad (CAN_STB). The board re-spin renamed the header
+ * net and silkscreen from D15 to D18. Pin numbers 15-17 are left unused
+ * (NC in digitalPin[]) so the Arduino numbering matches the silkscreen
+ * D0-D14 and D18. */
+#define PB14                    18
+
+/* Board-only pins: they follow the XIAO connector pins in digitalPin[]. */
+#define PB12                    19
+#define PIN_IMU_SCL             20  // PB3 / I2C2_SCL
+#define PIN_IMU_SDA             21  // PB4 / I2C2_SDA
+#define PIN_IMU_INT1            22  // PC13 / LSM6DS3TR-C INT1
+#define PIN_IMU_HEATER          23  // PA8 / TIM1_CH1
+#define PH2                     24  // BOOT0 / user button
+
+/* Alternate functions used by the default board peripherals. */
+#define PA9_ALT1                (PA9 | ALT1)
+#define PA10_ALT1               (PA10 | ALT1)
+#define PB15_ALT2               (PB15 | ALT2)
+
+#define NUM_DIGITAL_PINS        25
+#define NUM_ANALOG_INPUTS       4
+
+#ifndef LED_BUILTIN
+  #define LED_BUILTIN           PB12
+#endif
+
+// On-board user button. The physical button is active low and is also
+// connected to the MCU BOOT0/PH2 pin.
+#define B1_BTN                  PH2
+#ifndef USER_BTN
+  #define USER_BTN              B1_BTN
+#endif
+
+/* SPI3: D8/SCK (PE2), D9/MISO (PB0), D10/MOSI (PB15).
+ * No board-default chip-select is assigned; sketches control device CS. */
+#define PIN_SPI_SS              PNUM_NOT_DEFINED
+#define PIN_SPI_SS1             PNUM_NOT_DEFINED
+#define PIN_SPI_SS2             PNUM_NOT_DEFINED
+#define PIN_SPI_SS3             PNUM_NOT_DEFINED
+#define PIN_SPI_MOSI            PB15_ALT2
+#define PIN_SPI_MISO            PB0
+#define PIN_SPI_SCK             PE2
+
+#define PIN_WIRE_SDA            PB7
+#define PIN_WIRE_SCL            PB6
+
+#define TIMER_TONE              TIM16
+#define TIMER_SERVO             TIM17
+
+/* Serial is USB CDC when enabled. Serial1 is the connector UART on D6/D7. */
+#define SERIAL_UART_INSTANCE    1
+#define PIN_SERIAL_TX           PA9_ALT1
+#define PIN_SERIAL_RX           PA10_ALT1
+
+#ifndef HSE_VALUE
+  #define HSE_VALUE             48000000U
+#endif
+
+/* USBDevice includes the selected variant, so these remain board-owned
+ * descriptor strings without adding quoted compiler flags to every recipe. */
+#ifndef USB_MANUFACTURER_STRING
+  #define USB_MANUFACTURER_STRING "Seeed Studio"
+#endif
+#ifndef USB_PRODUCT_STRING
+  #define USB_PRODUCT_STRING      "XIAO STM32C5"
+#endif
+
+#ifdef __cplusplus
+  #ifndef SERIAL_PORT_MONITOR
+    #define SERIAL_PORT_MONITOR       Serial
+  #endif
+  #ifndef SERIAL_PORT_USBVIRTUAL
+    #define SERIAL_PORT_USBVIRTUAL    Serial
+  #endif
+  #ifndef SERIAL_PORT_HARDWARE
+    #define SERIAL_PORT_HARDWARE      Serial1
+  #endif
+  #ifndef SERIAL_PORT_HARDWARE_OPEN
+    #define SERIAL_PORT_HARDWARE_OPEN Serial1
+  #endif
+#endif