From 9077924b41b684b7b0a3f42b5076c6795e5fc27c Mon Sep 17 00:00:00 2001 From: Ziyue Zhang Date: Mon, 10 Aug 2026 19:27:32 +0800 Subject: [PATCH 1/4] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add vdda-refgen and refgen supply properties QCS8300 and SA8775p PCIe PHYs require dedicated vdda-refgen and refgen LDO supplies for QREF to provide a stable reference clock. Without these supplies, the PCIe PHYs cannot work properly. Mark them as required for the affected compatibles even though it breaks ABI. vdda-refgen-supply is required for all three QCS8300 and SA8775p PHY compatibles. refgen-supply is required for QCS8300 only, as a workaround for a hardware issue where QREF actually depends on refgen3 rather than refgen2 as documented, so the PHY driver votes for refgen3 directly via this supply. Signed-off-by: Ziyue Zhang --- .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index eee7b46cc4c9b..d71b6f3397e47 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -89,6 +89,11 @@ properties: vdda-qref-supply: true + vdda-refgen-supply: true + + # Only required on platforms where the hardware voting doesn't work properly + refgen-supply: true + qcom,4ln-config-sel: description: PCIe 4-lane configuration $ref: /schemas/types.yaml#/definitions/phandle-array @@ -237,6 +242,28 @@ allOf: "#clock-cells": const: 0 + - if: + properties: + compatible: + contains: + enum: + - qcom,qcs8300-qmp-gen4x2-pcie-phy + - qcom,sa8775p-qmp-gen4x2-pcie-phy + - qcom,sa8775p-qmp-gen4x4-pcie-phy + then: + required: + - vdda-refgen-supply + + - if: + properties: + compatible: + contains: + enum: + - qcom,qcs8300-qmp-gen4x2-pcie-phy + then: + required: + - refgen-supply + examples: - | #include From 122dba0e1f69fb242578a6bbab3076cd99cfe8b8 Mon Sep 17 00:00:00 2001 From: Ziyue Zhang Date: Mon, 10 Aug 2026 19:27:33 +0800 Subject: [PATCH 2/4] phy: qcom: qmp-pcie: Add qref and refgen regulator vote for QCS8300 and SA8775p PHY Add a new sa8775p_qmp_phy_vreg_l that includes vdda-phy, vdda-pll, vdda-qref, vdda-refgen and refgen supplies, and use it for QCS8300 and SA8775p PCIe PHY configurations. This avoids modifying sm8550_qmp_phy_vreg_l and breaking SM8550 and SM8650. Note that due to a hardware issue, QREF actually depends on refgen3 rather than refgen2 as documented; refgen3 is therefore voted manually via the refgen supply as a workaround. Fixes: a05b6d5135ec ("phy: qcom-qmp-pcie: add support for sa8775p") Fixes: ebf198f17b5a ("phy: qcom-qmp-pcie: add dual lane PHY support for QCS8300") Signed-off-by: Ziyue Zhang --- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index 6c422ed706e99..32601e73ffb2f 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -3280,6 +3280,10 @@ static const char * const sm8550_qmp_phy_vreg_l[] = { "vdda-phy", "vdda-pll", "vdda-qref", }; +static const char * const sa8775p_qmp_phy_vreg_l[] = { + "vdda-phy", "vdda-pll", "vdda-qref", "vdda-refgen", "refgen", +}; + /* list of resets */ static const char * const ipq8074_pciephy_reset_l[] = { "phy", "common", @@ -4142,8 +4146,8 @@ static const struct qmp_phy_cfg sm8450_qmp_gen3x1_pciephy_cfg = { .reset_list = sdm845_pciephy_reset_l, .num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l), - .vreg_list = qmp_phy_vreg_l, - .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .vreg_list = sa8775p_qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(sa8775p_qmp_phy_vreg_l), .regs = pciephy_v5_regs_layout, .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, @@ -4184,8 +4188,8 @@ static const struct qmp_phy_cfg sm8450_qmp_gen4x2_pciephy_cfg = { .reset_list = sdm845_pciephy_reset_l, .num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l), - .vreg_list = qmp_phy_vreg_l, - .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .vreg_list = sa8775p_qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(sa8775p_qmp_phy_vreg_l), .regs = pciephy_v5_regs_layout, .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, @@ -4353,8 +4357,8 @@ static const struct qmp_phy_cfg sa8775p_qmp_gen4x2_pciephy_cfg = { .reset_list = sdm845_pciephy_reset_l, .num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l), - .vreg_list = qmp_phy_vreg_l, - .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .vreg_list = sa8775p_qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(sa8775p_qmp_phy_vreg_l), .regs = pciephy_v5_regs_layout, .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, From 1539e3e73bc0927a90a580bb5ebf2749468665fb Mon Sep 17 00:00:00 2001 From: Ziyue Zhang Date: Thu, 13 Aug 2026 13:50:15 +0800 Subject: [PATCH 3/4] FROMLIST: arm64: dts: qcom: qcs8300: Add qref and refgen supply for PCIe PHYs The QMP PCIe PHYs on QCS8300 require dedicated qref and refgen voltage supplies for stable operation. Without these supplies, the system may occasionally crash. Add vdda-qref-supply and vdda-refgen-supply in the board files (QCS8300-RIDE, Monaco-EVK and Monaco-Monza-SoM), and add refgen-supply in the SoC DTSI (monaco.dtsi) since refgen is an on-chip regulator shared across boards. The PHY driver votes for refgen3 directly as a workaround for a hardware issue where QREF actually depends on refgen3 rather than refgen2 as documented. [adaptation: monaco-evk.dts PCIe PHY nodes are in monaco-evk-common.dtsi in this branch; monaco-monza-som.dtsi absent, skipped] Fixes: 33967eadb215 ("arm64: dts: qcom: qcs8300-ride: enable pcie0 interface") Fixes: cdb613a84527 ("arm64: dts: qcom: qcs8300-ride: enable pcie1 interface") Fixes: 41e2424651f7 ("arm64: dts: qcom: monaco-evk: Enable PCIe0 and PCIe1.") Fixes: 5238f4e7169f ("arm64: dts: qcom: Add Monaco Monza SoM") Link: https://lore.kernel.org/r/20260810112735.1326807-4-ziyue.zhang@oss.qualcomm.com Signed-off-by: Ziyue Zhang Signed-off-by: Ziyue Zhang --- arch/arm64/boot/dts/qcom/monaco-evk-common.dtsi | 2 ++ arch/arm64/boot/dts/qcom/monaco.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 2 ++ 3 files changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/monaco-evk-common.dtsi b/arch/arm64/boot/dts/qcom/monaco-evk-common.dtsi index 2434d1f9f58ba..acf7291f98507 100644 --- a/arch/arm64/boot/dts/qcom/monaco-evk-common.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco-evk-common.dtsi @@ -713,6 +713,7 @@ vdda-phy-supply = <&vreg_l6a>; vdda-pll-supply = <&vreg_l5a>; vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; @@ -728,6 +729,7 @@ vdda-phy-supply = <&vreg_l6a>; vdda-pll-supply = <&vreg_l5a>; vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi index 0ca7266aa175a..1502c68ad1730 100644 --- a/arch/arm64/boot/dts/qcom/monaco.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi @@ -2490,6 +2490,8 @@ #phy-cells = <0>; + refgen-supply = <&refgen>; + status = "disabled"; }; @@ -2619,6 +2621,8 @@ #phy-cells = <0>; + refgen-supply = <&refgen>; + status = "disabled"; }; diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts index 4e2fb94a147c5..1898a93d6c95b 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts @@ -604,6 +604,7 @@ vdda-phy-supply = <&vreg_l6a>; vdda-pll-supply = <&vreg_l5a>; vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; @@ -624,6 +625,7 @@ vdda-phy-supply = <&vreg_l6a>; vdda-pll-supply = <&vreg_l5a>; vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; From f46960cbb7da1e628aac206aba01b217071d9db2 Mon Sep 17 00:00:00 2001 From: Ziyue Zhang Date: Thu, 13 Aug 2026 13:50:28 +0800 Subject: [PATCH 4/4] FROMLIST: arm64: dts: qcom: sa8775p: Add qref and refgen supply for PCIe PHYs The QMP PCIe PHYs on SA8775p require dedicated qref and refgen voltage supplies for stable operation. Without these supplies, the system may occasionally crash. Add vdda-qref-supply and vdda-refgen-supply in the board files (Lemans-EVK, Lemans-RIDE, QCS9100-RIDE and QCS9100-RIDE-R3). Fixes: 94d7d37f6ac3 ("arm64: dts: qcom: lemans-evk: Enable PCIe support") Fixes: 76326da895b8 ("arm64: dts: qcom: lemans: Refactor ride/ride-r3 boards based on daughter cards") Link: https://lore.kernel.org/r/20260810112735.1326807-5-ziyue.zhang@oss.qualcomm.com Signed-off-by: Ziyue Zhang Signed-off-by: Ziyue Zhang --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 4 ++++ arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts | 8 ++++++++ arch/arm64/boot/dts/qcom/qcs9100-ride.dts | 8 ++++++++ 4 files changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index 27d3a01ab1f40..8db79cbcd83e9 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -878,6 +878,8 @@ &pcie0_phy { vdda-phy-supply = <&vreg_l5a>; vdda-pll-supply = <&vreg_l1c>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; @@ -895,6 +897,8 @@ &pcie1_phy { vdda-phy-supply = <&vreg_l5a>; vdda-pll-supply = <&vreg_l1c>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi b/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi index d66b33a1812ca..23070ce43c460 100644 --- a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi @@ -990,6 +990,8 @@ &pcie0_phy { vdda-phy-supply = <&vreg_l5a>; vdda-pll-supply = <&vreg_l1c>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; @@ -997,6 +999,8 @@ &pcie1_phy { vdda-phy-supply = <&vreg_l5a>; vdda-pll-supply = <&vreg_l1c>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts index 7fc2de0d3d5e2..1b6a4f9cb8f7e 100644 --- a/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts +++ b/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts @@ -14,3 +14,11 @@ model = "Qualcomm Technologies, Inc. Lemans Ride Rev3"; compatible = "qcom,qcs9100-ride-r3", "qcom,qcs9100", "qcom,sa8775p"; }; + +&pcie0_phy { + vdda-refgen-supply = <&vreg_l7a>; +}; + +&pcie1_phy { + vdda-refgen-supply = <&vreg_l7a>; +}; diff --git a/arch/arm64/boot/dts/qcom/qcs9100-ride.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts index b0c5fdde56aea..cc15025fdbc1a 100644 --- a/arch/arm64/boot/dts/qcom/qcs9100-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts @@ -14,3 +14,11 @@ model = "Qualcomm Technologies, Inc. Lemans Ride"; compatible = "qcom,qcs9100-ride", "qcom,qcs9100", "qcom,sa8775p"; }; + +&pcie0_phy { + vdda-refgen-supply = <&vreg_l7a>; +}; + +&pcie1_phy { + vdda-refgen-supply = <&vreg_l7a>; +};