From 94efc4430b8a3830abe77bdde1747df5b5ee1423 Mon Sep 17 00:00:00 2001 From: Ziyue Zhang Date: Mon, 10 Aug 2026 19:27:32 +0800 Subject: [PATCH 1/4] FROMLIST: dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add vdda-refgen and refgen supply properties QCS8300 and SA8775p PCIe PHYs require dedicated vdda-refgen and refgen LDO supplies for QREF to provide a stable reference clock. Without these supplies, the PCIe PHYs cannot work properly. Mark them as required for the affected compatibles even though it breaks ABI. vdda-refgen-supply is required for all three QCS8300 and SA8775p PHY compatibles. refgen-supply is required for QCS8300 only, as a workaround for a hardware issue where QREF actually depends on refgen3 rather than refgen2 as documented, so the PHY driver votes for refgen3 directly via this supply. Link: https://lore.kernel.org/r/20260810112735.1326807-2-ziyue.zhang@oss.qualcomm.com Signed-off-by: Ziyue Zhang --- .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index 108cf9dc86ea0..ebf288ff8ee10 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -91,6 +91,11 @@ properties: vdda-qref-supply: true + vdda-refgen-supply: true + + # Only required on platforms where the hardware voting doesn't work properly + refgen-supply: true + qcom,4ln-config-sel: description: PCIe 4-lane configuration $ref: /schemas/types.yaml#/definitions/phandle-array @@ -261,6 +266,28 @@ allOf: "#clock-cells": const: 0 + - if: + properties: + compatible: + contains: + enum: + - qcom,qcs8300-qmp-gen4x2-pcie-phy + - qcom,sa8775p-qmp-gen4x2-pcie-phy + - qcom,sa8775p-qmp-gen4x4-pcie-phy + then: + required: + - vdda-refgen-supply + + - if: + properties: + compatible: + contains: + enum: + - qcom,qcs8300-qmp-gen4x2-pcie-phy + then: + required: + - refgen-supply + examples: - | #include From 0647d18e31ca5c2ae3d875c32394a652e29b746e Mon Sep 17 00:00:00 2001 From: Ziyue Zhang Date: Mon, 10 Aug 2026 19:27:33 +0800 Subject: [PATCH 2/4] FROMLIST: phy: qcom: qmp-pcie: Add qref and refgen regulator vote for QCS8300 and SA8775p PHY Add a new sa8775p_qmp_phy_vreg_l that includes vdda-phy, vdda-pll, vdda-qref, vdda-refgen and refgen supplies, and use it for QCS8300 and SA8775p PCIe PHY configurations. This avoids modifying sm8550_qmp_phy_vreg_l and breaking SM8550 and SM8650. Note that due to a hardware issue, QREF actually depends on refgen3 rather than refgen2 as documented; refgen3 is therefore voted manually via the refgen supply as a workaround. Fixes: a05b6d5135ec ("phy: qcom-qmp-pcie: add support for sa8775p") Fixes: ebf198f17b5a ("phy: qcom-qmp-pcie: add dual lane PHY support for QCS8300") Link: https://lore.kernel.org/r/20260810112735.1326807-3-ziyue.zhang@oss.qualcomm.com Signed-off-by: Ziyue Zhang --- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index d3effad7a074b..b60fee762dabe 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -3488,6 +3488,10 @@ static const char * const sm8550_qmp_phy_vreg_l[] = { "vdda-phy", "vdda-pll", "vdda-qref", }; +static const char * const sa8775p_qmp_phy_vreg_l[] = { + "vdda-phy", "vdda-pll", "vdda-qref", "vdda-refgen", "refgen", +}; + /* list of resets */ static const char * const ipq8074_pciephy_reset_l[] = { "phy", "common", @@ -4394,8 +4398,8 @@ static const struct qmp_phy_cfg sm8450_qmp_gen4x2_pciephy_cfg = { .reset_list = sdm845_pciephy_reset_l, .num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l), - .vreg_list = qmp_phy_vreg_l, - .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .vreg_list = sa8775p_qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(sa8775p_qmp_phy_vreg_l), .regs = pciephy_v5_regs_layout, .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, @@ -4563,8 +4567,8 @@ static const struct qmp_phy_cfg sa8775p_qmp_gen4x2_pciephy_cfg = { .reset_list = sdm845_pciephy_reset_l, .num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l), - .vreg_list = qmp_phy_vreg_l, - .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .vreg_list = sa8775p_qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(sa8775p_qmp_phy_vreg_l), .regs = pciephy_v5_regs_layout, .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, @@ -4604,8 +4608,8 @@ static const struct qmp_phy_cfg sa8775p_qmp_gen4x4_pciephy_cfg = { .reset_list = sdm845_pciephy_reset_l, .num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l), - .vreg_list = qmp_phy_vreg_l, - .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .vreg_list = sa8775p_qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(sa8775p_qmp_phy_vreg_l), .regs = pciephy_v5_regs_layout, .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, From 4b3ffe240b36fb67f3b2622ea4a04576348a79c9 Mon Sep 17 00:00:00 2001 From: Ziyue Zhang Date: Mon, 10 Aug 2026 19:27:34 +0800 Subject: [PATCH 3/4] FROMLIST: arm64: dts: qcom: qcs8300: Add qref and refgen supply for PCIe PHYs The QMP PCIe PHYs on QCS8300 require dedicated qref and refgen voltage supplies for stable operation. Without these supplies, the system may occasionally crash. Add vdda-qref-supply and vdda-refgen-supply in the board files (QCS8300-RIDE, Monaco-EVK and Monaco-Monza-SoM), and add refgen-supply in the SoC DTSI (monaco.dtsi) since refgen is an on-chip regulator shared across boards. The PHY driver votes for refgen3 directly as a workaround for a hardware issue where QREF actually depends on refgen3 rather than refgen2 as documented. Fixes: 33967eadb215 ("arm64: dts: qcom: qcs8300-ride: enable pcie0 interface") Fixes: cdb613a84527 ("arm64: dts: qcom: qcs8300-ride: enable pcie1 interface") Fixes: 41e2424651f7 ("arm64: dts: qcom: monaco-evk: Enable PCIe0 and PCIe1.") Fixes: 5238f4e7169f ("arm64: dts: qcom: Add Monaco Monza SoM") Link: https://lore.kernel.org/r/20260810112735.1326807-4-ziyue.zhang@oss.qualcomm.com Signed-off-by: Ziyue Zhang --- arch/arm64/boot/dts/qcom/monaco-evk.dts | 4 ++++ arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/monaco.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/qcom/monaco-evk.dts index b30fc7ecdf32e..df0e78a30a43c 100644 --- a/arch/arm64/boot/dts/qcom/monaco-evk.dts +++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts @@ -623,6 +623,8 @@ &pcie0_phy { vdda-phy-supply = <&vreg_l6a>; vdda-pll-supply = <&vreg_l5a>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; @@ -637,6 +639,8 @@ &pcie1_phy { vdda-phy-supply = <&vreg_l6a>; vdda-pll-supply = <&vreg_l5a>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi index 9b5ed55939b86..7012ed5e12328 100644 --- a/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco-monza-som.dtsi @@ -211,6 +211,8 @@ &pcie0_phy { vdda-phy-supply = <&vreg_l6a>; vdda-pll-supply = <&vreg_l5a>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; @@ -223,6 +225,8 @@ &pcie1_phy { vdda-phy-supply = <&vreg_l6a>; vdda-pll-supply = <&vreg_l5a>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi index e4c8466f941bd..cd320a24b0cf7 100644 --- a/arch/arm64/boot/dts/qcom/monaco.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi @@ -2452,6 +2452,8 @@ #phy-cells = <0>; + refgen-supply = <&refgen>; + status = "disabled"; }; @@ -2643,6 +2645,8 @@ #phy-cells = <0>; + refgen-supply = <&refgen>; + status = "disabled"; }; diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts index f9891fbcca90c..ebb9059af239e 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts @@ -638,6 +638,8 @@ &pcie0_phy { vdda-phy-supply = <&vreg_l6a>; vdda-pll-supply = <&vreg_l5a>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; @@ -657,6 +659,8 @@ &pcie1_phy { vdda-phy-supply = <&vreg_l6a>; vdda-pll-supply = <&vreg_l5a>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; From c02816dc5e2d02989c3a2330496c12648d6d2a6a Mon Sep 17 00:00:00 2001 From: Ziyue Zhang Date: Mon, 10 Aug 2026 19:27:35 +0800 Subject: [PATCH 4/4] FROMLIST: arm64: dts: qcom: sa8775p: Add qref and refgen supply for PCIe PHYs The QMP PCIe PHYs on SA8775p require dedicated qref and refgen voltage supplies for stable operation. Without these supplies, the system may occasionally crash. Add vdda-qref-supply and vdda-refgen-supply in the board files (Lemans-EVK, Lemans-RIDE, QCS9100-RIDE and QCS9100-RIDE-R3). Fixes: 94d7d37f6ac3 ("arm64: dts: qcom: lemans-evk: Enable PCIe support") Fixes: 76326da895b8 ("arm64: dts: qcom: lemans: Refactor ride/ride-r3 boards based on daughter cards") Link: https://lore.kernel.org/r/20260810112735.1326807-5-ziyue.zhang@oss.qualcomm.com Signed-off-by: Ziyue Zhang --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 4 ++++ arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts | 8 ++++++++ arch/arm64/boot/dts/qcom/qcs9100-ride.dts | 8 ++++++++ 4 files changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index 0db0e8005a825..86111084030b5 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -723,6 +723,8 @@ &pcie0_phy { vdda-phy-supply = <&vreg_l5a>; vdda-pll-supply = <&vreg_l1c>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; @@ -742,6 +744,8 @@ &pcie1_phy { vdda-phy-supply = <&vreg_l5a>; vdda-pll-supply = <&vreg_l1c>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi b/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi index 3e61417cab751..8db77da7adb4b 100644 --- a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi @@ -987,6 +987,8 @@ &pcie0_phy { vdda-phy-supply = <&vreg_l5a>; vdda-pll-supply = <&vreg_l1c>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; @@ -994,6 +996,8 @@ &pcie1_phy { vdda-phy-supply = <&vreg_l5a>; vdda-pll-supply = <&vreg_l1c>; + vdda-qref-supply = <&vreg_l4a>; + vdda-refgen-supply = <&vreg_l7a>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts index 7fc2de0d3d5e2..1b6a4f9cb8f7e 100644 --- a/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts +++ b/arch/arm64/boot/dts/qcom/qcs9100-ride-r3.dts @@ -14,3 +14,11 @@ model = "Qualcomm Technologies, Inc. Lemans Ride Rev3"; compatible = "qcom,qcs9100-ride-r3", "qcom,qcs9100", "qcom,sa8775p"; }; + +&pcie0_phy { + vdda-refgen-supply = <&vreg_l7a>; +}; + +&pcie1_phy { + vdda-refgen-supply = <&vreg_l7a>; +}; diff --git a/arch/arm64/boot/dts/qcom/qcs9100-ride.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts index b0c5fdde56aea..cc15025fdbc1a 100644 --- a/arch/arm64/boot/dts/qcom/qcs9100-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts @@ -14,3 +14,11 @@ model = "Qualcomm Technologies, Inc. Lemans Ride"; compatible = "qcom,qcs9100-ride", "qcom,qcs9100", "qcom,sa8775p"; }; + +&pcie0_phy { + vdda-refgen-supply = <&vreg_l7a>; +}; + +&pcie1_phy { + vdda-refgen-supply = <&vreg_l7a>; +};