Local synthesis identifies fetch FIFO payload/error updates on the
taken-branch redirect path. Qualifying their enables with !clear_i
improves arrival time from 2.89 ns to 2.77 ns at a measured 0.44% area
cost.
The change has passed directed clear/push/pop testing, Ibex hello_test,
and a standalone SymbiYosys/Z3 proof.
Would this timing/area tradeoff and implementation-level payload
stability behavior be considered appropriate for an upstream RTL change?
Local synthesis identifies fetch FIFO payload/error updates on the
taken-branch redirect path. Qualifying their enables with
!clear_iimproves arrival time from 2.89 ns to 2.77 ns at a measured 0.44% area
cost.
The change has passed directed clear/push/pop testing, Ibex hello_test,
and a standalone SymbiYosys/Z3 proof.
Would this timing/area tradeoff and implementation-level payload
stability behavior be considered appropriate for an upstream RTL change?