+Shortcut
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| IC Vendors | Intel, Qualcomm, Nvidia, Samsung, AMD, MediaTek, IBM, Marvell, Broadcom |
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| Startups |
- Cerebras, Graphcore, Tenstorrent, Etched, Groq, SambaNova, d-Matrix, Furiosa AI, … (full list in section IV) |
+ Cerebras, Graphcore, Tenstorrent, Etched, Groq, SambaNova, Mythic, Hailo, FuriosaAI, d-Matrix, SiMa, … (full list in section IV) |
| China AI Accelerators |
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GPU
NVIDIA Kicks Off the Next Generation of AI With Rubin
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Kicking off another busy Spring GPU Technology Conference for NVIDIA, this morning the graphics and accelerator designer is announcing that they are going to once again design their own Arm-based CPU/SoC. Dubbed Grace – after Grace Hopper, the computer programming pioneer and US Navy rear admiral – the CPU is NVIDIA’s latest stab at more fully vertically integrating their hardware stack by being able to offer a high-performance CPU alongside their regular GPU wares. According to NVIDIA, the chip is being designed specifically for large-scale neural network workloads, and is expected to become available in NVIDIA products in 2023.
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Mobileye EyeQ
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The primary motivation to create this new training instance class was presented by Andy Jassy in the 2020 re:Invent: “To provide our end-customers with up to 40% better price-performance than the current generation of GPU-based instances.”
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Snapdragon 8 Elite — Hexagon NPU for on-device GenAI
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The Qualcomm Cloud AI 100, designed for AI inference acceleration, addresses unique requirements in the cloud, including power efficiency, scale, process node advancements, and signal processing—facilitating the ability of datacenters to run inference on the edge cloud faster and more efficiently. Qualcomm Cloud AI 100 is designed to be a leading solution for datacenters who increasingly rely on infrastructure at the edge-cloud.
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Samsung Exynos 2500
Flagship mobile SoC on Samsung 3nm GAA process with a substantially upgraded NPU (Samsung cites up to ~59 TOPS and ~39% better on-device AI vs. Exynos 2400) for generative AI and privacy-preserving on-device inference.
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Earlier on-device AI messaging around Exynos 9820 / 9810-era NPU features for AR/VR and mobile deep learning.
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MediaTek Dimensity 9400 — 8th Gen NPU for agentic AI
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Dimensity 9400 product page
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AMD Instinct™ MI350 Series GPUs
Built on 4th Gen AMD CDNA™ architecture, MI350X / MI355X deliver large HBM3E capacity (up to 288GB) and high bandwidth for generative AI training and inference, with expanded low-precision datatype support (including MXFP6 / MXFP4). MI400-series / Helios rack-scale systems are on AMD’s 2026 roadmap.
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Meet the IBM Artificial Intelligence Unit
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"The IBM Research AI Hardware Center is a global research hub headquartered in Albany, New York. The center is focused on enabling next-generation chips and systems that support the tremendous processing power and unprecedented speed that AI requires to realize its full potential.
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Custom AI ASICs + DPUs
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Marvell’s OCTEON™, OCTEON™ Fusion and ARMADA® platforms target wireless infrastructure, carrier networks, enterprise and cloud data centers.
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Broadcom
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Broadcom co-designs customer-specific AI accelerators (XPUs) and pairs them with Tomahawk / Jericho Ethernet switching — a long-running model that began with Google TPU generations and now spans multiple frontier labs and cloud providers.
-II. Tech Giants & HPC Vendors
+II. Tech Giants & HPC Vendors
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Introducing Trillium, sixth-generation TPUs
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脉动阵列 - 因Google TPU获得新生
Should We All Embrace Systolic Arrays?
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Amazon EC2 Trn2 Instances and Trn2 UltraServers
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AWS Inferentia provides high throughput, low latency inference performance at an extremely low cost. Each chip provides hundreds of TOPS (tera operations per second) of inference throughput to allow complex models to make fast predictions. For even more performance, multiple AWS Inferentia chips can be used together to drive thousands of TOPS of throughput. AWS Inferentia will be available for use with Amazon SageMaker, Amazon EC2, and Amazon Elastic Inference.
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Azure Maia for the era of AI: From silicon to software to systems
Microsoft’s first in-house AI accelerator, Azure Maia 100 (5nm, advanced packaging), is co-designed for Azure AI / Copilot-class cloud workloads, with a software stack integrating PyTorch and ONNX Runtime.
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OpenAI
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OpenAI–Broadcom 10 GW accelerator collaboration
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Anthropic
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TechCrunch: Anthropic ups compute deal with Google and Broadcom ·
CNBC: Oct 2025 Google TPU cloud deal
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Apple unleashes M5, the next big leap in AI performance for Apple silicon
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May 2024 — M4 Neural Engine up to ~38 TOPS, with CPU ML accelerators and high-bandwidth unified memory for on-device AI on iPad Pro and later Macs.
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Alibaba Unveils Own AI Chip, Mounting Direct Challenge to Nvidia
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Pingtouge / T-Head’s first AI inference ASIC, highlighted for high images-per-second inference throughput at Apsara Conference 2019.
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Tencent reveals three data center chips - for AI, video transcoding, and networking
The company claims that the Zixiao AI chip is twice as good as comparable competing products, video transcoding chip Canghai was 30 percent better, and SmartNIC Xuanling was apparently four times as good. It did not provide external benchmarks or specific product details.
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Baidu Kunlun / Kunlunxin AI accelerators
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Early mass-production milestone for Baidu’s second-generation Kunlun AI chips.
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This DLU that Fujitsu is creating is done from scratch, and it is not based on either the Sparc or ARM instruction set and, in fact, it has its own instruction set and a new data format specifically for deep learning, which were created from scratch.
Japanese computing giant Fujitsu. Which knows a thing or two about making a very efficient and highly scalable system for HPC workloads, as evidenced by the K supercomputer, does not believe that the HPC and AI architectures will converge. Rather, the company is banking on the fact that these architectures will diverge and will require very specialized functions.
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Nokia has developed the ReefShark chipsets for its 5G network solutions. AI is implemented in the ReefShark design for radio and embedded in the baseband to use augmented deep learning to trigger smart, rapid actions by the autonomous, cognitive network, enhancing network optimization and increasing business opportunities.
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Our next generation Meta Training and Inference Accelerator (MTIA)
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Early reporting on Meta/Facebook’s in-house ML chip efforts for recommendation workloads.
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+Tesla AI5 chip taped out
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+ Apr 2026 — Elon Musk announced Tesla’s next-generation AI5 inference/training SoC has taped out, with AI6 / Dojo3 also mentioned as in progress. Volume production and broad vehicle deployment remain gated (reports point to mid–late 2027+); near-term vehicles continue on AI4 / interim upgrades, while AI5 is also positioned for Optimus and internal clusters.
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+
+TrendForce: Samsung foundry path for AI5 / Taylor 2nm messaging
-Tesla’s Biggest News At AI Day Was The Dojo Supercomputer, Not The Optimus Robot
+Tesla AI Day — Dojo supercomputer (historical)
Elon Musk played AI Day to the crowd with the focus on the Optimus humanoid robot. But while this could have a huge impact on our lives and society if it does enter mass production at the price Musk suggested ($20,000), another part of the presentation will have more immediate effects. That was the status report on the Dojo supercomputer. It could really change the world much more quickly than a bipedal bot.
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Tesla hosted their AI Day and revealed the innerworkings of their software and hardware infrastructure. Part of this reveal was the previously teased Dojo AI training chip. Tesla claims their D1 Dojo chip has a GPU level compute, CPU level flexibility, with networking switch IO.
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-III. Traditional IP Vendors
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+III. Traditional IP Vendors
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-NPU ETHOS-N78
+Arm Ethos-U85 — third-generation Ethos-U micro-NPU
- Specifically designed for inference at the edge, the ML processor gives an industry-leading performance of 4.6 TOPs, with a stunning efficiency of 3 TOPs/W for mobile devices and smart IP cameras.
+ Scales from 128–2048 MACs (up to ~4 TOPS @ 1 GHz) with native transformer operator support for edge / IoT generative and vision models; ~20% more energy efficient than Ethos-U65 and pairs with Cortex-M or Cortex-A hosts (Corstone-320 reference). Same Ethos toolchain / Vela compiler path as prior U-series.
-ARM Details "Project Trillium" Machine Learning Processor Architecture
+Arm newsroom: Ethos-U85 + Corstone-320 IoT reference platform
+
+Ethos-N78 (legacy application-class NPU)
- Arm’s second-generation, highly scalable and efficient NPU, the Ethos-N78 enables new immersive applications with a 2.5x increase in single-core performance now scalable from 1 to 10 TOP/s and beyond through many-core technologies. It provides flexibility to optimize the ML capability with 90+ configurations.
+ Second-generation Ethos-N series for immersive edge inference; single-core performance scalable from ~1 to 10+ TOPS via many-core configurations (historical product line still referenced in many SoCs).
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+ARM Details "Project Trillium" Machine Learning Processor Architecture (historical)
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Synopsys Introduces Industry's Highest Performance Neural Processor IP
New DesignWare ARC NPX6 NPU IP Delivers Up to 3,500 TOPS Performance for Automotive, Consumer and Data Center Chip Designs
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AI Processors
Whether you want smartness residing in the palm of your hand, consumer products or industrial robots, or enabled by powerful servers in the cloud, we can help you achieve your vision. We enable the smartness in your products with our PowerVR Neural Network Accelerators (NNA) and GPUs. Our NC-SDK enables seamless deployment of AI acceleration on either our hardware IP either in isolation or combined. Our NNA provides maximum efficiency with a scalable architecture which enables a wide range of smart edge and end point devices from low performance IoT to high performance RoboTaxi.
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Deep learning for the real-time embedded world
One solution lies in supplying a dedicated low power AI processor for Deep Learning at the edge, combined with a deep neural network (DNN) graph compiler
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Tensilica AI Platform
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Vivante® NPU IP
VeriSilicon's Neural Network Processor (NPU) IP is a highly scalable, programmable computer vision and artificial intelligence processor that supports AI operations upgrades for endpoints, edge devices, and cloud devices. Designed to meet a variety of chip sizes and power budgets, the Vivante NPU IP is a cost-effective, high-quality neural network acceleration engine solution.
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Cerebras Systems Unveils World’s Fastest AI Chip with 4 Trillion Transistors (WSE-3)
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Today, the company announced the launch of its end-user compute product, the Cerebras CS-1, and also announced its first customer of Argonne National Laboratory.
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Graphcore joins SoftBank Group to build next generation of AI compute
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Graphcore, the Bristol-based startup that designs processors specifically for artificial intelligence applications, announced it has raised another $150 million in funding for R&D and to continue bringing on new customers. It’s valuation is now $1.95 billion.
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解密又一个xPU:Graphcore的IPU give some analysis on its IPU architecture.
Graphcore AI芯片:更多分析 More analysis.
深度剖析AI芯片初创公司Graphcore的IPU In-depth analysis after more information was disclosed.
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Tenstorrent Blackhole / Wormhole AI processors
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An Interview with Tenstorrent: CEO Ljubisa Bajic and CTO Jim Keller
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Automotive AI Startup Blaize Closes $71 Million Funding Round
Blaize, formerly ThinCI, has closed a Series D round of funding at $71 million. New investor Franklin Templeton and existing investor Temasek led the round, along with participation from Denso and other new and existing investors. This round brings Blaize’s total funding to around $155 million total.
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Founded in 2014, Newark, California startup Koniku has taken in $1.65 million in funding so far to become “the world’s first neurocomputation company“. The idea is that since the brain is the most powerful computer ever devised, why not reverse engineer it? Simple, right? Koniku is actually integrating biological neurons onto chips and has made enough progress that they claim to have AstraZeneca as a customer. Boeing has also signed on with a letter of intent to use the technology in chemical-detecting drones.
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Adapteva has taken in $5.1 million in funding from investors that include mobile giant Ericsson. The paper "Epiphany-V: A 1024 processor 64-bit RISC System-On-Chip" describes the design of Adapteva's 1024-core processor chip in 16nm FinFet technology.
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-The Era of Analog Compute has Arrived!
+Mythic raises $125M Series D for analog AI compute
- ResNet-50 in our prototype analog AI processor. Production release will support 900-1000 fps and INT8 accuracy at 3W.
+ Dec 2025 — Oversubscribed round led by DCVC (strategic participation including Honda and Lockheed Martin) to scale Mythic’s Analog Processing Units (APUs) — flash-based compute-in-memory for energy-efficient inference at the edge and in data centers. Roadmap emphasizes chiplet-based next-gen APUs for robotics, automotive, and defense.
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-Mythic launches analog AI processor that consumes 10 times less power
+
+Mythic acquires Videantis for hybrid analog/digital AI platform
- Analog AI processor company Mythic launched its M1076 Analog Matrix Processor today to provide low-power AI processing.
+ May 2026 — Acquisition of Videantis GmbH adds a production digital processor IP + software stack alongside Mythic’s analog in-memory compute, targeting a hybrid platform with large claimed efficiency gains vs. conventional GPU inference.
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+M1076 Analog Matrix Processor (shipping product context) ·
+VentureBeat: M1076 launch (historical)
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-BrainChip launches neuromorphic process for AI at the edge
+BrainChip launches neuromorphic process for AI at the edge
BrainChip today announced the commercialization of its Akida neural networking processor. Aimed at a variety of edge and internet of things (IoT) applications, BrainChip claims to be the first commercial producer of neuromorphic AI chips, which could deliver benefits in ultra-low power and performance over conventional approaches.
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-AI Processor Chipmaker Deep Vision Raises $35 Million in Series B Funding
+AI Processor Chipmaker Deep Vision Raises $35 Million in Series B Funding
Tiger Global Leads Series B Financing, Enabling Deep Vision to Expand Video Analytics and Natural Language Processing Capabilities in Edge Computing Applications
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NVIDIA Vera Rubin Opens Agentic AI Frontier (includes Groq LPU)
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Jonathan Ross left Google to launch next-generation semiconductor startup Groq in 2016. Today, the Mountain View, California-based firm said that it had raised $300 million led by Tiger Global Management and billionaire investor Dan Sundheim’s D1 Capital as it officially launched into public view.
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Kneron to Accelerate Edge AI Development with more than 10 Million USD Series A Financing
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According to this article, "Gyrfalcon offers Automotive AI Chip Technology"
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Gyrfalcon Technology Inc. (GTI), has been promoting matrix-based application specific chips for all forms of AI since offering their production versions of AI accelerator chips in September 2017. Through the licensing of its proprietary technology, the company is confident it can help automakers bring highly competitive AI chips to production for use in vehicles within 18 months, along with significant gains in AI performance, improvements in power dissipation and cost advantages.
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-SambaNova unveils new AI chip to power full-stack AI platform
+SambaNova unveils SN50 RDU for agentic AI, Intel collaboration, $350M+ Series E
- Today Palo-Alto-based SambaNova Systems unveiled a new AI chip, the SN40L, which will power its full-stack large language model (LLM) platform, the SambaNova Suite, that helps enterprises go from chip to model — building and deploying customized generative AI models.
+ Feb 2026 — Fifth-generation Reconfigurable Dataflow Unit (SN50) targets large-scale agentic inference (vendor claims up to ~5× compute and ~4× network bandwidth vs. SN40L; scales toward 256 accelerators). SoftBank named as an early deploy partner; shipping targeted for H2 2026. Planned multi-year collaboration with Intel for heterogeneous inference stacks; oversubscribed Series E led with Vista / Cambium participation including Intel Capital.
-SambaNova raises $676M at a $5.1B valuation to double down on cloud-based AI software for enterprises
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- SambaNova — a startup building AI hardware and integrated systems that run on it that only officially came out of three years in stealth last December — is announcing a huge round of funding today to take its business out into the world. The company has closed on $676 million in financing, a Series D that co-founder and CEO Rodrigo Liang has confirmed values the company at $5.1 billion.
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+Introducing the SN50 RDU ·
+RDU product page
-Introducing SambaNova Systems DataScale: A New Era of Computing
+SN40L RDU powers SambaNova Suite (prior gen)
- SambaNova has been working closely with many organizations the past few months and has established a new state of the art in NLP. This advancement in NLP deep learning is illustrated by a GPU-crushing, world record performance result achieved on SambaNova Systems’ Dataflow-optimized system.
+ Fourth-generation SN40L RDU with three-tier memory (SRAM / HBM / DRAM) for full-stack LLM platforms — still the primary shipping generation ahead of SN50.
-A New State of the Art in NLP: Beyond GPUs
-
- SambaNova has been working closely with many organizations the past few months and has established a new state of the art in NLP. This advancement in NLP deep learning is illustrated by a GPU-crushing, world record performance result achieved on SambaNova Systems’ Dataflow-optimized system.
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+Series D funding context (historical) ·
+DataScale systems
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GreenWaves Shows Off Advanced Audio Demos
The Gap9 processor, a successor to Gap8 which targets computer vision in IoT devices, is an ultra-low power neural network processor suitable for battery-powered devices. GreenWaves’ vice president of marketing Martin Croome told EE Times Europe that the company decided to focus Gap9 on the hearables market after receiving traction from this sector for Gap8.
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Optical Chip Solves Hardest Math Problems Faster than GPUs
Optical computing startup Lightelligence has demonstrated a silicon photonics accelerator running the Ising problem more than 100 times faster than a typical GPU setup.
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Lightmatter Raises More Funding for Photonic AI Chip
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+Hailo-10H generally available for edge generative AI
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+ Jul 2025 — Second-generation Hailo-10H brings on-device LLM / VLM / GenAI capabilities to the edge (~40 TOPS INT4 class, ~2.5W typical), while retaining vision workloads from the Hailo-8 generation. Automotive-qualified (AEC-Q100 Grade 2) with 2026 SOP targeting for some designs.
+
-‘Unicorn’ AI Chipmaker Hailo Raises $136 Million
+Hailo-10H product page ·
+Hailo-8
+
+‘Unicorn’ AI Chipmaker Hailo Raises $136 Million (historical)
Israeli AI chip startup Hailo has raised $136 million in a Series C funding round, bringing the company’s total to $224 million. The company has also reportedly reached “unicorn” status.
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Tachyum Launches Prodigy Universal Processor
May 11, 2021 — Tachyum today launched the world’s first universal processor, Prodigy, which unifies the functionality of a CPU, GPU and TPU in a single processor, creating a homogeneous architecture, while delivering massive performance improvements at a cost many times less than competing products
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AlphaICs Begins Sampling Its Deep Learning Co-Processor
AlphaICs, a startup developing edge AI and learning silicon aimed at smart vision applications, is sampling its deep learning co-processor, Gluon, that also comes with a software development kit.
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Syntiant: Analog Deep Learning Chips
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Startup Syntiant Corp. is an Irvine, Calif. semiconductor company led by former top Broadcom engineers with experience in both innovative design and in producing chips designed to be produced in the billions, according to company CEO Kurt Busch.
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Baidu Backs Neuromorphic IC Developer
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Flex Logix has two paths to making a lot of money challenging Nvidia in AI
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Preferred Networks develops a custom deep learning processor MN-Core for use in MN-3, a new large-scale cluster, in spring 2020
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AI Startup Cornami reveals details of neural net chip
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AI chip startup offers new edge computing solution
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Optalysys launches world’s first commercial optical processing system, the FT:X 2000
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Low-Power AI Startup Eta Compute Delivers First Commercial Chips
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Achronix Rolls 7-nm FPGAs for AI
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Startup Runs AI in Novel SRAM
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NeuroBlade Preps Inference Chip
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Bill Gates just backed a chip startup that uses light to turbocharge AI
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Chip startup Efinix hopes to bootstrap AI efforts in IoT
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AIStorm raises $13.2 million for AI edge computing chips
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David Schie, a former senior executive at Maxim, Micrel, and Semtech, thinks both markets are ripe for disruption. He — along with WSI, Toshiba, and Arm veterans Robert Barker, Andreas Sibrai, and Cesar Matias — in 2011 cofounded AIStorm, a San Jose-based artificial intelligence (AI) startup that develops chipsets that can directly process data from wearables, handsets, automotive devices, smart speakers, and other internet of things (IoT) devices.
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SiMa.ai Modalix platform for Physical AI in production
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Untether AI nabs $125M for AI acceleration chips
Untether AI, a startup developing custom-built chips for AI inferencing workloads, today announced it has raised $125 million from Tracker Capital Management and Intel Capital. The round, which was oversubscribed and included participation from Canada Pension Plan Investment Board and Radical Ventures, will be used to support customer expansion.
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GrAI Matter Labs Reveals NeuronFlow Technology and Announces GrAIFlow SDK
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Rain Neuromorphics on Crunchbase
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Applied Brain Research on Crunchbase
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XMOS adapts Xcore into AIoT ‘crossover processor’
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We design and produce AI processors and the software to run them in data centers. Our unique approach optimizes for inference with the focus on performance, power efficiency, and ease of use; and at the same time our approach enables cost-effective training.
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+RNGD enters mass production for data-center AI inference
+
+ Jan 2026 — FuriosaAI’s RNGD (Tensor Contraction Processor, TSMC 5nm, ~180W PCIe) entered volume shipment for LLM / agentic inference; NXT RNGD servers pack multiple cards into air-cooled, ~3kW-class systems.
+
+FuriosaAI partners with Broadcom on next-generation inference platform
- We build high-performance AI inference coprocessors that can be seamlessly integrated into various computing platforms including data centers, servers, desktops, automobiles and robots.
+ May 2026 — Strategic collaboration to evolve TCP into a scale-up multi-die inference platform with Broadcom Ethernet/PCIe switching for hyperscale agentic workloads.
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+Equinix Lisbon RNGD deployment (Jul 2026)
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Corerain provides ultra-high performance AI acceleration chips and the world's first streaming engine-based AI development platform.
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Perceive emerges from stealth with Ergo edge AI chip
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SimpleMachines, Inc. Debuts First-of-its-Kind High Performance Chip
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NeuReality lands $35M to bring AI accelerator chips to market
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Analog inference startup raises $10.6 million
The company is backed by Khosla Ventures and is developing its first generation of products for AI computing at the edge. The company raised $4.5 million shortly after its formation in March 2018, so the latest tranche brings the total raised to-date to $15.1 million
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Quadric Announces Unified Silicon and Software Platform Optimized for On-Device AI
BURLINGAME, Calif., June 22, 2021 — Quadric (quadric.io), an innovator in high-performance edge processing, has introduced a unified silicon and software platform that unlocks the power of on-device AI.
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EdgeQ reveals more details behind its next-gen 5G/AI chip
5G is the current revolution in wireless technology, and every chip company old and new is trying to burrow their way into this ultra-competitive — but extremely lucrative — market. One of the most interesting new players in the space is EdgeQ, a startup with a strong technical pedigree via Qualcomm that we covered last year after it raised a nearly $40 million Series A.
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Innatera Unveils Neuromorphic AI Chip to Accelerate Spiking Networks
Innatera, the Dutch startup making neuromorphic AI accelerators for spiking neural networks, has produced its first chips, gauged their performance, and revealed details of their architecture.
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Redpine Founder Launches AI Processor Startup
Ceremorphic, an AI chip startup emerging from stealth mode this week, is readying a heterogeneous AI processor aimed at model training in data centers, automotive, high-performance computing, robotics and other emerging applications.
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Aspinity Analog ML Chip Allows Battery-Powered “Always On”
Machine learning (ML) is all about massive amounts of processing, DSP, etc., right? Maybe not, according to the team at Aspinity. The company continues to push ahead on the analog front. The latest member of the company’s analogML family, the AML100, operates completely in the analog domain. As a result, it can reduce always-on system power by 95% (for the record, we had to walk through this a couple of times before I believed them).
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TetraMem enjoyed an exciting public debut of our analog in-memory compute technology at the Linley Spring 2022 Processor Conference.
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+
Exclusive: AI chip startup d-Matrix raises $110 million with backing from Microsoft
@@ -1360,8 +1151,6 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
The startup combines digital in-memory compute and chiplet implementations for data-center-grade inference.
-
-
@@ -1376,19 +1165,14 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
2024 Series A coverage of Sohu: an ASIC purpose-built for Transformer inference (rather than general-purpose GPU programmability), aiming for higher tokens/sec and better energy efficiency on LLM serving.
-
-
-
-V. China AI Accelerator Vendors
-
+V. China AI Accelerator Vendors
+
Domestic training/inference accelerators have become central under export-control and procurement policies. Coverage below highlights widely reported product lines; treat performance claims as vendor-/press-reported unless independently benchmarked.
-
-
-
Huawei Ascend / HiSilicon
Huawei Atlas 900 A3 SuperPoD / Ascend 910C
@@ -1398,10 +1182,8 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Serving Large Language Models on Huawei CloudMatrix384 (technical paper)
-
-
-
+
Cambricon (寒武纪)
Cambricon targets 500,000 AI chips in 2026
@@ -1414,8 +1196,6 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
MLU500-series cloud accelerator commonly cited for China data-center training/inference deployments with MLU-Link multi-card interconnect and Cambricon’s NeuWare / BANG software stack.
-
-
@@ -1424,8 +1204,6 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Jan 2026 — Shanghai Biren Technology listed in Hong Kong (6082.HK), raising ~HK$5.58B. Best known for BR100-class GPGPU / AI accelerators positioned as high-performance domestic alternatives.
-
-
@@ -1434,10 +1212,8 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Dec 2025 — Full-function GPU vendor (MTT S4000 / S5000 class AI cards, MUSA software stack) completed a ~$1.1B STAR Market IPO amid China’s domestic GPU push.
-
-
-
+
Enflame (燧原)
Enflame CloudBlazer / DTU AI accelerators
@@ -1445,10 +1221,8 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Shanghai-based accelerator vendor offering CloudBlazer training/inference products (DTU architecture) for domestic intelligent-computing centers; frequently grouped with China’s “GPU dragons” alongside Biren, Moore Threads, and MetaX. Open-source ecosystem links: EnflameTechnology on GitHub.
-
-
-
+
Horizon Robotics (地平线)
Horizon Journey 6 / BPU Nash automotive AI processors
@@ -1456,11 +1230,8 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Leading China ADAS / autonomous-driving compute vendor with Journey-series BPU SoCs (Journey 6 adds BPU Nash with stronger Transformer support) widely designed into passenger vehicles; focuses on efficient vision/transformer perception at the edge rather than datacenter LLM training.
-
-
-
-
+
Black Sesame Technologies (黑芝麻智能)
Huashan A1000 automotive-grade ADAS / AD SoCs
@@ -1470,11 +1241,8 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Caixin: Black Sesame Hong Kong IPO
-
-
-
-
+
Chinese GPU Maker MetaX Doubles Revenue Amid Push for Domestic Chips
@@ -1483,10 +1251,8 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
MetaX scales production to meet rising AI chip demand
-
-
-
+
Hygon DCU completes Day-0 adaptation for DeepSeek-V4
@@ -1495,23 +1261,20 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
HYGON-AI DCU inference cookbook (open deployment guides)
-
-
-
+
Iluvatar CoreX targets Nvidia’s Rubin with GPU road map
Jan 2026 — Hong Kong-listed Iluvatar CoreX outlined a multi-generation GPU architecture roadmap (Tianshu / Tianxuan / Tianji / Tianquan messaging) aiming to close the gap with Nvidia Hopper→Blackwell→Rubin class platforms, with BI-V150-class products already in AI training/inference deployments.
-
-
-AI Chip Compilers
+AI Chip Compilers
+
-
+
Actively used / widely referenced (2024–2026)
1.
MLIR — Multi-Level Intermediate Representation (LLVM)
2.
Apache TVM — end-to-end ML compiler stack
@@ -1531,13 +1294,14 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
14.
TACO (Tensor Algebra Compiler)
15.
Intel nGraph (archived)
-
+
-AI Chip Benchmarks
+AI Chip Benchmarks
+
-
+
1.
MLPerf (MLCommons) — industry-standard training, inference, HPC, and client benchmarks.
Latest results (2026):
@@ -1550,15 +1314,15 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
5.
EEMBC MLMark
6.
AIIA DNN Benchmark
-
+
-Reference
+Reference
-
+
-
+
+
diff --git a/_config.yml b/_config.yml
index cc35c1d..db1f39c 100644
--- a/_config.yml
+++ b/_config.yml
@@ -1 +1,6 @@
-theme: jekyll-theme-modernist
\ No newline at end of file
+title: AI Chip (ICs and IPs)
+description: A curated directory of ICs and IPs for AI, machine learning, and deep learning — covering hyperscaler custom silicon, GPUs/NPUs, IP vendors, startups, and China accelerators.
+theme: jekyll-theme-modernist
+show_downloads: false
+plugins:
+ - jekyll-seo-tag
diff --git a/assets/css/style.scss b/assets/css/style.scss
new file mode 100644
index 0000000..5290c92
--- /dev/null
+++ b/assets/css/style.scss
@@ -0,0 +1,255 @@
+---
+---
+
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+
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+
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From 1a133b8f3040471faeb16d44bd16cb35db41870d Mon Sep 17 00:00:00 2001
From: Cursor Agent
Date: Thu, 16 Jul 2026 02:58:28 +0000
Subject: [PATCH 06/13] Prune defunct vendors, keep post-2023 news, refresh
NVIDIA/TPU history
Remove shut-down or pivoted AI-chip entries, clear pre-2024 blurbs for
other orgs, document full NVIDIA GPU and Google TPU lineages, and add
AI Chip Landscape v0.8 (2026).
Co-authored-by: Shan Tang
---
README.md | 1057 ++++++---------------------
resource/AI_Chip_Landscape_v0p8.png | Bin 0 -> 104563 bytes
2 files changed, 204 insertions(+), 853 deletions(-)
create mode 100644 resource/AI_Chip_Landscape_v0p8.png
diff --git a/README.md b/README.md
index 338c451..62f5e35 100644
--- a/README.md
+++ b/README.md
@@ -1,70 +1,52 @@
-
-NVIDIA Hopper Architecture In-Depth
-
- Today during the 2022 NVIDIA GTC Keynote address, NVIDIA CEO Jensen Huang introduced the new NVIDIA H100 Tensor Core GPU based on the new NVIDIA Hopper GPU architecture. This post gives you a look inside the new H100 GPU and describes important new features of NVIDIA Hopper architecture GPUs.
-
-
-NVIDIA Unveils Grace: A High-Performance Arm Server CPU For Use In Big AI Systems
+NVIDIA Blackwell platform
- Kicking off another busy Spring GPU Technology Conference for NVIDIA, this morning the graphics and accelerator designer is announcing that they are going to once again design their own Arm-based CPU/SoC. Dubbed Grace – after Grace Hopper, the computer programming pioneer and US Navy rear admiral – the CPU is NVIDIA’s latest stab at more fully vertically integrating their hardware stack by being able to offer a high-performance CPU alongside their regular GPU wares. According to NVIDIA, the chip is being designed specifically for large-scale neural network workloads, and is expected to become available in NVIDIA products in 2023.
+ GTC 2024 — B200 Tensor Core GPU and GB200 Grace Blackwell Superchip / NVL72 systems for generative AI training and real-time LLM inference.
+Hopper architecture in-depth ·
+Hopper ·
+Blackwell
+
-
-
-Mobileye EyeQ
-> Mobileye is currently developing its fifth generation SoC, the EyeQ®5, to act as the vision central computer performing sensor fusion for Fully Autonomous Driving (Level 5) vehicles that will hit the road in 2020. To meet power consumption and performance targets, EyeQ® SoCs are designed in most advanced VLSI process technology nodes – down to 7nm FinFET in the 5th generation.
-
-
-Loihi
-Intel Advances Neuromorphic with Loihi 2, New Lava Software Framework and New Partners
-
- Second-generation research chip uses pre-production Intel 4 process, grows to 1 million neurons. Intel adds open software framework to accelerate developer innovation and path to commercialization.
-
-
-
-Habana
+Intel / Habana Gaudi
+
Intel Unleashes Enterprise AI with Gaudi 3
Intel Vision 2024 — Gaudi 3 targets generative AI training and inference with Ethernet scale-out. Intel positions Gaudi 3 for enterprise GenAI price/performance vs. GPU alternatives, with OEM availability through Dell, HPE, Lenovo, Supermicro and cloud partners.
-Intel’s Habana Labs Launches Second-Generation AI Processors for Training and Inferencing
-
- Today at Intel Vision, Intel announced that Habana Labs, its data center team focused on AI deep learning processor technologies, launched its second-generation deep learning processors for training and inference: Habana® Gaudi®2 and Habana® Greco™. These new processors address an industry gap by providing customers with high-performance, high-efficiency deep learning compute choices for both training workloads and inference deployments in the data center while lowering the AI barrier to entry for companies of all sizes.
-
-
-Habana Gaudi debuts in the Amazon EC2 cloud
-
- The primary motivation to create this new training instance class was presented by Andy Jassy in the 2020 re:Invent: “To provide our end-customers with up to 40% better price-performance than the current generation of GPU-based instances.”
-
-
@@ -138,34 +113,18 @@
Snapdragon Summit 2024 — custom Oryon CPU plus a redesigned Hexagon NPU (fused scalar/vector/tensor accelerators). Qualcomm cites ~45% faster NPU performance and better perf/W vs. Snapdragon 8 Gen 3 for multimodal on-device generative AI.
-
Qualcomm Cloud AI 100
Cloud/edge inference accelerator focused on power-efficient deployment outside traditional GPU clusters.
-Qualcomm Ups The Snapgragon AI Game
-
- The leader in premium mobile SoCs has applied AI across the entire platform.
-
-
-Qualcomm Cloud AI 100
-
- The Qualcomm Cloud AI 100, designed for AI inference acceleration, addresses unique requirements in the cloud, including power efficiency, scale, process node advancements, and signal processing—facilitating the ability of datacenters to run inference on the edge cloud faster and more efficiently. Qualcomm Cloud AI 100 is designed to be a leading solution for datacenters who increasingly rely on infrastructure at the edge-cloud.
-
-
Samsung Exynos 2500
- Flagship mobile SoC on Samsung 3nm GAA process with a substantially upgraded NPU (Samsung cites up to ~59 TOPS and ~39% better on-device AI vs. Exynos 2400) for generative AI and privacy-preserving on-device inference.
+ 2025 flagship mobile SoC on Samsung 3nm GAA with a substantially upgraded NPU (Samsung cites up to ~59 TOPS and large on-device AI gains vs. Exynos 2400) for generative AI and privacy-preserving on-device inference.
-Samsung Brings On-device AI Processing… Exynos 9 Series 9820 (historical)
-
- Earlier on-device AI messaging around Exynos 9820 / 9810-era NPU features for AR/VR and mobile deep learning.
-
-
@@ -174,79 +133,35 @@
Oct 2024 — Flagship Dimensity 9400 (TSMC 3nm) pairs an all-big-core CPU with MediaTek’s 8th-generation NPU 890. MediaTek highlights on-device LoRA training, high-quality video generation, MoE LLM support, and the Dimensity Agentic AI Engine (DAE), with claimed large gains in LLM prompt / diffusion performance vs. Dimensity 9300.
-Dimensity 9400 product page
-
AMD Instinct™ MI350 Series GPUs
Built on 4th Gen AMD CDNA™ architecture, MI350X / MI355X deliver large HBM3E capacity (up to 288GB) and high bandwidth for generative AI training and inference, with expanded low-precision datatype support (including MXFP6 / MXFP4). MI400-series / Helios rack-scale systems are on AMD’s 2026 roadmap.
-
AMD and Meta Announce Expanded Strategic Partnership to Deploy 6 Gigawatts of AMD GPUs
Feb 2026 — AMD and Meta expanded their partnership for multi-generation Instinct GPU deployments, including custom MI450-class GPUs on the Helios rack architecture with ROCm software.
-AMD Instinct™ MI Series Accelerators
-
- AMD Instinct accelerators target data-center HPC and AI, combining CDNA architecture, Infinity Fabric interconnect, and the open ROCm software stack for training and inference at scale.
-
-
-
-
-
-
-Meet the IBM Artificial Intelligence Unit
-
-
- It’s our first complete system-on-chip designed to run and train deep learning models faster and more efficiently than a general-purpose CPU.
-
-
-IBM Telum Processor: the next-gen microprocessor for IBM Z and IBM LinuxONE
-
-
- The 7 nm microprocessor is engineered to meet the demands our clients face for gaining AI-based insights from their data without compromising response time for high volume transactional workloads.
-
-
-TrueNorth is IBM's Neuromorphic CMOS ASIC developed in conjunction with the DARPA SyNAPSE program.
-
-
- It is a manycore processor network on a chip design, with 4096 cores, each one simulating 256 programmable silicon "neurons" for a total of just over a million neurons. In turn, each neuron has 256 programmable "synapses" that convey the signals between them. Hence, the total number of programmable synapses is just over 268 million (228). In terms of basic building blocks, its transistor count is 5.4 billion. Since memory, computation, and communication are handled in each of the 4096 neurosynaptic cores, TrueNorth circumvents the von-Neumann-architecture bottlenecks and is very energy-efficient, consuming 70 milliwatts, about 1/10,000th the power density of conventional microprocessors. Wikipedia
-
-
-AI Hardware Center
-
- "The IBM Research AI Hardware Center is a global research hub headquartered in Albany, New York. The center is focused on enabling next-generation chips and systems that support the tremendous processing power and unprecedented speed that AI requires to realize its full potential.
-
-
-
-
+
-
Custom AI ASICs + DPUs
- Beyond OCTEON / ARMADA DPUs for networking infrastructure, Marvell is a major custom AI accelerator design partner for hyperscalers (widely reported programs include AWS Trainium/Inferentia-class and Microsoft Maia-class silicon), complementing Broadcom’s XPU franchise.
+ 2024–2026 — Beyond OCTEON / ARMADA DPUs, Marvell is a major custom AI accelerator design partner for hyperscalers (widely reported programs include AWS Trainium/Inferentia-class and Microsoft Maia-class silicon), complementing Broadcom’s XPU franchise.
-Data Processing Units
-
- Marvell’s OCTEON™, OCTEON™ Fusion and ARMADA® platforms target wireless infrastructure, carrier networks, enterprise and cloud data centers.
-
-
-
+
Broadcom
OpenAI and Broadcom announce strategic collaboration for custom AI accelerators
Oct 2025 — Multi-year plan to deploy ~10 GW of OpenAI-designed accelerators co-developed with Broadcom (Ethernet scale-up/scale-out), with rack deployments targeted from H2 2026 through 2029.
-
Broadcom extends partnership with Meta on MTIA custom silicon
Apr 2026 — Broadcom’s XPU platform continues as the co-design / implementation backbone for Meta’s multi-generation MTIA accelerators and supporting Ethernet AI networking fabric.
-
Broadcom custom XPUs for hyperscaler AI
Broadcom co-designs customer-specific AI accelerators (XPUs) and pairs them with Tomahawk / Jericho Ethernet switching — a long-running model that began with Google TPU generations and now spans multiple frontier labs and cloud providers.
@@ -256,83 +171,64 @@
-
-
+
+Google — TPU lineage
-Introducing Trillium, sixth-generation TPUs
-
- Google Cloud’s TPU v6e (Trillium) delivers up to 4.7× peak compute per chip vs. TPU v5e, with doubled HBM capacity/bandwidth and improved energy efficiency for foundation-model training and serving.
-
-
-Cloud TPU Ironwood (TPU7x) generally available
-
- Ironwood is Google Cloud’s seventh-generation TPU family for large-scale training and inference (LLMs, MoEs, diffusion). See Cloud TPU docs / release notes for TPU7x availability and configurations.
-
-
-TPU v6e (Trillium) architecture documentation
+Cloud TPU generation history (Edge TPU / Pixel Tensor noted as related). Specs are Google-reported.
-Google Tensor: Everything you need to know about the Pixel 6 chip
-
- Google has taken the wraps off its latest Pixel smartphones and, among the changes, the one with the biggest long-term impact is the switch to in-house silicon for the search giant.
-
-
-Google Launches TPU v4 AI Chips
-
- Google CEO Sundar Pichai spoke for only one minute and 42 seconds about the company’s latest TPU v4 Tensor Processing Units during his keynote at the Google I/O virtual conference this week, but it may have been the most important and awaited news from the event.
-
-
-Cloud TPU
-
- Machine learning has produced business and research breakthroughs ranging from network security to medical diagnoses. We built the Tensor Processing Unit (TPU) in order to make it possible for anyone to achieve similar breakthroughs. Cloud TPU is the custom-designed machine learning ASIC that powers Google products like Translate, Photos, Search, Assistant, and Gmail. Here’s how you can put the TPU and machine learning to work accelerating your company’s success, especially at scale.
-
-
-Edge TPU
-
- AI is pervasive today, from consumer to enterprise applications. With the explosive growth of connected devices, combined with a demand for privacy/confidentiality, low latency, and bandwidth constraints, AI models trained in the cloud increasingly need to be run at the edge. Edge TPU is Google’s purpose-built ASIC designed to run AI at the edge. It delivers high performance in a small physical and power footprint, enabling the deployment of high-accuracy AI at the edge.
-
-
-Other references are:
-Google TPU3 看点
-Google TPU 揭密
-Google的神经网络处理器专利
-脉动阵列 - 因Google TPU获得新生
-Should We All Embrace Systolic Arrays?
+Early generations
+
+- TPU v1 (2015) — inference-only systolic MXU (INT8) inside Google production services; public details followed ~2016–2017.
+- TPU v2 (2017) — training + inference, bfloat16, HBM, first multi-chip pods.
+- TPU v3 (2018) — higher compute, liquid cooling at pod scale.
+- TPU v4 (2021) — denser pods, 3D torus + optical circuit switches; backbone for many Google foundation-model trainings.
+
-
+Split SKUs & GenAI scale-up
+
+- TPU v5e (2023) — cost-efficient training/inference at volume.
+- TPU v5p (2023) — high-end large-pod training performance.
+- Trillium / TPU v6e (2024) — larger MXUs; Google cites ~4.7× peak compute/chip vs. v5e, with higher HBM capacity/bandwidth and better energy efficiency.
+- Ironwood / TPU v7 (2025) — inference-leaning generation with native low-precision (FP8-class) paths and very large pod configurations.
+
-
+Related Google silicon
+
+- Edge TPU — Coral edge inference ASIC.
+- Google Tensor (Pixel) — mobile SoC ML blocks (separate from Cloud TPU).
+
-Amazon EC2 Trn2 Instances and Trn2 UltraServers
+Introducing Trillium (TPU v6e)
- Powered by AWS Trainium2, Trn2 instances target generative AI training and inference with large HBM capacity and NeuronLink chip-to-chip interconnect. AWS positions Trn2 for strong price/performance vs. GPU instances; UltraServers scale to dozens of Trainium2 chips.
+ Sixth-generation Cloud TPU for foundation-model training and serving; Google cites large per-chip compute and efficiency gains vs. TPU v5e.
-Amazon EC2 Inf2 (Inferentia2)
+Ironwood (TPU v7 / TPU7x) availability notes
- Inferentia2-powered Inf2 instances improve throughput and latency for large-model inference vs. first-generation Inferentia, with multi-chip scale-out via NeuronLink.
+ Seventh-generation Cloud TPU family for large-scale training and inference (LLMs, MoEs, diffusion).
-AWS Trainium
-
- AWS Trainium is the second custom machine learning (ML) chip designed by AWS that provides the best price performance for training deep learning models in the cloud. Trainium offers the highest performance with the most teraflops (TFLOPS) of compute power for the fastest ML training in Amazon EC2 and enables a broader set of ML applications. The Trainium chip is specifically optimized for deep learning training workloads for applications including image classification, semantic search, translation, voice recognition, natural language processing and recommendation engines.
-
+Google: 10 years of TPU history ·
+TPU v6e architecture docs ·
+Cloud TPU ·
+Edge TPU
-AWS Inferentia. High performance machine learning inference chip, custom designed by AWS.
+
+
+Amazon EC2 Trn2 / Trainium2 UltraServers
- AWS Inferentia provides high throughput, low latency inference performance at an extremely low cost. Each chip provides hundreds of TOPS (tera operations per second) of inference throughput to allow complex models to make fast predictions. For even more performance, multiple AWS Inferentia chips can be used together to drive thousands of TOPS of throughput. AWS Inferentia will be available for use with Amazon SageMaker, Amazon EC2, and Amazon Elastic Inference.
+ 2024–2025 — Trainium2-powered Trn2 instances and UltraServers for generative AI training and inference with NeuronLink scale-up; Inferentia2 (Inf2) continues for cost-efficient LLM serving.
-
-
+
-
-Azure Maia for the era of AI: From silicon to software to systems
+Azure Maia for the era of AI
- Microsoft’s first in-house AI accelerator, Azure Maia 100 (5nm, advanced packaging), is co-designed for Azure AI / Copilot-class cloud workloads, with a software stack integrating PyTorch and ONNX Runtime.
+ 2024 — Microsoft’s first in-house AI accelerator, Azure Maia 100 (5nm, advanced packaging), co-designed for Azure AI / Copilot-class cloud workloads, with a software stack integrating PyTorch and ONNX Runtime.
-
+
OpenAI
OpenAI and Broadcom unveil Jalapeño LLM inference chip · TechCrunch coverage
@@ -340,9 +236,7 @@
Jun 2026 — OpenAI’s first custom “Intelligence Processor,” Jalapeño, is an inference-optimized ASIC co-developed with Broadcom (networking + silicon implementation) for lower-cost, higher-utilization LLM serving. First step in a multi-generation platform with initial deployments targeted by end of 2026.
-OpenAI–Broadcom 10 GW accelerator collaboration
-
-
+
Anthropic
Anthropic expands partnership with Google and Broadcom for next-generation compute
@@ -350,10 +244,7 @@
Apr 2026 — Expanded agreement for multiple gigawatts of next-generation Google TPU capacity (Broadcom SEC filings cite ~3.5 GW), expected online from 2027, on top of prior >1 GW TPU commitments. Anthropic emphasizes a multi-hardware strategy: AWS Trainium (incl. Project Rainier), Google TPUs, and NVIDIA GPUs.
-TechCrunch: Anthropic ups compute deal with Google and Broadcom ·
-CNBC: Oct 2025 Google TPU cloud deal
-
-
+
@@ -361,18 +252,16 @@
Oct 2025 — M5 (3nm) adds Neural Accelerators in each GPU core and a faster 16-core Neural Engine, targeting on-device Apple Intelligence and local AI workloads across MacBook Pro, iPad Pro, and Vision Pro.
-
Apple debuts M5 Pro and M5 Max
Mar 2026 — Fusion Architecture scales GPU AI compute and unified memory bandwidth (up to 128GB / ~614GB/s on M5 Max) for local LLM prompt processing and pro creative AI workflows.
-
Apple introduces M4 chip
May 2024 — M4 Neural Engine up to ~38 TOPS, with CPU ML accelerators and high-bandwidth unified memory for on-device AI on iPad Pro and later Macs.
-
+
@@ -381,77 +270,32 @@
Sep 2025 — Alibaba’s T-Head Parallel Processing Unit (PPU / Zhenwu family) targets cloud AI training and inference as a domestic alternative under export-control constraints. Reports cite ~96GB HBM2e-class memory and high chip-to-chip bandwidth; deployed in large China Unicom / Alibaba Cloud clusters.
-Alibaba Cloud Summit: Zhenwu M890 and agentic AI stack
-
- T-Head’s newer Zhenwu-class accelerators (e.g. M890 messaging) emphasize larger on-package memory, low-precision formats (down to FP4), and cluster interconnect / SAIL software for agentic cloud workloads.
-
-
-Alibaba’s Hanguang 800 (historical, 2019)
-
- Pingtouge / T-Head’s first AI inference ASIC, highlighted for high images-per-second inference throughput at Apsara Conference 2019.
-
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-
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-Tencent reveals three data center chips - for AI, video transcoding, and networking
-
- The company claims that the Zixiao AI chip is twice as good as comparable competing products, video transcoding chip Canghai was 30 percent better, and SmartNIC Xuanling was apparently four times as good. It did not provide external benchmarks or specific product details.
-
-
-
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+
+
-
-Baidu Kunlun / Kunlunxin AI accelerators
-
- Baidu’s Kunlunxin line (Kunlun chips) continues as a domestic cloud/training & inference option alongside hyperscaler custom silicon. 2nd-gen Kunlun entered mass production in 2021; later generations target large-model clusters inside China.
-
-
-Baidu says 2nd-gen Kunlun AI chips enter mass production (2021)
+Baidu Kunlunxin
- Early mass-production milestone for Baidu’s second-generation Kunlun AI chips.
+ 2024–2026 — Kunlunxin P800-class GPUs and follow-ons remain a core China training/inference option in Baidu Cloud / ERNIE deployments, with continued software stack updates for large-model serving.
-
-
-
-
-
- This DLU that Fujitsu is creating is done from scratch, and it is not based on either the Sparc or ARM instruction set and, in fact, it has its own instruction set and a new data format specifically for deep learning, which were created from scratch.
- Japanese computing giant Fujitsu. Which knows a thing or two about making a very efficient and highly scalable system for HPC workloads, as evidenced by the K supercomputer, does not believe that the HPC and AI architectures will converge. Rather, the company is banking on the fact that these architectures will diverge and will require very specialized functions.
-
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+
+
+Tencent Cloud AI accelerators (Zixiao / custom)
- Nokia has developed the ReefShark chipsets for its 5G network solutions. AI is implemented in the ReefShark design for radio and embedded in the baseband to use augmented deep learning to trigger smart, rapid actions by the autonomous, cognitive network, enhancing network optimization and increasing business opportunities.
+ 2024–2026 — Tencent continues deploying proprietary and partner AI accelerators across Tencent Cloud for recommendation, multimodal, and LLM inference/training inside its China cloud footprint.
-
+
-Our next generation Meta Training and Inference Accelerator (MTIA)
-
- Meta’s custom MTIA family targets ranking/recommendation and broader AI workloads. Newer generations expand coverage toward GenAI inference and training, complementing GPU capacity in Meta’s AI infrastructure.
-
-
Four MTIA Chips in Two Years: Scaling AI Experiences for Billions
Meta describes a multi-generation MTIA roadmap (including MTIA 300–500 class chips) with modular chiplet designs and accelerating deployment cadence through 2026–2027.
-Facebook developing machine learning chip - The Information (historical, 2021)
-
- Early reporting on Meta/Facebook’s in-house ML chip efforts for recommendation workloads.
-
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+
@@ -460,23 +304,11 @@
Apr 2026 — Elon Musk announced Tesla’s next-generation AI5 inference/training SoC has taped out, with AI6 / Dojo3 also mentioned as in progress. Volume production and broad vehicle deployment remain gated (reports point to mid–late 2027+); near-term vehicles continue on AI4 / interim upgrades, while AI5 is also positioned for Optimus and internal clusters.
-TrendForce: Samsung foundry path for AI5 / Taylor 2nm messaging
-
-Tesla AI Day — Dojo supercomputer (historical)
-
- Elon Musk played AI Day to the crowd with the focus on the Optimus humanoid robot. But while this could have a huge impact on our lives and society if it does enter mass production at the price Musk suggested ($20,000), another part of the presentation will have more immediate effects. That was the status report on the Dojo supercomputer. It could really change the world much more quickly than a bipedal bot.
-
-
-Tesla Dojo – Unique Packaging and Chip Design Allow An Order Magnitude Advantage Over Competing AI Hardware
-
- Tesla hosted their AI Day and revealed the innerworkings of their software and hardware infrastructure. Part of this reveal was the previously teased Dojo AI training chip. Tesla claims their D1 Dojo chip has a GPU level compute, CPU level flexibility, with networking switch IO.
-
-
III. Traditional IP Vendors
-
+
@@ -487,58 +319,48 @@
Arm newsroom: Ethos-U85 + Corstone-320 IoT reference platform
-Ethos-N78 (legacy application-class NPU)
-
- Second-generation Ethos-N series for immersive edge inference; single-core performance scalable from ~1 to 10+ TOPS via many-core configurations (historical product line still referenced in many SoCs).
-
-
-ARM Details "Project Trillium" Machine Learning Processor Architecture (historical)
-
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+
+
-
-Synopsys Introduces Industry's Highest Performance Neural Processor IP
+Synopsys ARC NPX NPU IP
- New DesignWare ARC NPX6 NPU IP Delivers Up to 3,500 TOPS Performance for Automotive, Consumer and Data Center Chip Designs
+ 2024–2026 — DesignWare ARC NPX neural processor IP family for automotive / consumer / datacenter SoCs, with multi-TOPS scalable configurations and ongoing toolchain updates.
-
-
+
-
-AI Processors
+Imagination AI / NNA IP
- Whether you want smartness residing in the palm of your hand, consumer products or industrial robots, or enabled by powerful servers in the cloud, we can help you achieve your vision. We enable the smartness in your products with our PowerVR Neural Network Accelerators (NNA) and GPUs. Our NC-SDK enables seamless deployment of AI acceleration on either our hardware IP either in isolation or combined. Our NNA provides maximum efficiency with a scalable architecture which enables a wide range of smart edge and end point devices from low performance IoT to high performance RoboTaxi.
+ 2024–2026 — PowerVR Neural Network Accelerators (NNA) and GPU+NNA combinations for edge and automotive SoCs, with IMG Continuum software for transformer-class networks.
-
-
+
-
-Deep learning for the real-time embedded world
+CEVA edge AI / NPU IP
- One solution lies in supplying a dedicated low power AI processor for Deep Learning at the edge, combined with a deep neural network (DNN) graph compiler
+ 2024–2026 — Low-power AI processor IP and DNN graph compiler for real-time embedded / automotive / IoT inference, including transformer-capable NeuPro-class offerings.
-
+
+Cadence Tensilica AI Platform
+
+ 2024–2026 — Tensilica NPU / AI DSP IP for on-device and automotive SoCs, with NeuroWeave toolchain updates for modern DNN / transformer workloads.
+
-Tensilica AI Platform
-
-
+
-
-Vivante® NPU IP
+VeriSilicon VIP / NPU IP & design services
- VeriSilicon's Neural Network Processor (NPU) IP is a highly scalable, programmable computer vision and artificial intelligence processor that supports AI operations upgrades for endpoints, edge devices, and cloud devices. Designed to meet a variety of chip sizes and power budgets, the Vivante NPU IP is a cost-effective, high-quality neural network acceleration engine solution.
+ 2024–2026 — Acuity / VIP NPU IP and turnkey design services widely used in China and global edge SoCs for vision and on-device GenAI.
-
+
@@ -547,32 +369,7 @@
March 2024 — WSE-3 (5nm) powers the CS-3 system with ~900,000 AI-optimized cores and 125 petaflops peak AI performance, doubling WSE-2 performance at the same power/price point for large-model training and high-throughput inference.
-Cerebras Unveils Andromeda, a 13.5 Million Core AI Supercomputer that Delivers Near-Perfect Linear Scaling for Large Language Models
-
- Delivering more than 1 Exaflop of AI compute and 120 Petaflops of dense compute, Andromeda is one of the largest AI supercomputers ever built, and is dead simple to use
-
-
-Cerebras Sets Record for Largest AI Models Ever Trained on Single Device
-
- We are announcing the largest models ever trained on a single device. Using the Cerebras Software Platform (CSoft), our customers can easily train state-of-the-art GPT language models (such as GPT-3[i] and GPT-J[ii]) with up to 20 billion parameters on a single CS-2 system. Running on a single CS-2, these models take minutes to set up and users can quickly move between models with just a few keystrokes. With clusters of GPUs, this takes months of engineering work.
-
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-Cerebras Completes Series F Funding, Another $250M for $4B Valuation
-
- The new Series F funding round nets the company another $250m in capital, bringing the total raised through venture capital up to $720 million.
-
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-Cerebras Unveils Wafer Scale Engine Two (WSE2): 2.6 Trillion Transistors, 100% Yield
-
- Two years ago Cerebras unveiled a revolution in silicon design: a processor as big as your head, using as much area on a 12-inch wafer as a rectangular design would allow, built on 16nm, focused on both AI as well as HPC workloads. Today the company is launching its second generation product, built on TSMC 7nm, with more than double the cores and more than double of everything.
-
-
-The Cerebras CS-1 computes deep learning AI problems by being bigger, bigger, and bigger than any other chip
-
- Today, the company announced the launch of its end-user compute product, the Cerebras CS-1, and also announced its first customer of Argonne National Laboratory.
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+
@@ -581,65 +378,25 @@
Jul 2024 — SoftBank acquired Graphcore as a wholly owned subsidiary (terms undisclosed; press estimates ~$500M). Graphcore continues under its own brand, with SoftBank backing next-generation IPU / AI compute development (including SoftBank-ecosystem follow-on investment reporting into 2026).
-Reuters: SoftBank acquires Graphcore
+
-
Graphcore Supercharges IPU with Wafer-on-Wafer (historical)
-
- Graphcore unveiled its third-generation intelligence processing unit (IPU), the first processor to be built using 3D wafer-on-wafer (WoW) technology.
-
-
-MK2 PERFORMANCE BENCHMARKS
+
-
Graphcore, the AI chipmaker, raises another $150M at a $1.95B valuation
+
+
+Tenstorrent Wormhole / Blackhole
- Graphcore, the Bristol-based startup that designs processors specifically for artificial intelligence applications, announced it has raised another $150 million in funding for R&D and to continue bringing on new customers. It’s valuation is now $1.95 billion.
+ 2024–2026 — Tensix-based AI processors (Wormhole shipping; Blackhole next) with open software (TT-Metalium) and growing rack-scale deployments; Jim Keller–led roadmap emphasizes scalable chiplet meshes.
-解密又一个xPU:Graphcore的IPU give some analysis on its IPU architecture.
-Graphcore AI芯片:更多分析 More analysis.
-深度剖析AI芯片初创公司Graphcore的IPU In-depth analysis after more information was disclosed.
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-
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-Tenstorrent Blackhole / Wormhole AI processors
-
- Tenstorrent builds RISC-V based AI computers (Wormhole, Blackhole) with an open software stack, targeting datacenter and edge deployments under Jim Keller’s architecture leadership.
-
-
-Tenstorrent Raises over $200 million at $1 billion Valuation to Create Programmable, High Performance AI Computers
-
- TORONTO, May 20, 2021 /PRNewswire/ - Tenstorrent, a hardware start-up developing next generation computers, announced today that it has raised over $200 million in a recent funding round that values the company at $1 billion. The round was led by Fidelity Management and Research Company and includes additional investments from Eclipse Ventures, Epic CG and Moore Capital.
-
-
-An Interview with Tenstorrent: CEO Ljubisa Bajic and CTO Jim Keller
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+
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-Automotive AI Startup Blaize Closes $71 Million Funding Round
+Blaize AI edge platforms (Nasdaq: BZAI)
- Blaize, formerly ThinCI, has closed a Series D round of funding at $71 million. New investor Franklin Templeton and existing investor Temasek led the round, along with participation from Denso and other new and existing investors. This round brings Blaize’s total funding to around $155 million total.
+ 2025 — Listed via SPAC; Graph Streaming Processor (GSP) architecture for edge AI vision / GenAI inference in industrial and smart-city deployments.
-
-
-
-
-
- Founded in 2014, Newark, California startup Koniku has taken in $1.65 million in funding so far to become “the world’s first neurocomputation company“. The idea is that since the brain is the most powerful computer ever devised, why not reverse engineer it? Simple, right? Koniku is actually integrating biological neurons onto chips and has made enough progress that they claim to have AstraZeneca as a customer. Boeing has also signed on with a letter of intent to use the technology in chemical-detecting drones.
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-Adapteva has taken in $5.1 million in funding from investors that include mobile giant Ericsson. The paper "Epiphany-V: A 1024 processor 64-bit RISC System-On-Chip" describes the design of Adapteva's 1024-core processor chip in 16nm FinFet technology.
-
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+
@@ -647,34 +404,22 @@
Dec 2025 — Oversubscribed round led by DCVC (strategic participation including Honda and Lockheed Martin) to scale Mythic’s Analog Processing Units (APUs) — flash-based compute-in-memory for energy-efficient inference at the edge and in data centers. Roadmap emphasizes chiplet-based next-gen APUs for robotics, automotive, and defense.
-
Mythic acquires Videantis for hybrid analog/digital AI platform
May 2026 — Acquisition of Videantis GmbH adds a production digital processor IP + software stack alongside Mythic’s analog in-memory compute, targeting a hybrid platform with large claimed efficiency gains vs. conventional GPU inference.
-M1076 Analog Matrix Processor (shipping product context) ·
-VentureBeat: M1076 launch (historical)
+
-
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-
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-BrainChip launches neuromorphic process for AI at the edge
-
- BrainChip today announced the commercialization of its Akida neural networking processor. Aimed at a variety of edge and internet of things (IoT) applications, BrainChip claims to be the first commercial producer of neuromorphic AI chips, which could deliver benefits in ultra-low power and performance over conventional approaches.
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-AI Processor Chipmaker Deep Vision Raises $35 Million in Series B Funding
+
+
+Kinara (ex–Deep Vision)
+NXP to acquire Kinara (2025)
- Tiger Global Leads Series B Financing, Enabling Deep Vision to Expand Video Analytics and Natural Language Processing Capabilities in Edge Computing Applications
+ Feb 2025 — NXP announced acquisition of Kinara (rebranded from Deep Vision) for edge AI / Ara / Prisma-class NPUs used in vision and on-device GenAI inference; expands NXP’s industrial and automotive edge AI portfolio.
-
+
@@ -683,33 +428,7 @@
In late 2025 NVIDIA licensed Groq’s LPU technology and brought on key engineering talent. At GTC 2026, NVIDIA described integrating Groq-class LPU engines into the Vera Rubin AI factory stack for low-latency / high-efficiency token generation alongside Rubin GPUs.
-Groq Demonstrates Fast LLMs on 4-Year-Old Silicon
-
- MOUNTAIN VIEW, CALIF. — Groq has repositioned its first-generation AI inference chip as a language processing unit (LPU), and demonstrated Meta’s Llama-2 70-billion–parameter large language model (LLM) running inference at 240 tokens per second per user. Groq CEO Jonathan Ross told EE Times that the company had Llama-2 up and running on the company’s 10-rack (64-chip) cloud-based dev system in “a couple of days.” This system is based on the company’s first gen AI silicon, released four years ago.
-
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-AI Chip Startup Groq, Founded By Ex-Googlers, Raises $300 Million To Power Autonomous Vehicles And Data Centers
-
- Jonathan Ross left Google to launch next-generation semiconductor startup Groq in 2016. Today, the Mountain View, California-based firm said that it had raised $300 million led by Tiger Global Management and billionaire investor Dan Sundheim’s D1 Capital as it officially launched into public view.
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-Kneron to Accelerate Edge AI Development with more than 10 Million USD Series A Financing
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-According to this article, "Gyrfalcon offers Automotive AI Chip Technology"
-
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- Gyrfalcon Technology Inc. (GTI), has been promoting matrix-based application specific chips for all forms of AI since offering their production versions of AI accelerator chips in September 2017. Through the licensing of its proprietary technology, the company is confident it can help automakers bring highly competitive AI chips to production for use in vehicles within 18 months, along with significant gains in AI performance, improvements in power dissipation and cost advantages.
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+
@@ -718,44 +437,17 @@
Feb 2026 — Fifth-generation Reconfigurable Dataflow Unit (SN50) targets large-scale agentic inference (vendor claims up to ~5× compute and ~4× network bandwidth vs. SN40L; scales toward 256 accelerators). SoftBank named as an early deploy partner; shipping targeted for H2 2026. Planned multi-year collaboration with Intel for heterogeneous inference stacks; oversubscribed Series E led with Vista / Cambium participation including Intel Capital.
-Introducing the SN50 RDU ·
-RDU product page
-
-SN40L RDU powers SambaNova Suite (prior gen)
-
- Fourth-generation SN40L RDU with three-tier memory (SRAM / HBM / DRAM) for full-stack LLM platforms — still the primary shipping generation ahead of SN50.
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-Series D funding context (historical) ·
-DataScale systems
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-GreenWaves Shows Off Advanced Audio Demos
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- The Gap9 processor, a successor to Gap8 which targets computer vision in IoT devices, is an ultra-low power neural network processor suitable for battery-powered devices. GreenWaves’ vice president of marketing Martin Croome told EE Times Europe that the company decided to focus Gap9 on the hearables market after receiving traction from this sector for Gap8.
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+
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Optical Chip Solves Hardest Math Problems Faster than GPUs
+
+
+SynSense (ex–aiCTX)
+SynSense neuromorphic / event-based sensing+compute
- Optical computing startup Lightelligence has demonstrated a silicon photonics accelerator running the Ising problem more than 100 times faster than a typical GPU setup.
+ 2024–2026 — Continues Speck / Xylo-class neuromorphic chips; 2024 iniVation collaboration and subsequent funding extend event-based vision + edge AI offerings.
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-Lightmatter Raises More Funding for Photonic AI Chip
-
- ightmatter, the MIT spinout building AI accelerators with a silicon photonics computing engine, announced a Series B funding round, raising an additional $80 million. The company’s technology is based on proprietary silicon photonics technology which manipulates coherent light inside a chip to perform calculations very quickly while using very little power
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+
@@ -764,181 +456,23 @@
Jul 2025 — Second-generation Hailo-10H brings on-device LLM / VLM / GenAI capabilities to the edge (~40 TOPS INT4 class, ~2.5W typical), while retaining vision workloads from the Hailo-8 generation. Automotive-qualified (AEC-Q100 Grade 2) with 2026 SOP targeting for some designs.
-Hailo-10H product page ·
-Hailo-8
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-‘Unicorn’ AI Chipmaker Hailo Raises $136 Million (historical)
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- Israeli AI chip startup Hailo has raised $136 million in a Series C funding round, bringing the company’s total to $224 million. The company has also reportedly reached “unicorn” status.
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-Tachyum Launches Prodigy Universal Processor
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- May 11, 2021 — Tachyum today launched the world’s first universal processor, Prodigy, which unifies the functionality of a CPU, GPU and TPU in a single processor, creating a homogeneous architecture, while delivering massive performance improvements at a cost many times less than competing products
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-AlphaICs Begins Sampling Its Deep Learning Co-Processor
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- AlphaICs, a startup developing edge AI and learning silicon aimed at smart vision applications, is sampling its deep learning co-processor, Gluon, that also comes with a software development kit.
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-Syntiant: Analog Deep Learning Chips
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- Startup Syntiant Corp. is an Irvine, Calif. semiconductor company led by former top Broadcom engineers with experience in both innovative design and in producing chips designed to be produced in the billions, according to company CEO Kurt Busch.
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-Baidu Backs Neuromorphic IC Developer
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- MUNICH — Swiss startup aiCTX has closed a $1.5 million pre-A funding round from Baidu Ventures to develop commercial applications for its low-power neuromorphic computing and processor designs and enable what it calls “neuromorphic intelligence.” It is targeting low-power edge-computing embedded sensory processing systems.
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-Flex Logix has two paths to making a lot of money challenging Nvidia in AI
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- The programmable chip company scores $55 million in venture backing, bringing its total haul to $82 million
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-Preferred Networks develops a custom deep learning processor MN-Core for use in MN-3, a new large-scale cluster, in spring 2020
-
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- Dec. 12, 2018, Tokyo Japan – Preferred Networks, Inc. (“PFN”, Head Office: Tokyo, President & CEO: Toru Nishikawa) announces that it is developing MN-Core (TM), a processor dedicated to deep learning and will exhibit this independently developed hardware for deep learning, including the MN-Core chip, board, and server, at the SEMICON Japan 2018, held at Tokyo Big Site.
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-AI Startup Cornami reveals details of neural net chip
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- Stealth startup Cornami on Thursday revealed some details of its novel approach to chip design to run neural networks. CTO Paul Masters says the chip will finally realize the best aspects of a technology first seen in the 1970s.
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-AI chip startup offers new edge computing solution
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- Anaflash Inc. (San Jose, CA) is a startup company that has developed a test chip to demonstrate analog neurocomputing taking place inside logic-compatible embedded flash memory.
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-Optalysys launches world’s first commercial optical processing system, the FT:X 2000
-
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- Optalysys develops Optical Co-processing technology which enables new levels of processing capability delivered with a vastly reduced energy consumption compared with conventional computers. Its first coprocessor is based on an established diffractive optical approach that uses the photons of low-power laser light instead of conventional electricity and its electrons. This inherently parallel technology is highly scalable and is the new paradigm of computing.
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Low-Power AI Startup Eta Compute Delivers First Commercial Chips
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- The firm pivoted away from riskier spiking neural networks using a new power management scheme
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+
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Eta Compute Debuts Spiking Neural Network Chip for Edge AI
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- Chip can learn on its own and inference at 100-microwatt scale, says company at Arm TechCon.
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-Achronix Rolls 7-nm FPGAs for AI
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- Achronix is back in the game of providing full-fledged FPGAs with a new high-end 7-nm family, joining the Gold Rush of silicon to accelerate deep learning. It aims to leverage novel design of its AI block, a new on-chip network, and use of GDDR6 memory to provide similar performance at a lower cost than larger rivals Intel and Xilinx.
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-Startup Runs AI in Novel SRAM
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- Areanna is the latest example of an explosion of new architectures spawned by the rise of deep learning. The debut of a whole new approach to computing has fired imaginations of engineers around the industry hoping to be the next Hewlett and Packard.
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-NeuroBlade Preps Inference Chip
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- Add NeuroBlade to the dozens of startups working on AI silicon. The Israeli company just closed a $23 million Series A, led by the founder of Check Point Software and with participation from Intel Capital.
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-Bill Gates just backed a chip startup that uses light to turbocharge AI
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- Luminous Computing has developed an optical microchip that runs AI models much faster than other semiconductors while using less power.
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-Chip startup Efinix hopes to bootstrap AI efforts in IoT
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- Six-year-old startup Efinix has created an intriguing twist on the FPGA technology dominated by Intel and Xiliinx; the company hopes its energy-efficient chips will bootstrap the market for embedded AI in the Internet of Things.
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AIStorm raises $13.2 million for AI edge computing chips
+
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- David Schie, a former senior executive at Maxim, Micrel, and Semtech, thinks both markets are ripe for disruption. He — along with WSI, Toshiba, and Arm veterans Robert Barker, Andreas Sibrai, and Cesar Matias — in 2011 cofounded AIStorm, a San Jose-based artificial intelligence (AI) startup that develops chipsets that can directly process data from wearables, handsets, automotive devices, smart speakers, and other internet of things (IoT) devices.
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@@ -947,79 +481,9 @@
Aug 2025 — Second-generation MLSoC Modalix ships for edge / Physical AI (robots, industrial, automotive, vision), targeting CNNs + Transformers/LLMs/GenAI under ~10W, with SoM/devkits and the LLiMa framework for on-device LLM deployment.
-MLSoC Modalix product family announcement (2024) ·
-Modalix PCIe card for industrial edge LLMs (2026)
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-SiMa.ai Raises $30 Million in Series A (historical)
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- SAN JOSE, Calif.--(BUSINESS WIRE)--SiMa.ai, the company enabling high performance machine learning to go green, today announced its Machine Learning SoC (MLSoC) platform – the industry’s first unified solution to support traditional compute with high performance, lowest power, safe and secure machine learning inference. Delivering the highest frames per second per watt, SiMa.ai’s MLSoC is the first machine learning platform to break the 1000 FPS/W barrier for ResNet-501. In customer engagements, the company has demonstrated 10-30x improvement in FPS/W through its automated software flow across a wide range of embedded edge applications, over today’s competing solutions. The platform will provide machine learning solutions that range from 50 TOPs@5W to 200 TOPs@20W, delivering an industry first of 10 TOPs/W for high performance inference.
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-SiMa.ai™ Introduces MLSoC™ – First Machine Learning Platform to Break 1000 FPS/W Barrier with 10-30x Improvement over Alternative Solutions
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- SiMa.ai, the company enabling high performance machine learning to go green, today announced its Machine Learning SoC (MLSoC) platform – the industry’s first unified solution to support traditional compute with high performance, lowest power, safe and secure machine learning inference. Delivering the highest frames per second per watt, SiMa.ai’s MLSoC is the first machine learning platform to break the 1000 FPS/W barrier for ResNet-501. In customer engagements, the company has demonstrated 10-30x improvement in FPS/W through its automated software flow across a wide range of embedded edge applications, over today’s competing solutions. The platform will provide machine learning solutions that range from 50 TOPs@5W to 200 TOPs@20W, delivering an industry first of 10 TOPs/W for high performance inference.
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-Untether AI nabs $125M for AI acceleration chips
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- Untether AI, a startup developing custom-built chips for AI inferencing workloads, today announced it has raised $125 million from Tracker Capital Management and Intel Capital. The round, which was oversubscribed and included participation from Canada Pension Plan Investment Board and Radical Ventures, will be used to support customer expansion.
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-GrAI Matter Labs Reveals NeuronFlow Technology and Announces GrAIFlow SDK
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- GrAI Matter Labs (aka GML), a neuromorphic computing pioneer today revealed NeuronFlow – a new programmable processor technology – and announced an early access program to its GrAIFlow software development kit.
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-Rain Neuromorphics on Crunchbase
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- We build artificial intelligence processors, inspired by the brain. Our mission is to enable brain-scale intelligence.
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-Applied Brain Research on Crunchbase
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- ABR makes the world's most advanced neuromoprhic compiler, runtime and libraries for the emerging space of neuromorphic computing.
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-XMOS adapts Xcore into AIoT ‘crossover processor’
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- EE Times exclusive! The new chip targets AI-powered voice interfaces in IoT devices — “the most important AI workload at the endpoint.”
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-XMOS unveils Xcore.ai, a powerful chip designed for AI processing at the edge
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- The latest xcore.ai is a crossover chip designed to deliver high-performance AI, digital signal processing, control, and input/output in a single device with prices from $1.
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- We design and produce AI processors and the software to run them in data centers. Our unique approach optimizes for inference with the focus on performance, power efficiency, and ease of use; and at the same time our approach enables cost-effective training.
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+
@@ -1027,139 +491,39 @@
Jan 2026 — FuriosaAI’s RNGD (Tensor Contraction Processor, TSMC 5nm, ~180W PCIe) entered volume shipment for LLM / agentic inference; NXT RNGD servers pack multiple cards into air-cooled, ~3kW-class systems.
-
FuriosaAI partners with Broadcom on next-generation inference platform
May 2026 — Strategic collaboration to evolve TCP into a scale-up multi-die inference platform with Broadcom Ethernet/PCIe switching for hyperscale agentic workloads.
-Equinix Lisbon RNGD deployment (Jul 2026)
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- Corerain provides ultra-high performance AI acceleration chips and the world's first streaming engine-based AI development platform.
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-Perceive emerges from stealth with Ergo edge AI chip
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- On-device computing solutions startup Perceive emerged from stealth today with its first product: the Ergo edge processor for AI inference. CEO Steve Teig claims the chip, which is designed for consumer devices like security cameras, connected appliances, and mobile phones, delivers “breakthrough” accuracy and performance in its class.
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-SimpleMachines, Inc. Debuts First-of-its-Kind High Performance Chip
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- As traditional chip makers struggle to embrace the challenges presented by the rapidly evolving AI software landscape, a San Jose startup has announced it has working silicon and a whole new future-proof chip paradigm to address these issues.
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-The SimpleMachines, Inc. (SMI) team – which includes leading research scientists and industry heavyweights formerly of Qualcomm, Intel and Sun Microsystems – has created a first-of-its-kind easily programmable, high-performance chip that will accelerate a wide variety of AI and machine-learning applications.
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-NeuReality lands $35M to bring AI accelerator chips to market
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- NeuReality, a startup developing AI inferencing accelerator chips, has raised $35 million in new venture capital.
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-NeuReality unveiled NR1-P, A novel AI-centric inference platform
+
+
+Sagence AI (ex–Analog Inference)
+Analog in-memory compute for datacenter inference (2024–2026)
- NeuReality has unveiled NR1-P, a novel AI-centric inference platform. NeuReality has already started demonstrating its AI-centric platform to customers and partners. NeuReality has redefined today’s outdated AI system architecture by developing an AI-centric inference platform based on a new type of System-on-Chip (SoC).
+ Rebranded from Analog Inference (Nov 2024). Continues analog compute-in-memory accelerators aimed at energy-efficient LLM / vision inference; active on the 2025–2026 AI infra circuit.
-NeuReality raises $8M for its novel AI inferencing platform
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- NeuReality, an Israeli AI hardware startup that is working on a novel approach to improving AI inferencing platforms by doing away with the current CPU-centric model, is coming out of stealth today and announcing an $8 million seed round.
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Analog inference startup raises $10.6 million
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- The company is backed by Khosla Ventures and is developing its first generation of products for AI computing at the edge. The company raised $4.5 million shortly after its formation in March 2018, so the latest tranche brings the total raised to-date to $15.1 million
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Quadric Announces Unified Silicon and Software Platform Optimized for On-Device AI
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- BURLINGAME, Calif., June 22, 2021 — Quadric (quadric.io), an innovator in high-performance edge processing, has introduced a unified silicon and software platform that unlocks the power of on-device AI.
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-EdgeQ reveals more details behind its next-gen 5G/AI chip
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- 5G is the current revolution in wireless technology, and every chip company old and new is trying to burrow their way into this ultra-competitive — but extremely lucrative — market. One of the most interesting new players in the space is EdgeQ, a startup with a strong technical pedigree via Qualcomm that we covered last year after it raised a nearly $40 million Series A.
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-Innatera Unveils Neuromorphic AI Chip to Accelerate Spiking Networks
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- Innatera, the Dutch startup making neuromorphic AI accelerators for spiking neural networks, has produced its first chips, gauged their performance, and revealed details of their architecture.
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-Redpine Founder Launches AI Processor Startup
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- Ceremorphic, an AI chip startup emerging from stealth mode this week, is readying a heterogeneous AI processor aimed at model training in data centers, automotive, high-performance computing, robotics and other emerging applications.
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-Aspinity Analog ML Chip Allows Battery-Powered “Always On”
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- Machine learning (ML) is all about massive amounts of processing, DSP, etc., right? Maybe not, according to the team at Aspinity. The company continues to push ahead on the analog front. The latest member of the company’s analogML family, the AML100, operates completely in the analog domain. As a result, it can reduce always-on system power by 95% (for the record, we had to walk through this a couple of times before I believed them).
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-TetraMem enjoyed an exciting public debut of our analog in-memory compute technology at the Linley Spring 2022 Processor Conference.
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-Exclusive: AI chip startup d-Matrix raises $110 million with backing from Microsoft
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- Sept 6 (Reuters) - Silicon Valley-based artificial intelligence chip startup d-Matrix has raised $110 million from investors that include Microsoft Corp (MSFT.O) at a time when many chip companies are struggling to raise cash.
-
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-D-Matrix AI chip promises efficient transformer processing
+d-Matrix Corsair — digital in-memory compute for inference
- The startup combines digital in-memory compute and chiplet implementations for data-center-grade inference.
-
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+ 2024–2026 — Corsair accelerators target low-latency / high-efficiency datacenter LLM inference with digital compute-in-memory; expanding software and cloud partner footprint.
+
-
+
Nvidia competitor Etched hits $5B valuation, $1B in sales for AI chip
Jun 2026 — Etched reports TSMC-manufactured transformer-specialized ASICs powering “frontier inference clusters,” with ~$800M raised to date (including a $500M round at a $5B valuation) and ~$1B in booked system orders.
-
Etched is building an AI chip that only runs one type of model
2024 Series A coverage of Sohu: an ASIC purpose-built for Transformer inference (rather than general-purpose GPU programmability), aiming for higher tokens/sec and better energy efficiency on LLM serving.
@@ -1167,9 +531,10 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
V. China AI Accelerator Vendors
+
Domestic training/inference accelerators have become central under export-control and procurement policies. Coverage below highlights widely reported product lines; treat performance claims as vendor-/press-reported unless independently benchmarked.
-
+
@@ -1180,9 +545,7 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
2025 — Huawei scaled Ascend 910B/910C deployments and launched Atlas 900 A3 SuperPoD (up to 384× Ascend 910C), also referred to in cloud form as CloudMatrix384-class supernodes, for large-model training and serving. Ascend 950-class follow-ons are on Huawei’s roadmap.
-Serving Large Language Models on Huawei CloudMatrix384 (technical paper)
-
-
+
Cambricon (寒武纪)
@@ -1191,12 +554,7 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Reports describe aggressive 2026 volume plans for Siyuan / MLU-class accelerators (including Siyuan 590 and next-gen 690 messaging), serving Chinese internet/cloud customers as a leading pure-play domestic AI-chip vendor.
-Cambricon MLU590 overview
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- MLU500-series cloud accelerator commonly cited for China data-center training/inference deployments with MLU-Link multi-card interconnect and Cambricon’s NeuWare / BANG software stack.
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+
China AI chipmaker Biren soars in Hong Kong debut
@@ -1204,7 +562,7 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Jan 2026 — Shanghai Biren Technology listed in Hong Kong (6082.HK), raising ~HK$5.58B. Best known for BR100-class GPGPU / AI accelerators positioned as high-performance domestic alternatives.
-
+
Moore Threads surges over 400% on Shanghai trading debut
@@ -1212,25 +570,24 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Dec 2025 — Full-function GPU vendor (MTT S4000 / S5000 class AI cards, MUSA software stack) completed a ~$1.1B STAR Market IPO amid China’s domestic GPU push.
-
-
-Enflame (燧原)
+
-
Enflame CloudBlazer / DTU AI accelerators
+
+
+Enflame CloudBlazer / iGCU accelerators
- Shanghai-based accelerator vendor offering CloudBlazer training/inference products (DTU architecture) for domestic intelligent-computing centers; frequently grouped with China’s “GPU dragons” alongside Biren, Moore Threads, and MetaX. Open-source ecosystem links: EnflameTechnology on GitHub.
+ 2024–2026 — Domestic training/inference GPUs (CloudBlazer series) deployed in China intelligent-computing centers with TopsRider software stack updates for LLM workloads.
-
+
-Horizon Robotics (地平线)
-
-Horizon Journey 6 / BPU Nash automotive AI processors
+Horizon Robotics (地平线)
+Horizon Journey 6 / BPU Nash
- Leading China ADAS / autonomous-driving compute vendor with Journey-series BPU SoCs (Journey 6 adds BPU Nash with stronger Transformer support) widely designed into passenger vehicles; focuses on efficient vision/transformer perception at the edge rather than datacenter LLM training.
+ 2024–2026 — Journey-series automotive AI SoCs (Journey 6 with BPU Nash / stronger Transformer support) widely designed into China passenger vehicles for L2+ assisted driving.
-
+
Black Sesame Technologies (黑芝麻智能)
@@ -1239,9 +596,7 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Hong Kong-listed (02533.HK, Aug 2024) automotive AI SoC vendor. Huashan A1000-family chips target L2+/L3 assisted driving with automotive-grade safety certifications and are reported in mass-production vehicle models; Huashan A2000 messaging extends toward higher-performance / cross-domain AI inference.
-Caixin: Black Sesame Hong Kong IPO
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-
+
Chinese GPU Maker MetaX Doubles Revenue Amid Push for Domestic Chips
@@ -1249,9 +604,7 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Shanghai MetaX (STAR: 688802.SH, listed Dec 2025) ships C-series training/inference GPUs (C500 mass production; C600 domestic-process follow-on) with the MXMACA software stack for AI clusters and intelligent-computing centers.
-MetaX scales production to meet rising AI chip demand
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-
+
Hygon DCU completes Day-0 adaptation for DeepSeek-V4
@@ -1259,9 +612,7 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Hygon’s Deep Computing Unit (DCU) GPGPU-class accelerators and DTK software stack are widely used in China for large-model training/inference; 2025–2026 coverage highlights same-day DeepSeek model adaptations alongside Ascend and Cambricon.
-HYGON-AI DCU inference cookbook (open deployment guides)
-
-
+
Iluvatar CoreX targets Nvidia’s Rubin with GPU road map
@@ -1269,7 +620,7 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
Jan 2026 — Hong Kong-listed Iluvatar CoreX outlined a multi-generation GPU architecture roadmap (Tianshu / Tianxuan / Tianji / Tianquan messaging) aiming to close the gap with Nvidia Hopper→Blackwell→Rubin class platforms, with BI-V150-class products already in AI training/inference deployments.
-
+
AI Chip Compilers
@@ -1296,7 +647,7 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
-
+
AI Chip Benchmarks
@@ -1316,7 +667,7 @@ The SimpleMachines, Inc. (SMI) team – which includes leading research scientis
-
+
Reference
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