From 3bf24527d07dcac1e7cc4d47cfcdce5f80d88508 Mon Sep 17 00:00:00 2001 From: Tracy Usher Date: Thu, 21 May 2026 11:58:11 -0700 Subject: [PATCH 01/11] As per Haiwang Yu, we are moving to a scheme where the YZ simulation is broken into four "daq" modules, one per TPC. These files make that definition, for standard YZ sim and also for overlay --- .../detsimmodules_wirecell_per_TPC_ICARUS.fcl | 1084 +++++++++++++++++ ...per-tpc-sim-drift-simchannel-yzsim.jsonnet | 418 +++++++ 2 files changed, 1502 insertions(+) create mode 100644 icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_per_TPC_ICARUS.fcl create mode 100644 icaruscode/TPC/ICARUSWireCell/icarus/wcls-per-tpc-sim-drift-simchannel-yzsim.jsonnet diff --git a/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_per_TPC_ICARUS.fcl b/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_per_TPC_ICARUS.fcl new file mode 100644 index 000000000..5d316110a --- /dev/null +++ b/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_per_TPC_ICARUS.fcl @@ -0,0 +1,1084 @@ +// We need this for Detector Properties +#include "services_basic_icarus.fcl" +// We need this for diffusion +#include "simulationservices_icarus.fcl" + +BEGIN_PROLOG + +icarus_simwire_wirecell: +{ + module_type : WireCellToolkit + wcls_main: + { + tool_type: WCLS + apps: ["Pgrapher"] + //logsinks: ["stdout"] + //loglevels: ["magnify:debug"] + plugins: ["WireCellPgraph", "WireCellGen","WireCellSio","WireCellRoot","WireCellLarsoft", "WireCellHio"] + // needs to be found via your WIRECELL_PATH + configs: ["pgrapher/experiment/icarus/wcls-multitpc-sim-drift-simchannel-yzsim-refactored.jsonnet"] + // Contract note: these exact "type:name" must be used to identify + // the configuration data structures for these components in the Jsonnet. + inputers: ["wclsSimDepoSetSource:electron"] + outputers: + [ + "wclsDepoSetSimChannelSink:postdriftold", + "wclsDepoFluxWriter:postdrift", + "wclsFrameSaver:simdigits0", + "wclsFrameSaver:simdigits1", + "wclsFrameSaver:simdigits2", + "wclsFrameSaver:simdigits3" + ] + // Make available parameters via Jsonnet's std.extVar() + params: { + files_fields: "icarus_fnal_fit_ks_P0nom.json.bz2" + file_rcresp: "icarus_fnal_rc_tail.json" # use the RCResponse by default + cathode_input_format: "array" # scalar (flat) or array (bent) + SimEnergyDepositLabel: "ionization" + } + structs: { + # load values from simulationservices_icarus.fcl + # Longitudinal diffusion constant [cm2/ns] + DL: @local::icarus_largeantparameters.LongitudinalDiffusion + # Transverse diffusion constant [cm2/ns] + DT: @local::icarus_largeantparameters.TransverseDiffusion + # load values from services_common_icarus.fcl + # Electron lifetime [microseconds] + lifetime: @local::icarus_detproperties.Electronlifetime + # Electron drift speed, assumes a certain applied E-field [mm/us] + # driftSpeed: 1.5756 + # Scaling Parameters from int and coh noise components + int_noise_scale: 1.0 + coh_noise_scale: 1.0 + + overlay_drifter: false # default drifter by default + + # Gain and shaping time + gain0: 17.05212 # mV/fC + gain1: 12.6181926 # mV/fC + gain2: 13.0261362 # mV/fC + + shaping0: 1.3 # us + shaping1: 1.45 # us + shaping2: 1.3 # us + + # Time offsets for truth matching + time_offset_u: 0.0 # us + time_offset_v: 0.0 # us + time_offset_y: 0.0 # us + + } + } +} + +# SimChannel only (SConly) CONFIG +icarus_simwire_wirecell_SConly: @local::icarus_simwire_wirecell +icarus_simwire_wirecell_SConly.wcls_main.configs: ["pgrapher/experiment/icarus/wcls-multitpc-sim-drift-simchannel-true.jsonnet"] +icarus_simwire_wirecell_SConly.wcls_main.outputers:[ + "wclsDepoFluxWriter:postdrift" +] + +icarus_simwire_wirecell_shifted: @local::icarus_simwire_wirecell +icarus_simwire_wirecell_shifted.wcls_main.params.SimEnergyDepositLabel: "shifted" + +icarus_simwire_wirecell_filtersed: @local::icarus_simwire_wirecell +icarus_simwire_wirecell_filtersed.wcls_main.params.SimEnergyDepositLabel: "filtersed" + + +# The following four sets of definitions implement the yz simulation as four separate modules - one per TPC + +icarus_simwire_wirecell_yz_0: { + module_type: "WireCellToolkit" + wcls_main: { + apps: [ + "Pgrapher:pgrapher0" + ] + configs: [ + "pgrapher/experiment/icarus/wcls-per-tpc-sim-drift-simchannel-yzsim.jsonnet" + ] + logsinks: ["stdout"] + loglevels: ["info"] + inputers: [ + "wclsSimDepoSetSource:electron" + ] + outputers: [ + "wclsDepoFluxWriter:postdrift0", + "wclsDepoFluxWriter:postdrift1", + "wclsDepoFluxWriter:postdrift2", + "wclsDepoFluxWriter:postdrift3", + "wclsDepoFluxWriter:postdrift4", + "wclsDepoFluxWriter:postdrift5", + "wclsDepoFluxWriter:postdrift6", + "wclsDepoFluxWriter:postdrift7", + "wclsDepoFluxWriter:postdrift8", + "wclsDepoFluxWriter:postdrift9", + "wclsDepoFluxWriter:postdrift10", + "wclsDepoFluxWriter:postdrift11", + "wclsDepoFluxWriter:postdrift12", + "wclsDepoFluxWriter:postdrift13", + "wclsDepoFluxWriter:postdrift14", + "wclsDepoFluxWriter:postdrift15", + "wclsDepoFluxWriter:postdrift16", + "wclsDepoFluxWriter:postdrift17", + "wclsDepoFluxWriter:postdrift18", + "wclsDepoFluxWriter:postdrift19", + "wclsDepoFluxWriter:postdrift20", + "wclsDepoFluxWriter:postdrift21", + "wclsDepoFluxWriter:postdrift22", + "wclsDepoFluxWriter:postdrift23", + "wclsDepoFluxWriter:postdrift24", + "wclsDepoFluxWriter:postdrift25", + "wclsDepoFluxWriter:postdrift26", + "wclsDepoFluxWriter:postdrift27", + "wclsDepoFluxWriter:postdrift28", + "wclsDepoFluxWriter:postdrift29", + "wclsDepoFluxWriter:postdrift30", + "wclsDepoFluxWriter:postdrift31", + "wclsDepoFluxWriter:postdrift32", + "wclsDepoFluxWriter:postdrift33", + "wclsDepoFluxWriter:postdrift34", + "wclsDepoFluxWriter:postdrift35", + "wclsDepoFluxWriter:postdrift36", + "wclsDepoFluxWriter:postdrift37", + "wclsDepoFluxWriter:postdrift38", + "wclsDepoFluxWriter:postdrift39", + "wclsDepoFluxWriter:postdrift40", + "wclsDepoFluxWriter:postdrift41", + "wclsDepoFluxWriter:postdrift42", + "wclsDepoFluxWriter:postdrift43", + "wclsDepoFluxWriter:postdrift44", + "wclsDepoFluxWriter:postdrift45", + "wclsDepoFluxWriter:postdrift46", + "wclsDepoFluxWriter:postdrift47", + "wclsDepoFluxWriter:postdrift48", + "wclsDepoFluxWriter:postdrift49", + "wclsDepoFluxWriter:postdrift50", + "wclsDepoFluxWriter:postdrift51", + "wclsDepoFluxWriter:postdrift52", + "wclsDepoFluxWriter:postdrift53", + "wclsDepoFluxWriter:postdrift54", + "wclsDepoFluxWriter:postdrift55", + "wclsDepoFluxWriter:postdrift56", + "wclsDepoFluxWriter:postdrift57", + "wclsDepoFluxWriter:postdrift58", + "wclsDepoFluxWriter:postdrift59", + "wclsDepoFluxWriter:postdrift60", + "wclsDepoFluxWriter:postdrift61", + "wclsDepoFluxWriter:postdrift62", + "wclsDepoFluxWriter:postdrift63", + "wclsDepoFluxWriter:postdrift64", + "wclsDepoFluxWriter:postdrift65", + "wclsDepoFluxWriter:postdrift66", + "wclsDepoFluxWriter:postdrift67", + "wclsDepoFluxWriter:postdrift68", + "wclsDepoFluxWriter:postdrift69", + "wclsDepoFluxWriter:postdrift70", + "wclsDepoFluxWriter:postdrift71", + "wclsDepoFluxWriter:postdrift72", + "wclsDepoFluxWriter:postdrift73", + "wclsDepoFluxWriter:postdrift74", + "wclsDepoFluxWriter:postdrift75", + "wclsDepoFluxWriter:postdrift76", + "wclsDepoFluxWriter:postdrift77", + "wclsDepoFluxWriter:postdrift78", + "wclsDepoFluxWriter:postdrift79", + "wclsDepoFluxWriter:postdrift80", + "wclsDepoFluxWriter:postdrift81", + "wclsDepoFluxWriter:postdrift82", + "wclsDepoFluxWriter:postdrift83", + "wclsDepoFluxWriter:postdrift84", + "wclsDepoFluxWriter:postdrift85", + "wclsDepoFluxWriter:postdrift86", + "wclsDepoFluxWriter:postdrift87", + "wclsDepoFluxWriter:postdrift88", + "wclsDepoFluxWriter:postdrift89", + "wclsFrameSaver:simdigits0" + ] + params: { + SimEnergyDepositLabel: "filtersed" + cathode_input_format: "array" + file_rcresp: "icarus_fnal_rc_tail.json" + tpc_idx: "0" + files_fields: "\"icarus_final_fit_dqdx0.json.bz2\",\n \"icarus_final_fit_dqdx1.json.bz2\",\n \"icarus_final_fit_dqdx2.json.bz2\",\n \"icarus_final_fit_dqdx3.json.bz2\",\n \"icarus_final_fit_dqdx4.json.bz2\",\n \"icarus_final_fit_dqdx5.json.bz2\",\n \"icarus_final_fit_dqdx6.json.bz2\",\n \"icarus_final_fit_dqdx7.json.bz2\",\n \"icarus_final_fit_dqdx8.json.bz2\",\n \"icarus_final_fit_dqdx9.json.bz2\",\n \"icarus_final_fit_dqdx10.json.bz2\",\n \"icarus_final_fit_dqdx11.json.bz2\",\n \"icarus_final_fit_dqdx12.json.bz2\",\n \"icarus_final_fit_dqdx13.json.bz2\",\n \"icarus_final_fit_dqdx14.json.bz2\"" + } + plugins: [ + "WireCellPgraph", + "WireCellGen", + "WireCellSio", + "WireCellRoot", + "WireCellLarsoft", + "WireCellHio" + ] + structs: { + DL: 4e-9 + DT: 8.8e-9 + coh_noise_scale: 1 + gain0: 1.705212e1 + gain1: 1.26181926e1 + gain2: 1.30261362e1 + int_noise_scale: 1 + lifetime: 3000 + lifetime_TPCEE: 3000 + lifetime_TPCEW: 3000 + lifetime_TPCWE: 3000 + lifetime_TPCWW: 3000 + overlay_drifter: false + shaping0: 1.3 + shaping1: 1.45 + shaping2: 1.3 + time_offset_u: 0 + time_offset_v: 0 + time_offset_y: 0 + } + tool_type: "WCLS" + } +} + +icarus_simwire_wirecell_yz_1: { + module_type: "WireCellToolkit" + wcls_main: { + apps: [ + "Pgrapher:pgrapher1" + ] + configs: [ + "pgrapher/experiment/icarus/wcls-per-tpc-sim-drift-simchannel-yzsim.jsonnet" + ] + logsinks: ["stdout"] + loglevels: ["info"] + inputers: [ + "wclsSimDepoSetSource:electron" + ] + outputers: [ + "wclsDepoFluxWriter:postdrift90", + "wclsDepoFluxWriter:postdrift91", + "wclsDepoFluxWriter:postdrift92", + "wclsDepoFluxWriter:postdrift93", + "wclsDepoFluxWriter:postdrift94", + "wclsDepoFluxWriter:postdrift95", + "wclsDepoFluxWriter:postdrift96", + "wclsDepoFluxWriter:postdrift97", + "wclsDepoFluxWriter:postdrift98", + "wclsDepoFluxWriter:postdrift99", + "wclsDepoFluxWriter:postdrift100", + "wclsDepoFluxWriter:postdrift101", + "wclsDepoFluxWriter:postdrift102", + "wclsDepoFluxWriter:postdrift103", + "wclsDepoFluxWriter:postdrift104", + "wclsDepoFluxWriter:postdrift105", + "wclsDepoFluxWriter:postdrift106", + "wclsDepoFluxWriter:postdrift107", + "wclsDepoFluxWriter:postdrift108", + "wclsDepoFluxWriter:postdrift109", + "wclsDepoFluxWriter:postdrift110", + "wclsDepoFluxWriter:postdrift111", + "wclsDepoFluxWriter:postdrift112", + "wclsDepoFluxWriter:postdrift113", + "wclsDepoFluxWriter:postdrift114", + "wclsDepoFluxWriter:postdrift115", + "wclsDepoFluxWriter:postdrift116", + "wclsDepoFluxWriter:postdrift117", + "wclsDepoFluxWriter:postdrift118", + "wclsDepoFluxWriter:postdrift119", + "wclsDepoFluxWriter:postdrift120", + "wclsDepoFluxWriter:postdrift121", + "wclsDepoFluxWriter:postdrift122", + "wclsDepoFluxWriter:postdrift123", + "wclsDepoFluxWriter:postdrift124", + "wclsDepoFluxWriter:postdrift125", + "wclsDepoFluxWriter:postdrift126", + "wclsDepoFluxWriter:postdrift127", + "wclsDepoFluxWriter:postdrift128", + "wclsDepoFluxWriter:postdrift129", + "wclsDepoFluxWriter:postdrift130", + "wclsDepoFluxWriter:postdrift131", + "wclsDepoFluxWriter:postdrift132", + "wclsDepoFluxWriter:postdrift133", + "wclsDepoFluxWriter:postdrift134", + "wclsDepoFluxWriter:postdrift135", + "wclsDepoFluxWriter:postdrift136", + "wclsDepoFluxWriter:postdrift137", + "wclsDepoFluxWriter:postdrift138", + "wclsDepoFluxWriter:postdrift139", + "wclsDepoFluxWriter:postdrift140", + "wclsDepoFluxWriter:postdrift141", + "wclsDepoFluxWriter:postdrift142", + "wclsDepoFluxWriter:postdrift143", + "wclsDepoFluxWriter:postdrift144", + "wclsDepoFluxWriter:postdrift145", + "wclsDepoFluxWriter:postdrift146", + "wclsDepoFluxWriter:postdrift147", + "wclsDepoFluxWriter:postdrift148", + "wclsDepoFluxWriter:postdrift149", + "wclsDepoFluxWriter:postdrift150", + "wclsDepoFluxWriter:postdrift151", + "wclsDepoFluxWriter:postdrift152", + "wclsDepoFluxWriter:postdrift153", + "wclsDepoFluxWriter:postdrift154", + "wclsDepoFluxWriter:postdrift155", + "wclsDepoFluxWriter:postdrift156", + "wclsDepoFluxWriter:postdrift157", + "wclsDepoFluxWriter:postdrift158", + "wclsDepoFluxWriter:postdrift159", + "wclsDepoFluxWriter:postdrift160", + "wclsDepoFluxWriter:postdrift161", + "wclsDepoFluxWriter:postdrift162", + "wclsDepoFluxWriter:postdrift163", + "wclsDepoFluxWriter:postdrift164", + "wclsDepoFluxWriter:postdrift165", + "wclsDepoFluxWriter:postdrift166", + "wclsDepoFluxWriter:postdrift167", + "wclsDepoFluxWriter:postdrift168", + "wclsDepoFluxWriter:postdrift169", + "wclsDepoFluxWriter:postdrift170", + "wclsDepoFluxWriter:postdrift171", + "wclsDepoFluxWriter:postdrift172", + "wclsDepoFluxWriter:postdrift173", + "wclsDepoFluxWriter:postdrift174", + "wclsDepoFluxWriter:postdrift175", + "wclsDepoFluxWriter:postdrift176", + "wclsDepoFluxWriter:postdrift177", + "wclsDepoFluxWriter:postdrift178", + "wclsDepoFluxWriter:postdrift179", + "wclsFrameSaver:simdigits1" + ] + params: { + SimEnergyDepositLabel: "filtersed" + cathode_input_format: "array" + file_rcresp: "icarus_fnal_rc_tail.json" + tpc_idx: "1" + files_fields: "\"icarus_final_fit_dqdx0.json.bz2\",\n \"icarus_final_fit_dqdx1.json.bz2\",\n \"icarus_final_fit_dqdx2.json.bz2\",\n \"icarus_final_fit_dqdx3.json.bz2\",\n \"icarus_final_fit_dqdx4.json.bz2\",\n \"icarus_final_fit_dqdx5.json.bz2\",\n \"icarus_final_fit_dqdx6.json.bz2\",\n \"icarus_final_fit_dqdx7.json.bz2\",\n \"icarus_final_fit_dqdx8.json.bz2\",\n \"icarus_final_fit_dqdx9.json.bz2\",\n \"icarus_final_fit_dqdx10.json.bz2\",\n \"icarus_final_fit_dqdx11.json.bz2\",\n \"icarus_final_fit_dqdx12.json.bz2\",\n \"icarus_final_fit_dqdx13.json.bz2\",\n \"icarus_final_fit_dqdx14.json.bz2\"" + } + plugins: [ + "WireCellPgraph", + "WireCellGen", + "WireCellSio", + "WireCellRoot", + "WireCellLarsoft", + "WireCellHio" + ] + structs: { + DL: 4e-9 + DT: 8.8e-9 + coh_noise_scale: 1 + gain0: 1.705212e1 + gain1: 1.26181926e1 + gain2: 1.30261362e1 + int_noise_scale: 1 + lifetime: 3000 + lifetime_TPCEE: 3000 + lifetime_TPCEW: 3000 + lifetime_TPCWE: 3000 + lifetime_TPCWW: 3000 + overlay_drifter: false + shaping0: 1.3 + shaping1: 1.45 + shaping2: 1.3 + time_offset_u: 0 + time_offset_v: 0 + time_offset_y: 0 + } + tool_type: "WCLS" + } +} + +icarus_simwire_wirecell_yz_2: { + module_type: "WireCellToolkit" + wcls_main: { + apps: [ + "Pgrapher:pgrapher2" + ] + configs: [ + "pgrapher/experiment/icarus/wcls-per-tpc-sim-drift-simchannel-yzsim.jsonnet" + ] + logsinks: ["stdout"] + loglevels: ["info"] + inputers: [ + "wclsSimDepoSetSource:electron" + ] + outputers: [ + "wclsDepoFluxWriter:postdrift180", + "wclsDepoFluxWriter:postdrift181", + "wclsDepoFluxWriter:postdrift182", + "wclsDepoFluxWriter:postdrift183", + "wclsDepoFluxWriter:postdrift184", + "wclsDepoFluxWriter:postdrift185", + "wclsDepoFluxWriter:postdrift186", + "wclsDepoFluxWriter:postdrift187", + "wclsDepoFluxWriter:postdrift188", + "wclsDepoFluxWriter:postdrift189", + "wclsDepoFluxWriter:postdrift190", + "wclsDepoFluxWriter:postdrift191", + "wclsDepoFluxWriter:postdrift192", + "wclsDepoFluxWriter:postdrift193", + "wclsDepoFluxWriter:postdrift194", + "wclsDepoFluxWriter:postdrift195", + "wclsDepoFluxWriter:postdrift196", + "wclsDepoFluxWriter:postdrift197", + "wclsDepoFluxWriter:postdrift198", + "wclsDepoFluxWriter:postdrift199", + "wclsDepoFluxWriter:postdrift200", + "wclsDepoFluxWriter:postdrift201", + "wclsDepoFluxWriter:postdrift202", + "wclsDepoFluxWriter:postdrift203", + "wclsDepoFluxWriter:postdrift204", + "wclsDepoFluxWriter:postdrift205", + "wclsDepoFluxWriter:postdrift206", + "wclsDepoFluxWriter:postdrift207", + "wclsDepoFluxWriter:postdrift208", + "wclsDepoFluxWriter:postdrift209", + "wclsDepoFluxWriter:postdrift210", + "wclsDepoFluxWriter:postdrift211", + "wclsDepoFluxWriter:postdrift212", + "wclsDepoFluxWriter:postdrift213", + "wclsDepoFluxWriter:postdrift214", + "wclsDepoFluxWriter:postdrift215", + "wclsDepoFluxWriter:postdrift216", + "wclsDepoFluxWriter:postdrift217", + "wclsDepoFluxWriter:postdrift218", + "wclsDepoFluxWriter:postdrift219", + "wclsDepoFluxWriter:postdrift220", + "wclsDepoFluxWriter:postdrift221", + "wclsDepoFluxWriter:postdrift222", + "wclsDepoFluxWriter:postdrift223", + "wclsDepoFluxWriter:postdrift224", + "wclsDepoFluxWriter:postdrift225", + "wclsDepoFluxWriter:postdrift226", + "wclsDepoFluxWriter:postdrift227", + "wclsDepoFluxWriter:postdrift228", + "wclsDepoFluxWriter:postdrift229", + "wclsDepoFluxWriter:postdrift230", + "wclsDepoFluxWriter:postdrift231", + "wclsDepoFluxWriter:postdrift232", + "wclsDepoFluxWriter:postdrift233", + "wclsDepoFluxWriter:postdrift234", + "wclsDepoFluxWriter:postdrift235", + "wclsDepoFluxWriter:postdrift236", + "wclsDepoFluxWriter:postdrift237", + "wclsDepoFluxWriter:postdrift238", + "wclsDepoFluxWriter:postdrift239", + "wclsDepoFluxWriter:postdrift240", + "wclsDepoFluxWriter:postdrift241", + "wclsDepoFluxWriter:postdrift242", + "wclsDepoFluxWriter:postdrift243", + "wclsDepoFluxWriter:postdrift244", + "wclsDepoFluxWriter:postdrift245", + "wclsDepoFluxWriter:postdrift246", + "wclsDepoFluxWriter:postdrift247", + "wclsDepoFluxWriter:postdrift248", + "wclsDepoFluxWriter:postdrift249", + "wclsDepoFluxWriter:postdrift250", + "wclsDepoFluxWriter:postdrift251", + "wclsDepoFluxWriter:postdrift252", + "wclsDepoFluxWriter:postdrift253", + "wclsDepoFluxWriter:postdrift254", + "wclsDepoFluxWriter:postdrift255", + "wclsDepoFluxWriter:postdrift256", + "wclsDepoFluxWriter:postdrift257", + "wclsDepoFluxWriter:postdrift258", + "wclsDepoFluxWriter:postdrift259", + "wclsDepoFluxWriter:postdrift260", + "wclsDepoFluxWriter:postdrift261", + "wclsDepoFluxWriter:postdrift262", + "wclsDepoFluxWriter:postdrift263", + "wclsDepoFluxWriter:postdrift264", + "wclsDepoFluxWriter:postdrift265", + "wclsDepoFluxWriter:postdrift266", + "wclsDepoFluxWriter:postdrift267", + "wclsDepoFluxWriter:postdrift268", + "wclsDepoFluxWriter:postdrift269", + "wclsFrameSaver:simdigits2" + ] + params: { + SimEnergyDepositLabel: "filtersed" + cathode_input_format: "array" + file_rcresp: "icarus_fnal_rc_tail.json" + tpc_idx: "2" + files_fields: "\"icarus_final_fit_dqdx0.json.bz2\",\n \"icarus_final_fit_dqdx1.json.bz2\",\n \"icarus_final_fit_dqdx2.json.bz2\",\n \"icarus_final_fit_dqdx3.json.bz2\",\n \"icarus_final_fit_dqdx4.json.bz2\",\n \"icarus_final_fit_dqdx5.json.bz2\",\n \"icarus_final_fit_dqdx6.json.bz2\",\n \"icarus_final_fit_dqdx7.json.bz2\",\n \"icarus_final_fit_dqdx8.json.bz2\",\n \"icarus_final_fit_dqdx9.json.bz2\",\n \"icarus_final_fit_dqdx10.json.bz2\",\n \"icarus_final_fit_dqdx11.json.bz2\",\n \"icarus_final_fit_dqdx12.json.bz2\",\n \"icarus_final_fit_dqdx13.json.bz2\",\n \"icarus_final_fit_dqdx14.json.bz2\"" + } + plugins: [ + "WireCellPgraph", + "WireCellGen", + "WireCellSio", + "WireCellRoot", + "WireCellLarsoft", + "WireCellHio" + ] + structs: { + DL: 4e-9 + DT: 8.8e-9 + coh_noise_scale: 1 + gain0: 1.705212e1 + gain1: 1.26181926e1 + gain2: 1.30261362e1 + int_noise_scale: 1 + lifetime: 3000 + lifetime_TPCEE: 3000 + lifetime_TPCEW: 3000 + lifetime_TPCWE: 3000 + lifetime_TPCWW: 3000 + overlay_drifter: false + shaping0: 1.3 + shaping1: 1.45 + shaping2: 1.3 + time_offset_u: 0 + time_offset_v: 0 + time_offset_y: 0 + } + tool_type: "WCLS" + } +} +icarus_simwire_wirecell_yz_3: { + module_type: "WireCellToolkit" + wcls_main: { + apps: [ + "Pgrapher:pgrapher3" + ] + configs: [ + "pgrapher/experiment/icarus/wcls-per-tpc-sim-drift-simchannel-yzsim.jsonnet" + ] + logsinks: ["stdout"] + loglevels: ["info"] + inputers: [ + "wclsSimDepoSetSource:electron" + ] + outputers: [ + "wclsDepoFluxWriter:postdrift270", + "wclsDepoFluxWriter:postdrift271", + "wclsDepoFluxWriter:postdrift272", + "wclsDepoFluxWriter:postdrift273", + "wclsDepoFluxWriter:postdrift274", + "wclsDepoFluxWriter:postdrift275", + "wclsDepoFluxWriter:postdrift276", + "wclsDepoFluxWriter:postdrift277", + "wclsDepoFluxWriter:postdrift278", + "wclsDepoFluxWriter:postdrift279", + "wclsDepoFluxWriter:postdrift280", + "wclsDepoFluxWriter:postdrift281", + "wclsDepoFluxWriter:postdrift282", + "wclsDepoFluxWriter:postdrift283", + "wclsDepoFluxWriter:postdrift284", + "wclsDepoFluxWriter:postdrift285", + "wclsDepoFluxWriter:postdrift286", + "wclsDepoFluxWriter:postdrift287", + "wclsDepoFluxWriter:postdrift288", + "wclsDepoFluxWriter:postdrift289", + "wclsDepoFluxWriter:postdrift290", + "wclsDepoFluxWriter:postdrift291", + "wclsDepoFluxWriter:postdrift292", + "wclsDepoFluxWriter:postdrift293", + "wclsDepoFluxWriter:postdrift294", + "wclsDepoFluxWriter:postdrift295", + "wclsDepoFluxWriter:postdrift296", + "wclsDepoFluxWriter:postdrift297", + "wclsDepoFluxWriter:postdrift298", + "wclsDepoFluxWriter:postdrift299", + "wclsDepoFluxWriter:postdrift300", + "wclsDepoFluxWriter:postdrift301", + "wclsDepoFluxWriter:postdrift302", + "wclsDepoFluxWriter:postdrift303", + "wclsDepoFluxWriter:postdrift304", + "wclsDepoFluxWriter:postdrift305", + "wclsDepoFluxWriter:postdrift306", + "wclsDepoFluxWriter:postdrift307", + "wclsDepoFluxWriter:postdrift308", + "wclsDepoFluxWriter:postdrift309", + "wclsDepoFluxWriter:postdrift310", + "wclsDepoFluxWriter:postdrift311", + "wclsDepoFluxWriter:postdrift312", + "wclsDepoFluxWriter:postdrift313", + "wclsDepoFluxWriter:postdrift314", + "wclsDepoFluxWriter:postdrift315", + "wclsDepoFluxWriter:postdrift316", + "wclsDepoFluxWriter:postdrift317", + "wclsDepoFluxWriter:postdrift318", + "wclsDepoFluxWriter:postdrift319", + "wclsDepoFluxWriter:postdrift320", + "wclsDepoFluxWriter:postdrift321", + "wclsDepoFluxWriter:postdrift322", + "wclsDepoFluxWriter:postdrift323", + "wclsDepoFluxWriter:postdrift324", + "wclsDepoFluxWriter:postdrift325", + "wclsDepoFluxWriter:postdrift326", + "wclsDepoFluxWriter:postdrift327", + "wclsDepoFluxWriter:postdrift328", + "wclsDepoFluxWriter:postdrift329", + "wclsDepoFluxWriter:postdrift330", + "wclsDepoFluxWriter:postdrift331", + "wclsDepoFluxWriter:postdrift332", + "wclsDepoFluxWriter:postdrift333", + "wclsDepoFluxWriter:postdrift334", + "wclsDepoFluxWriter:postdrift335", + "wclsDepoFluxWriter:postdrift336", + "wclsDepoFluxWriter:postdrift337", + "wclsDepoFluxWriter:postdrift338", + "wclsDepoFluxWriter:postdrift339", + "wclsDepoFluxWriter:postdrift340", + "wclsDepoFluxWriter:postdrift341", + "wclsDepoFluxWriter:postdrift342", + "wclsDepoFluxWriter:postdrift343", + "wclsDepoFluxWriter:postdrift344", + "wclsDepoFluxWriter:postdrift345", + "wclsDepoFluxWriter:postdrift346", + "wclsDepoFluxWriter:postdrift347", + "wclsDepoFluxWriter:postdrift348", + "wclsDepoFluxWriter:postdrift349", + "wclsDepoFluxWriter:postdrift350", + "wclsDepoFluxWriter:postdrift351", + "wclsDepoFluxWriter:postdrift352", + "wclsDepoFluxWriter:postdrift353", + "wclsDepoFluxWriter:postdrift354", + "wclsDepoFluxWriter:postdrift355", + "wclsDepoFluxWriter:postdrift356", + "wclsDepoFluxWriter:postdrift357", + "wclsDepoFluxWriter:postdrift358", + "wclsDepoFluxWriter:postdrift359", + "wclsFrameSaver:simdigits3" + ] + params: { + SimEnergyDepositLabel: "filtersed" + cathode_input_format: "array" + file_rcresp: "icarus_fnal_rc_tail.json" + tpc_idx: "3" + files_fields: "\"icarus_final_fit_dqdx0.json.bz2\",\n \"icarus_final_fit_dqdx1.json.bz2\",\n \"icarus_final_fit_dqdx2.json.bz2\",\n \"icarus_final_fit_dqdx3.json.bz2\",\n \"icarus_final_fit_dqdx4.json.bz2\",\n \"icarus_final_fit_dqdx5.json.bz2\",\n \"icarus_final_fit_dqdx6.json.bz2\",\n \"icarus_final_fit_dqdx7.json.bz2\",\n \"icarus_final_fit_dqdx8.json.bz2\",\n \"icarus_final_fit_dqdx9.json.bz2\",\n \"icarus_final_fit_dqdx10.json.bz2\",\n \"icarus_final_fit_dqdx11.json.bz2\",\n \"icarus_final_fit_dqdx12.json.bz2\",\n \"icarus_final_fit_dqdx13.json.bz2\",\n \"icarus_final_fit_dqdx14.json.bz2\"" + } + plugins: [ + "WireCellPgraph", + "WireCellGen", + "WireCellSio", + "WireCellRoot", + "WireCellLarsoft", + "WireCellHio" + ] + structs: { + DL: 4e-9 + DT: 8.8e-9 + coh_noise_scale: 1 + gain0: 1.705212e1 + gain1: 1.26181926e1 + gain2: 1.30261362e1 + int_noise_scale: 1 + lifetime: 3000 + lifetime_TPCEE: 3000 + lifetime_TPCEW: 3000 + lifetime_TPCWE: 3000 + lifetime_TPCWW: 3000 + overlay_drifter: false + shaping0: 1.3 + shaping1: 1.45 + shaping2: 1.3 + time_offset_u: 0 + time_offset_v: 0 + time_offset_y: 0 + } + tool_type: "WCLS" + } +} + +# The following are definitions for running the detector simulation in overlay mode + +icarus_simwire_wirecell_yz_overlay_0: @local::icarus_simwire_wirecell_yz_0 + +icarus_simwire_wirecell_yz_overlay_0.wcls_main.structs.coh_noise_scale: 0.0 # disable noise +icarus_simwire_wirecell_yz_overlay_0.wcls_main.structs.int_noise_scale: 0.0 # ditto +icarus_simwire_wirecell_yz_overlay_0.wcls_main.structs.overlay_drifter: true +icarus_simwire_wirecell_yz_overlay_0.wcls_main.plugins: [@sequence::icarus_simwire_wirecell_yz_overlay_0.wcls_main.plugins, "WireCellICARUSDrifter"] +icarus_simwire_wirecell_yz_overlay_0.wcls_main.inputers: ["wclsSimDepoSetSource:electron", + 'wclsICARUSDrifter:drifter0', + 'wclsICARUSDrifter:drifter1', + 'wclsICARUSDrifter:drifter2', + 'wclsICARUSDrifter:drifter3', + 'wclsICARUSDrifter:drifter4', + 'wclsICARUSDrifter:drifter5', + 'wclsICARUSDrifter:drifter6', + 'wclsICARUSDrifter:drifter7', + 'wclsICARUSDrifter:drifter8', + 'wclsICARUSDrifter:drifter9', + 'wclsICARUSDrifter:drifter10', + 'wclsICARUSDrifter:drifter11', + 'wclsICARUSDrifter:drifter12', + 'wclsICARUSDrifter:drifter13', + 'wclsICARUSDrifter:drifter14', + 'wclsICARUSDrifter:drifter15', + 'wclsICARUSDrifter:drifter16', + 'wclsICARUSDrifter:drifter17', + 'wclsICARUSDrifter:drifter18', + 'wclsICARUSDrifter:drifter19', + 'wclsICARUSDrifter:drifter20', + 'wclsICARUSDrifter:drifter21', + 'wclsICARUSDrifter:drifter22', + 'wclsICARUSDrifter:drifter23', + 'wclsICARUSDrifter:drifter24', + 'wclsICARUSDrifter:drifter25', + 'wclsICARUSDrifter:drifter26', + 'wclsICARUSDrifter:drifter27', + 'wclsICARUSDrifter:drifter28', + 'wclsICARUSDrifter:drifter29', + 'wclsICARUSDrifter:drifter30', + 'wclsICARUSDrifter:drifter31', + 'wclsICARUSDrifter:drifter32', + 'wclsICARUSDrifter:drifter33', + 'wclsICARUSDrifter:drifter34', + 'wclsICARUSDrifter:drifter35', + 'wclsICARUSDrifter:drifter36', + 'wclsICARUSDrifter:drifter37', + 'wclsICARUSDrifter:drifter38', + 'wclsICARUSDrifter:drifter39', + 'wclsICARUSDrifter:drifter40', + 'wclsICARUSDrifter:drifter41', + 'wclsICARUSDrifter:drifter42', + 'wclsICARUSDrifter:drifter43', + 'wclsICARUSDrifter:drifter44', + 'wclsICARUSDrifter:drifter45', + 'wclsICARUSDrifter:drifter46', + 'wclsICARUSDrifter:drifter47', + 'wclsICARUSDrifter:drifter48', + 'wclsICARUSDrifter:drifter49', + 'wclsICARUSDrifter:drifter50', + 'wclsICARUSDrifter:drifter51', + 'wclsICARUSDrifter:drifter52', + 'wclsICARUSDrifter:drifter53', + 'wclsICARUSDrifter:drifter54', + 'wclsICARUSDrifter:drifter55', + 'wclsICARUSDrifter:drifter56', + 'wclsICARUSDrifter:drifter57', + 'wclsICARUSDrifter:drifter58', + 'wclsICARUSDrifter:drifter59', + 'wclsICARUSDrifter:drifter60', + 'wclsICARUSDrifter:drifter61', + 'wclsICARUSDrifter:drifter62', + 'wclsICARUSDrifter:drifter63', + 'wclsICARUSDrifter:drifter64', + 'wclsICARUSDrifter:drifter65', + 'wclsICARUSDrifter:drifter66', + 'wclsICARUSDrifter:drifter67', + 'wclsICARUSDrifter:drifter68', + 'wclsICARUSDrifter:drifter69', + 'wclsICARUSDrifter:drifter70', + 'wclsICARUSDrifter:drifter71', + 'wclsICARUSDrifter:drifter72', + 'wclsICARUSDrifter:drifter73', + 'wclsICARUSDrifter:drifter74', + 'wclsICARUSDrifter:drifter75', + 'wclsICARUSDrifter:drifter76', + 'wclsICARUSDrifter:drifter77', + 'wclsICARUSDrifter:drifter78', + 'wclsICARUSDrifter:drifter79', + 'wclsICARUSDrifter:drifter80', + 'wclsICARUSDrifter:drifter81', + 'wclsICARUSDrifter:drifter82', + 'wclsICARUSDrifter:drifter83', + 'wclsICARUSDrifter:drifter84', + 'wclsICARUSDrifter:drifter85', + 'wclsICARUSDrifter:drifter86', + 'wclsICARUSDrifter:drifter87', + 'wclsICARUSDrifter:drifter88', + 'wclsICARUSDrifter:drifter89' +] + + +icarus_simwire_wirecell_yz_overlay_1: @local::icarus_simwire_wirecell_yz_1 + +icarus_simwire_wirecell_yz_overlay_1.wcls_main.structs.coh_noise_scale: 0.0 # disable noise +icarus_simwire_wirecell_yz_overlay_1.wcls_main.structs.int_noise_scale: 0.0 # ditto +icarus_simwire_wirecell_yz_overlay_1.wcls_main.structs.overlay_drifter: true +icarus_simwire_wirecell_yz_overlay_1.wcls_main.plugins: [@sequence::icarus_simwire_wirecell_yz_overlay_1.wcls_main.plugins, "WireCellICARUSDrifter"] +icarus_simwire_wirecell_yz_overlay_1.wcls_main.inputers: ["wclsSimDepoSetSource:electron", + 'wclsICARUSDrifter:drifter90', + 'wclsICARUSDrifter:drifter91', + 'wclsICARUSDrifter:drifter92', + 'wclsICARUSDrifter:drifter93', + 'wclsICARUSDrifter:drifter94', + 'wclsICARUSDrifter:drifter95', + 'wclsICARUSDrifter:drifter96', + 'wclsICARUSDrifter:drifter97', + 'wclsICARUSDrifter:drifter98', + 'wclsICARUSDrifter:drifter99', + 'wclsICARUSDrifter:drifter100', + 'wclsICARUSDrifter:drifter101', + 'wclsICARUSDrifter:drifter102', + 'wclsICARUSDrifter:drifter103', + 'wclsICARUSDrifter:drifter104', + 'wclsICARUSDrifter:drifter105', + 'wclsICARUSDrifter:drifter106', + 'wclsICARUSDrifter:drifter107', + 'wclsICARUSDrifter:drifter108', + 'wclsICARUSDrifter:drifter109', + 'wclsICARUSDrifter:drifter110', + 'wclsICARUSDrifter:drifter111', + 'wclsICARUSDrifter:drifter112', + 'wclsICARUSDrifter:drifter113', + 'wclsICARUSDrifter:drifter114', + 'wclsICARUSDrifter:drifter115', + 'wclsICARUSDrifter:drifter116', + 'wclsICARUSDrifter:drifter117', + 'wclsICARUSDrifter:drifter118', + 'wclsICARUSDrifter:drifter119', + 'wclsICARUSDrifter:drifter120', + 'wclsICARUSDrifter:drifter121', + 'wclsICARUSDrifter:drifter122', + 'wclsICARUSDrifter:drifter123', + 'wclsICARUSDrifter:drifter124', + 'wclsICARUSDrifter:drifter125', + 'wclsICARUSDrifter:drifter126', + 'wclsICARUSDrifter:drifter127', + 'wclsICARUSDrifter:drifter128', + 'wclsICARUSDrifter:drifter129', + 'wclsICARUSDrifter:drifter130', + 'wclsICARUSDrifter:drifter131', + 'wclsICARUSDrifter:drifter132', + 'wclsICARUSDrifter:drifter133', + 'wclsICARUSDrifter:drifter134', + 'wclsICARUSDrifter:drifter135', + 'wclsICARUSDrifter:drifter136', + 'wclsICARUSDrifter:drifter137', + 'wclsICARUSDrifter:drifter138', + 'wclsICARUSDrifter:drifter139', + 'wclsICARUSDrifter:drifter140', + 'wclsICARUSDrifter:drifter141', + 'wclsICARUSDrifter:drifter142', + 'wclsICARUSDrifter:drifter143', + 'wclsICARUSDrifter:drifter144', + 'wclsICARUSDrifter:drifter145', + 'wclsICARUSDrifter:drifter146', + 'wclsICARUSDrifter:drifter147', + 'wclsICARUSDrifter:drifter148', + 'wclsICARUSDrifter:drifter149', + 'wclsICARUSDrifter:drifter150', + 'wclsICARUSDrifter:drifter151', + 'wclsICARUSDrifter:drifter152', + 'wclsICARUSDrifter:drifter153', + 'wclsICARUSDrifter:drifter154', + 'wclsICARUSDrifter:drifter155', + 'wclsICARUSDrifter:drifter156', + 'wclsICARUSDrifter:drifter157', + 'wclsICARUSDrifter:drifter158', + 'wclsICARUSDrifter:drifter159', + 'wclsICARUSDrifter:drifter160', + 'wclsICARUSDrifter:drifter161', + 'wclsICARUSDrifter:drifter162', + 'wclsICARUSDrifter:drifter163', + 'wclsICARUSDrifter:drifter164', + 'wclsICARUSDrifter:drifter165', + 'wclsICARUSDrifter:drifter166', + 'wclsICARUSDrifter:drifter167', + 'wclsICARUSDrifter:drifter168', + 'wclsICARUSDrifter:drifter169', + 'wclsICARUSDrifter:drifter170', + 'wclsICARUSDrifter:drifter171', + 'wclsICARUSDrifter:drifter172', + 'wclsICARUSDrifter:drifter173', + 'wclsICARUSDrifter:drifter174', + 'wclsICARUSDrifter:drifter175', + 'wclsICARUSDrifter:drifter176', + 'wclsICARUSDrifter:drifter177', + 'wclsICARUSDrifter:drifter178', + 'wclsICARUSDrifter:drifter179' +] + + + +icarus_simwire_wirecell_yz_overlay_2: @local::icarus_simwire_wirecell_yz_2 + +icarus_simwire_wirecell_yz_overlay_2.wcls_main.structs.coh_noise_scale: 0.0 # disable noise +icarus_simwire_wirecell_yz_overlay_2.wcls_main.structs.int_noise_scale: 0.0 # ditto +icarus_simwire_wirecell_yz_overlay_2.wcls_main.structs.overlay_drifter: true +icarus_simwire_wirecell_yz_overlay_2.wcls_main.plugins: [@sequence::icarus_simwire_wirecell_yz_overlay_2.wcls_main.plugins, "WireCellICARUSDrifter"] +icarus_simwire_wirecell_yz_overlay_2.wcls_main.inputers: ["wclsSimDepoSetSource:electron", + 'wclsICARUSDrifter:drifter180', + 'wclsICARUSDrifter:drifter181', + 'wclsICARUSDrifter:drifter182', + 'wclsICARUSDrifter:drifter183', + 'wclsICARUSDrifter:drifter184', + 'wclsICARUSDrifter:drifter185', + 'wclsICARUSDrifter:drifter186', + 'wclsICARUSDrifter:drifter187', + 'wclsICARUSDrifter:drifter188', + 'wclsICARUSDrifter:drifter189', + 'wclsICARUSDrifter:drifter190', + 'wclsICARUSDrifter:drifter191', + 'wclsICARUSDrifter:drifter192', + 'wclsICARUSDrifter:drifter193', + 'wclsICARUSDrifter:drifter194', + 'wclsICARUSDrifter:drifter195', + 'wclsICARUSDrifter:drifter196', + 'wclsICARUSDrifter:drifter197', + 'wclsICARUSDrifter:drifter198', + 'wclsICARUSDrifter:drifter199', + 'wclsICARUSDrifter:drifter200', + 'wclsICARUSDrifter:drifter201', + 'wclsICARUSDrifter:drifter202', + 'wclsICARUSDrifter:drifter203', + 'wclsICARUSDrifter:drifter204', + 'wclsICARUSDrifter:drifter205', + 'wclsICARUSDrifter:drifter206', + 'wclsICARUSDrifter:drifter207', + 'wclsICARUSDrifter:drifter208', + 'wclsICARUSDrifter:drifter209', + 'wclsICARUSDrifter:drifter210', + 'wclsICARUSDrifter:drifter211', + 'wclsICARUSDrifter:drifter212', + 'wclsICARUSDrifter:drifter213', + 'wclsICARUSDrifter:drifter214', + 'wclsICARUSDrifter:drifter215', + 'wclsICARUSDrifter:drifter216', + 'wclsICARUSDrifter:drifter217', + 'wclsICARUSDrifter:drifter218', + 'wclsICARUSDrifter:drifter219', + 'wclsICARUSDrifter:drifter220', + 'wclsICARUSDrifter:drifter221', + 'wclsICARUSDrifter:drifter222', + 'wclsICARUSDrifter:drifter223', + 'wclsICARUSDrifter:drifter224', + 'wclsICARUSDrifter:drifter225', + 'wclsICARUSDrifter:drifter226', + 'wclsICARUSDrifter:drifter227', + 'wclsICARUSDrifter:drifter228', + 'wclsICARUSDrifter:drifter229', + 'wclsICARUSDrifter:drifter230', + 'wclsICARUSDrifter:drifter231', + 'wclsICARUSDrifter:drifter232', + 'wclsICARUSDrifter:drifter233', + 'wclsICARUSDrifter:drifter234', + 'wclsICARUSDrifter:drifter235', + 'wclsICARUSDrifter:drifter236', + 'wclsICARUSDrifter:drifter237', + 'wclsICARUSDrifter:drifter238', + 'wclsICARUSDrifter:drifter239', + 'wclsICARUSDrifter:drifter240', + 'wclsICARUSDrifter:drifter241', + 'wclsICARUSDrifter:drifter242', + 'wclsICARUSDrifter:drifter243', + 'wclsICARUSDrifter:drifter244', + 'wclsICARUSDrifter:drifter245', + 'wclsICARUSDrifter:drifter246', + 'wclsICARUSDrifter:drifter247', + 'wclsICARUSDrifter:drifter248', + 'wclsICARUSDrifter:drifter249', + 'wclsICARUSDrifter:drifter250', + 'wclsICARUSDrifter:drifter251', + 'wclsICARUSDrifter:drifter252', + 'wclsICARUSDrifter:drifter253', + 'wclsICARUSDrifter:drifter254', + 'wclsICARUSDrifter:drifter255', + 'wclsICARUSDrifter:drifter256', + 'wclsICARUSDrifter:drifter257', + 'wclsICARUSDrifter:drifter258', + 'wclsICARUSDrifter:drifter259', + 'wclsICARUSDrifter:drifter260', + 'wclsICARUSDrifter:drifter261', + 'wclsICARUSDrifter:drifter262', + 'wclsICARUSDrifter:drifter263', + 'wclsICARUSDrifter:drifter264', + 'wclsICARUSDrifter:drifter265', + 'wclsICARUSDrifter:drifter266', + 'wclsICARUSDrifter:drifter267', + 'wclsICARUSDrifter:drifter268', + 'wclsICARUSDrifter:drifter269' +] + + + + +icarus_simwire_wirecell_yz_overlay_3: @local::icarus_simwire_wirecell_yz_3 + +icarus_simwire_wirecell_yz_overlay_3.wcls_main.structs.coh_noise_scale: 0.0 # disable noise +icarus_simwire_wirecell_yz_overlay_3.wcls_main.structs.int_noise_scale: 0.0 # ditto +icarus_simwire_wirecell_yz_overlay_3.wcls_main.structs.overlay_drifter: true +icarus_simwire_wirecell_yz_overlay_3.wcls_main.plugins: [@sequence::icarus_simwire_wirecell_yz_overlay_3.wcls_main.plugins, "WireCellICARUSDrifter"] +icarus_simwire_wirecell_yz_overlay_3.wcls_main.inputers: ["wclsSimDepoSetSource:electron", + 'wclsICARUSDrifter:drifter270', + 'wclsICARUSDrifter:drifter271', + 'wclsICARUSDrifter:drifter272', + 'wclsICARUSDrifter:drifter273', + 'wclsICARUSDrifter:drifter274', + 'wclsICARUSDrifter:drifter275', + 'wclsICARUSDrifter:drifter276', + 'wclsICARUSDrifter:drifter277', + 'wclsICARUSDrifter:drifter278', + 'wclsICARUSDrifter:drifter279', + 'wclsICARUSDrifter:drifter280', + 'wclsICARUSDrifter:drifter281', + 'wclsICARUSDrifter:drifter282', + 'wclsICARUSDrifter:drifter283', + 'wclsICARUSDrifter:drifter284', + 'wclsICARUSDrifter:drifter285', + 'wclsICARUSDrifter:drifter286', + 'wclsICARUSDrifter:drifter287', + 'wclsICARUSDrifter:drifter288', + 'wclsICARUSDrifter:drifter289', + 'wclsICARUSDrifter:drifter290', + 'wclsICARUSDrifter:drifter291', + 'wclsICARUSDrifter:drifter292', + 'wclsICARUSDrifter:drifter293', + 'wclsICARUSDrifter:drifter294', + 'wclsICARUSDrifter:drifter295', + 'wclsICARUSDrifter:drifter296', + 'wclsICARUSDrifter:drifter297', + 'wclsICARUSDrifter:drifter298', + 'wclsICARUSDrifter:drifter299', + 'wclsICARUSDrifter:drifter300', + 'wclsICARUSDrifter:drifter301', + 'wclsICARUSDrifter:drifter302', + 'wclsICARUSDrifter:drifter303', + 'wclsICARUSDrifter:drifter304', + 'wclsICARUSDrifter:drifter305', + 'wclsICARUSDrifter:drifter306', + 'wclsICARUSDrifter:drifter307', + 'wclsICARUSDrifter:drifter308', + 'wclsICARUSDrifter:drifter309', + 'wclsICARUSDrifter:drifter310', + 'wclsICARUSDrifter:drifter311', + 'wclsICARUSDrifter:drifter312', + 'wclsICARUSDrifter:drifter313', + 'wclsICARUSDrifter:drifter314', + 'wclsICARUSDrifter:drifter315', + 'wclsICARUSDrifter:drifter316', + 'wclsICARUSDrifter:drifter317', + 'wclsICARUSDrifter:drifter318', + 'wclsICARUSDrifter:drifter319', + 'wclsICARUSDrifter:drifter320', + 'wclsICARUSDrifter:drifter321', + 'wclsICARUSDrifter:drifter322', + 'wclsICARUSDrifter:drifter323', + 'wclsICARUSDrifter:drifter324', + 'wclsICARUSDrifter:drifter325', + 'wclsICARUSDrifter:drifter326', + 'wclsICARUSDrifter:drifter327', + 'wclsICARUSDrifter:drifter328', + 'wclsICARUSDrifter:drifter329', + 'wclsICARUSDrifter:drifter330', + 'wclsICARUSDrifter:drifter331', + 'wclsICARUSDrifter:drifter332', + 'wclsICARUSDrifter:drifter333', + 'wclsICARUSDrifter:drifter334', + 'wclsICARUSDrifter:drifter335', + 'wclsICARUSDrifter:drifter336', + 'wclsICARUSDrifter:drifter337', + 'wclsICARUSDrifter:drifter338', + 'wclsICARUSDrifter:drifter339', + 'wclsICARUSDrifter:drifter340', + 'wclsICARUSDrifter:drifter341', + 'wclsICARUSDrifter:drifter342', + 'wclsICARUSDrifter:drifter343', + 'wclsICARUSDrifter:drifter344', + 'wclsICARUSDrifter:drifter345', + 'wclsICARUSDrifter:drifter346', + 'wclsICARUSDrifter:drifter347', + 'wclsICARUSDrifter:drifter348', + 'wclsICARUSDrifter:drifter349', + 'wclsICARUSDrifter:drifter350', + 'wclsICARUSDrifter:drifter351', + 'wclsICARUSDrifter:drifter352', + 'wclsICARUSDrifter:drifter353', + 'wclsICARUSDrifter:drifter354', + 'wclsICARUSDrifter:drifter355', + 'wclsICARUSDrifter:drifter356', + 'wclsICARUSDrifter:drifter357', + 'wclsICARUSDrifter:drifter358', + 'wclsICARUSDrifter:drifter359' +] + + + + +END_PROLOG diff --git a/icaruscode/TPC/ICARUSWireCell/icarus/wcls-per-tpc-sim-drift-simchannel-yzsim.jsonnet b/icaruscode/TPC/ICARUSWireCell/icarus/wcls-per-tpc-sim-drift-simchannel-yzsim.jsonnet new file mode 100644 index 000000000..b87ad7fdb --- /dev/null +++ b/icaruscode/TPC/ICARUSWireCell/icarus/wcls-per-tpc-sim-drift-simchannel-yzsim.jsonnet @@ -0,0 +1,418 @@ +// Per-TPC variant of wcls-multitpc-sim-drift-simchannel-yzsim-refactored.jsonnet. +// +// Reads `tpc_idx` (0..3) from an external variable. Builds only the slice of +// the graph that belongs to that one TPC by narrowing `tools.anodes` to the +// per-TPC two-element subset and letting sim_maker scope its derived per- +// anode pipelines (transformsyz, analog_pipelinesyz, etc.) accordingly. +// +// Designed to be driven by 4 separate `WireCellToolkit` art modules, one per +// TPC, so each module's `WCLS_tool::process()` flushes its TPC's frame to the +// art Event before the next module starts and the float SimpleTraces can be +// reclaimed. +// +// Per-instance component names that need to be unique across the 4 modules +// (Pgrapher, fanout, summer, actpipe, FrameSaver, etc.) carry `%d %tpc_idx`. +// The shared heavy components (PIR, FieldResponse, AnodePlane, DFT) stay +// singletons across modules - WCT's NamedFactory de-duplicates them by name +// and their `configure()` is now idempotent (PIR's `m_bywire`/`m_ir` are +// cleared at the top of `build_responses()`). +// +// Instance names that show up in the art Event are kept identical to the +// single-module setup (`simdigits` and `simpleSC` with global n in +// [tpc_idx*90, tpc_idx*90+90)). + +local g = import 'pgraph.jsonnet'; +local f = import 'pgrapher/common/funcs.jsonnet'; +local wc = import 'wirecell.jsonnet'; + +local io = import 'pgrapher/common/fileio.jsonnet'; +local tools_maker = import 'pgrapher/experiment/icarus/icarus_tools.jsonnet'; +local base = import 'pgrapher/experiment/icarus/simparams.jsonnet'; + +local er_params = [ + { gain: std.extVar('gain0')*wc.mV/wc.fC, shaping: std.extVar('shaping0')*wc.us }, + { gain: std.extVar('gain1')*wc.mV/wc.fC, shaping: std.extVar('shaping1')*wc.us }, + { gain: std.extVar('gain2')*wc.mV/wc.fC, shaping: std.extVar('shaping2')*wc.us }, +]; + +local params = base { + lar: super.lar { + DL: std.extVar('DL') * wc.cm2 / wc.ns, + DT: std.extVar('DT') * wc.cm2 / wc.ns, + lifetime: std.extVar('lifetime') * wc.us, + }, + files: super.files { + fields: [ + "icarus_fnal_fit_ks_P0nom_P1bin0.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin1.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin2.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin3.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin4.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin5.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin6.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin7.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin8.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin9.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin10.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin11.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin12.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin13.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin14.json.bz2", + "icarus_fnal_fit_ks_P0nom_P1bin15.json.bz2", + ], + }, + rc_resp: if std.extVar('file_rcresp') != "" then { + filename: std.extVar('file_rcresp'), + postgain: 1.0, + start: 0.0, + tick: 0.4*wc.us, + nticks: 4255, + type: "JsonElecResponse", + rc_layers: 1, + } else super.rc_resp, + elec: std.mapWithIndex(function (n, eparam) + super.elec[n] + { gain: eparam.gain, shaping: eparam.shaping }, er_params), +}; + +// --------------------------------------------------------------------------- +// Per-TPC selection. +// tools_all is the full 8-anode tools object; `tools` is the same object with +// anodes narrowed to this TPC's pair. sim_maker then builds depotransforms +// and analog pipelines only for those anodes (×45 per anode = 90 entries). +// --------------------------------------------------------------------------- +local tpc_idx = std.parseInt(std.extVar('tpc_idx')); +local apa_lo = tpc_idx * 2; // 2 anodes per TPC +local local_iota = std.range(0, 89); // 90 per-anode-plane-response branches +local volname = ["EE", "EW", "WE", "WW"]; + +local tools_all = tools_maker(params); +local tools = tools_all { anodes: tools_all.anodes[apa_lo : apa_lo + 2] }; + +local sim_maker = import 'pgrapher/experiment/icarus/sim.jsonnet'; +local sim = sim_maker(params, tools); // analog_pipelinesyz has 90 entries + +// --------------------------------------------------------------------------- +// Input: depo source from art Event (identical across all 4 per-TPC modules) +// --------------------------------------------------------------------------- +local wcls_maker = import 'pgrapher/ui/wcls/nodes.jsonnet'; +local wcls = wcls_maker(params, tools); +local wcls_input = { + deposet: g.pnode({ + type: 'wclsSimDepoSetSource', + name: "electron", + data: { + model: "", + scale: -1, + art_tag: std.extVar('SimEnergyDepositLabel'), + assn_art_tag: "", + id_is_track: false, + }, + }, nin=0, nout=1), +}; + +// --------------------------------------------------------------------------- +// MegaAnode / DuoAnode for this TPC. `mega_anode` here is a *per-TPC* +// MegaAnodePlane (not the shared 8-anode one) - it covers exactly the two +// anodes this TPC processes. +// --------------------------------------------------------------------------- +local mega_anode = { + type: 'MegaAnodePlane', + name: 'meganodes%d' % tpc_idx, + data: { anodes_tn: [wc.tn(a) for a in tools.anodes] }, +}; + +// duoanode is here for compatibility with wclsFrameSaver, which also takes +// this TPC's pair of anodes. +local duoanode = mega_anode; + +// --------------------------------------------------------------------------- +// Output: this TPC's RawDigit saver (instance name stays simdigits) +// --------------------------------------------------------------------------- +local sim_digits = g.pnode({ + type: 'wclsFrameSaver', + name: 'simdigits%d' % tpc_idx, + data: { + anode: wc.tn(duoanode), + digitize: true, + frame_tags: ['TPC%s' % volname[tpc_idx]], + }, +}, nin=1, nout=1, uses=[duoanode]); + +// --------------------------------------------------------------------------- +// Helpers: global index for the n-th branch of this TPC. +// --------------------------------------------------------------------------- +local n_lo = tpc_idx * 90; +local glob(i) = n_lo + i; + +// --------------------------------------------------------------------------- +// 90 drifters / scalers / simchannel sinks for this TPC. +// Instance names keep the global numbering (n_lo..n_hi-1) so SimChannel +// product instances match the single-module reference run. +// --------------------------------------------------------------------------- +local overlay_drifter = std.extVar("overlay_drifter"); +local localeLiftime = [std.extVar('lifetime') * wc.us,std.extVar('lifetime') * wc.us,std.extVar('lifetime') * wc.us,std.extVar('lifetime') * wc.us,std.extVar('lifetime') * wc.us,std.extVar('lifetime') * wc.us,std.extVar('lifetime') * wc.us,std.extVar('lifetime') * wc.us]; +local drifter_data = if overlay_drifter then sim.overlay_drifter_data else sim.drifter_data; + +local drifters = [{ + type: if overlay_drifter then "wclsICARUSDrifter" else "Drifter", + name: "drifter%d" % glob(i), + data: params.lar + drifter_data { + lifetime: localeLiftime[std.floor(glob(i)/45)], + TPC: tpc_idx, + charge_scale: 1, + }, +} for i in local_iota]; + +local setdrifters = [g.pnode({ + type: 'DepoSetDrifter', + name: 'setdrifters%d' % glob(i), + data: { drifter: wc.tn(drifters[i]) }, +}, nin=1, nout=1, uses=[drifters[i]]) for i in local_iota]; + +local yzmap_filter = { + type: "YZMap", name: "yzmap_filter", + data: { + filename: 'yzmap_icarus_v3_run1.json', + bin_width: 10*wc.cm, bin_height: 10*wc.cm, + yoffset: 180*wc.cm, zoffset: 900*wc.cm, + nbinsy: 31, nbinsz: 180, + }, +}; + +local yzmap_gain = { + type: "YZMap", name: "yzmap_gain", + data: { + filename: 'yzmap_gain_icarus_v3_run1.json', + bin_width: 10*wc.cm, bin_height: 10*wc.cm, + yoffset: 180*wc.cm, zoffset: 900*wc.cm, + nbinsy: 31, nbinsz: 180, + }, +}; + +local scalers = [{ + type: "Scaler", + name: "scaler%d" % glob(i), + data: { + yzmap: wc.tn(yzmap_gain), + anode: wc.tn(tools.anodes[std.floor(i/45)]), + plane: std.mod(std.floor(i/15), 3), + }, +} for i in local_iota]; + +local setscaler = [g.pnode({ + type: 'DepoSetScaler', + name: 'setscaler%d' % glob(i), + data: { scaler: wc.tn(scalers[i]) }, +}, nin=1, nout=1, uses=[scalers[i], yzmap_gain]) for i in local_iota]; + +local wcls_simchannel_sink = [g.pnode({ + type: 'wclsDepoFluxWriter', + name: 'postdrift%d' % glob(i), + data: { + anodes: [wc.tn(a) for a in tools.anodes], + field_response: wc.tn(tools.field), + tick: params.daq.tick, + window_start: -340 * wc.us, + window_duration: params.daq.readout_time, + nsigma: 3.0, + reference_time: -1500 * wc.us - self.window_start, + smear_long: 0.0, + smear_tran: 0.0, + time_offsets: [ + std.extVar('time_offset_u') * wc.us, + std.extVar('time_offset_v') * wc.us, + std.extVar('time_offset_y') * wc.us, + ], + process_planes: [std.mod(std.floor(i/15), 3)], + sed_label: std.extVar('SimEnergyDepositLabel'), + simchan_label: 'simpleSC%d' % glob(i), + }, +}, nin=1, nout=1, uses=tools.anodes + [tools.field]) for i in local_iota]; + +local deposetfilteryz = [g.pnode({ + type: 'DepoSetFilterYZ', + name: 'deposetfilteryz_resp%d-plane%d-%s' % [ + std.mod(i, 15), + std.mod(std.floor(i/15), 3), + tools.anodes[std.floor(i/45)].name, + ], + data: { + yzmap: wc.tn(yzmap_filter), + resp: std.mod(i, 15), + anode: wc.tn(tools.anodes[std.floor(i/45)]), + plane: std.mod(std.floor(i/15), 3), + }, +}, nin=1, nout=1, uses=tools.anodes + [yzmap_filter]) for i in local_iota]; + +// --------------------------------------------------------------------------- +// 90 analog pipelines for this TPC, sourced from the narrowed sim object. +// --------------------------------------------------------------------------- +local sigpipes = sim.analog_pipelinesyz; +assert std.length(sigpipes) == 90 : + "expected 90 analog pipelines for one TPC, got %d" % std.length(sigpipes); + +// --------------------------------------------------------------------------- +// 1 FrameSummerYZ for this TPC (sums 90 → 1) +// --------------------------------------------------------------------------- +local frame_summer = g.pnode({ + type: 'FrameSummerYZ', + name: 'framesummer%d' % tpc_idx, + data: { multiplicity: 90 }, +}, nin=90, nout=1); + +// --------------------------------------------------------------------------- +// Noise + digitizer for this TPC (one of each) +// --------------------------------------------------------------------------- +local nicks = ["incoTPCEE","incoTPCEW","incoTPCWE","incoTPCWW", + "coheTPCEE","coheTPCEW","coheTPCWE","coheTPCWW"]; +local scale_int = std.extVar('int_noise_scale'); +local scale_coh = std.extVar('coh_noise_scale'); + +local inco_model = { + type: "GroupNoiseModel", + name: nicks[tpc_idx], + data: { + spectra: params.files.noisegroups[tpc_idx], + groups: params.files.wiregroups, + scale: scale_int, + nsamples: params.daq.nticks, + tick: params.daq.tick, + }, +}; + +local cohe_model = { + type: "GroupNoiseModel", + name: nicks[tpc_idx + 4], + data: { + spectra: params.files.noisegroups[tpc_idx + 4], + groups: params.files.wiregroups, + scale: scale_coh, + nsamples: params.daq.nticks, + tick: params.daq.tick, + }, +}; + +local add_noise_node = function(model, t) g.pnode({ + type: t, + name: "addnoise%d-" % tpc_idx + model.name, + data: { + rng: wc.tn(tools.random), + dft: wc.tn(tools.dft), + model: wc.tn(model), + nsamples: params.daq.nticks, + }, +}, nin=1, nout=1, uses=[tools.random, tools.dft, model]); + +local inco_noise = add_noise_node(inco_model, "IncoherentAddNoise"); +local cohe_noise = add_noise_node(cohe_model, "CoherentAddNoise"); + +local digitizer = sim.digitizer(mega_anode, + name="digitizer%d-" % tpc_idx + mega_anode.name, + tag="TPC%s" % volname[tpc_idx]); + +local reframer = g.pnode({ + type: 'Reframer', + name: 'reframer-%d-' % tpc_idx + mega_anode.name, + data: { + anode: wc.tn(mega_anode), + tags: "TPC%s" % volname[tpc_idx], + fill: 0.0, + tbin: params.sim.reframer.tbin, + toffset: 0, + nticks: params.sim.reframer.nticks, + }, +}, nin=1, nout=1); + +local actpipe = g.pipeline( + [reframer, inco_noise, cohe_noise, digitizer, sim_digits], + name="noise-digitizer%d" % tpc_idx); + +// --------------------------------------------------------------------------- +// Drift-side pipelines: one per anode/plane (filter → drifter → scaler → simchan-sink) +// --------------------------------------------------------------------------- +local driftpipes = [g.pipeline( + [deposetfilteryz[i], setdrifters[i], setscaler[i], wcls_simchannel_sink[i]], + name="depo-set-drifter%d" % glob(i)) for i in local_iota]; + +// --------------------------------------------------------------------------- +// Top-level per-TPC topology: +// wcls_input.deposet +// → fanout (1 → 90) +// → driftpipes[i] (90×; each ends in simchan-sink which writes to art) +// → sigpipes[i] (90× DepoTransform → analog frame) +// → frame_summer (90 → 1) +// → actpipe (reframer → noise → cohe-noise → digitizer → wclsFrameSaver) +// → final DumpFrames sink +// --------------------------------------------------------------------------- +local fanout = g.pnode({ + type: 'DepoSetFanout', + name: 'fandrifter%d' % tpc_idx, + data: { multiplicity: 90, tag_rules: [] }, +}, nin=1, nout=90); + +local actpipe_sink = g.pnode( + { type: 'DumpFrames', name: 'actpipe%d-dump' % tpc_idx }, + nin=1, nout=0); + +local drift = g.intern( + innodes=driftpipes, + outnodes=[actpipe], + centernodes=sigpipes + [frame_summer], + edges= + [g.edge(driftpipes[i], sigpipes[i]) for i in local_iota] + + [g.edge(sigpipes[i], frame_summer, 0, i) for i in local_iota] + + [g.edge(frame_summer, actpipe)], + name='drift-tpc%d' % tpc_idx); + +local fandrifter = g.intern( + innodes=[fanout], + outnodes=[actpipe_sink], + centernodes=[drift], + edges= + [g.edge(fanout, driftpipes[i], i, 0) for i in local_iota] + + [g.edge(drift, actpipe_sink, 0, 0)], + name='fandrifter%d-top' % tpc_idx); + +local graph = g.pipeline([wcls_input.deposet, fandrifter]); + +// --------------------------------------------------------------------------- +// Per-TPC Pgrapher name. WCT's NamedFactory is a singleton across art +// modules; naming per-TPC keeps each module's graph isolated. The fcl's +// `apps:` for daq must reference "Pgrapher:pgrapher" to match. +// --------------------------------------------------------------------------- +local app = { + type: 'Pgrapher', + name: 'pgrapher%d' % tpc_idx, + data: { edges: g.edges(graph) }, +}; + +// --------------------------------------------------------------------------- +// Memoized DFS post-order for graph.uses (same as the upstream jsonnet). +// --------------------------------------------------------------------------- +local key_of(x) = if std.objectHas(x, 'name') && x.name != '' + then x.type + ':' + x.name + else x.type; +local strip_uses(x) = { [k]: x[k] for k in std.objectFields(x) if k != 'uses' }; + +local visit(node, state) = + if node.type == 'Pnode' then + if std.objectHas(node, 'uses') + then std.foldl(function(s, c) visit(c, s), node.uses, state) + else state + else + local k = key_of(node); + if std.objectHas(state.seen, k) then state + else + local after_children = + if std.objectHas(node, 'uses') + then std.foldl(function(s, c) visit(c, s), node.uses, state) + else state; + { + seen: after_children.seen { [k]: true }, + result: after_children.result + [strip_uses(node)], + }; + +local resolve_uses_unique(roots) = + std.foldl(function(s, n) visit(n, s), roots, { seen: {}, result: [] }).result; + +resolve_uses_unique(graph.uses) + [app] From c5f99edd33422567ea7ff14684e397186cd54629 Mon Sep 17 00:00:00 2001 From: Tracy Usher Date: Thu, 21 May 2026 11:59:20 -0700 Subject: [PATCH 02/11] Top level fhicl files for running the regular YZ detsim and the overlay --- fcl/detsim/detsim_2d_icarus_refactored_yzsim.fcl | 9 ++++++--- fcl/detsim/detsim_2d_icarus_refactored_yzsim_overlay.fcl | 5 ++++- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/fcl/detsim/detsim_2d_icarus_refactored_yzsim.fcl b/fcl/detsim/detsim_2d_icarus_refactored_yzsim.fcl index d1f908bfc..c24fff973 100644 --- a/fcl/detsim/detsim_2d_icarus_refactored_yzsim.fcl +++ b/fcl/detsim/detsim_2d_icarus_refactored_yzsim.fcl @@ -1,6 +1,6 @@ #include "services_icarus_simulation.fcl" #include "larg4_services_icarus.fcl" -#include "detsimmodules_wirecell_ICARUS.fcl" +#include "detsimmodules_wirecell_per_TPC_ICARUS.fcl" #include "opdetsim_pmt_icarus.fcl" #include "crtsimmodules_icarus.fcl" #include "trigger_emulation_icarus.fcl" @@ -25,13 +25,16 @@ physics: { crtdaq: @local::icarus_crtsim opdaq: @local::icarus_simpmt filtersed: @local::simedepfilter_ind1gap - daq: @local::icarus_simwire_wirecell_yz + daq0: @local::icarus_simwire_wirecell_yz_0 + daq1: @local::icarus_simwire_wirecell_yz_1 + daq2: @local::icarus_simwire_wirecell_yz_2 + daq3: @local::icarus_simwire_wirecell_yz_3 merge: @local::icarus_merge_yz_wirecell_simchans rns: { module_type: "RandomNumberSaver" } } # producers - simulate: [ rns, opdaq, @sequence::icarus_shifting_triggersim.path, filtersed, daq, merge, crtdaq ] + simulate: [ rns, opdaq, @sequence::icarus_shifting_triggersim.path, filtersed, daq0, daq1, daq2, daq3, merge, crtdaq ] # define the output stream, there could be more than one if using filters stream: [ rootoutput ] diff --git a/fcl/detsim/detsim_2d_icarus_refactored_yzsim_overlay.fcl b/fcl/detsim/detsim_2d_icarus_refactored_yzsim_overlay.fcl index ed2f25196..1c688c1cf 100644 --- a/fcl/detsim/detsim_2d_icarus_refactored_yzsim_overlay.fcl +++ b/fcl/detsim/detsim_2d_icarus_refactored_yzsim_overlay.fcl @@ -1,3 +1,6 @@ #include "detsim_2d_icarus_refactored_yzsim.fcl" -physics.producers.daq: @local::icarus_simwire_wirecell_yz_overlay +physics.producers.daq0: @local::icarus_simwire_wirecell_yz_overlay_0 +physics.producers.daq1: @local::icarus_simwire_wirecell_yz_overlay_1 +physics.producers.daq2: @local::icarus_simwire_wirecell_yz_overlay_2 +physics.producers.daq3: @local::icarus_simwire_wirecell_yz_overlay_3 From b99e24816160aa320209bbaf7e2a438386d48edf Mon Sep 17 00:00:00 2001 From: Tracy Usher Date: Thu, 21 May 2026 11:59:39 -0700 Subject: [PATCH 03/11] Updates some functions needed for new yz scheme --- icaruscode/TPC/ICARUSWireCell/icarus/sim.jsonnet | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/icaruscode/TPC/ICARUSWireCell/icarus/sim.jsonnet b/icaruscode/TPC/ICARUSWireCell/icarus/sim.jsonnet index e11d5c8d5..8c63d8c1b 100644 --- a/icaruscode/TPC/ICARUSWireCell/icarus/sim.jsonnet +++ b/icaruscode/TPC/ICARUSWireCell/icarus/sim.jsonnet @@ -20,8 +20,14 @@ function(params, tools) { for n in std.range(0, nanodes-1)], + // Build one DepoTransform per (anode, plane, response) — 45 entries per + // anode (3 planes x 15 response bins). Derive the count from + // tools.anodes so that callers that narrow tools.anodes to a per-TPC + // subset (e.g. the per-module wcls-per-tpc...jsonnet) only build the + // relevant slice instead of indexing past the end. With the full 8 + // anodes this evaluates to std.range(0, 359), matching the legacy form. local transformsyz = [sim.make_depotransform_withplane("depotransform-%d-"%n+tools.anodes[std.floor(n/45)].name+"-plane%d"%std.mod(std.floor(n/15),3),tools.anodes[std.floor(n/45)], [std.mod(std.floor(n/15),3)],tools.pirs[std.mod(n,15)]) - for n in std.range(0, 359)], + for n in std.range(0, nanodes*45 - 1)], // local transformsyz = [sim.make_depotransform_withplane("depotransform-%d-"%n+tools.anodes[std.floor(n/45)].name+"-plane%d"%std.mod(std.floor(n/15),3),tools.anodes[std.floor(n/45)], [std.mod(std.floor(n/15),3)],tools.pirs[0]) @@ -60,8 +66,8 @@ function(params, tools) { toffset: 0, nticks: params.sim.reframer.nticks, }, - }, nin=1, nout=1) for n in std.range(0, 359)], - + }, nin=1, nout=1) for n in std.range(0, nanodes*45 - 1)], + // fixme: see https://github.com/WireCell/wire-cell-gen/issues/29 local make_noise_model = function(anode, csdb=null) { @@ -133,7 +139,7 @@ function(params, tools) { splusn: f.fanpipe('DepoSetFanout', self.splusn_pipelines, 'FrameFanin', "simsplusngraph", outtags), analog_pipelinesyz: [g.pipeline([depos2tracesyz[n]], - name="simanalogpipe-%d-"%n + tools.anodes[std.floor(n/45)].name) for n in std.range(0, 359)], + name="simanalogpipe-%d-"%n + tools.anodes[std.floor(n/45)].name) for n in std.range(0, nanodes*45 - 1)], signal_pipelinesyz: [g.pipeline([depos2tracesyz[n], reframersyz[n], digitizers[n]], name="simsigpipe-" + tools.anodes[n].name) for n in std.range(0, nanodes-1)], splusn_pipelinesyz: [g.pipeline([depos2tracesyz[n], reframersyz[n], noises[n], digitizers[n]], From 378210b35632d83c96857c78973ef03846da4be7 Mon Sep 17 00:00:00 2001 From: Tracy Usher Date: Thu, 21 May 2026 12:00:04 -0700 Subject: [PATCH 04/11] Remapping the SimChannel inputs for merging --- fcl/g4/mergesimsources_icarus.fcl | 720 +++++++++++++++--------------- 1 file changed, 360 insertions(+), 360 deletions(-) diff --git a/fcl/g4/mergesimsources_icarus.fcl b/fcl/g4/mergesimsources_icarus.fcl index d61d570eb..13b1a2e3a 100644 --- a/fcl/g4/mergesimsources_icarus.fcl +++ b/fcl/g4/mergesimsources_icarus.fcl @@ -70,366 +70,366 @@ icarus_merge_yz_wirecell_simchans : FillAuxDetHits: false InputSourcesLabels: [ - "daq:simpleSC0" - ,"daq:simpleSC1" - ,"daq:simpleSC2" - ,"daq:simpleSC3" - ,"daq:simpleSC4" - ,"daq:simpleSC5" - ,"daq:simpleSC6" - ,"daq:simpleSC7" - ,"daq:simpleSC8" - ,"daq:simpleSC9" - ,"daq:simpleSC10" - ,"daq:simpleSC11" - ,"daq:simpleSC12" - ,"daq:simpleSC13" - ,"daq:simpleSC14" - ,"daq:simpleSC15" - ,"daq:simpleSC16" - ,"daq:simpleSC17" - ,"daq:simpleSC18" - ,"daq:simpleSC19" - ,"daq:simpleSC20" - ,"daq:simpleSC21" - ,"daq:simpleSC22" - ,"daq:simpleSC23" - ,"daq:simpleSC24" - ,"daq:simpleSC25" - ,"daq:simpleSC26" - ,"daq:simpleSC27" - ,"daq:simpleSC28" - ,"daq:simpleSC29" - ,"daq:simpleSC30" - ,"daq:simpleSC31" - ,"daq:simpleSC32" - ,"daq:simpleSC33" - ,"daq:simpleSC34" - ,"daq:simpleSC35" - ,"daq:simpleSC36" - ,"daq:simpleSC37" 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,"daq3:simpleSC331" + ,"daq3:simpleSC332" + ,"daq3:simpleSC333" + ,"daq3:simpleSC334" + ,"daq3:simpleSC335" + ,"daq3:simpleSC336" + ,"daq3:simpleSC337" + ,"daq3:simpleSC338" + ,"daq3:simpleSC339" + ,"daq3:simpleSC340" + ,"daq3:simpleSC341" + ,"daq3:simpleSC342" + ,"daq3:simpleSC343" + ,"daq3:simpleSC344" + ,"daq3:simpleSC345" + ,"daq3:simpleSC346" + ,"daq3:simpleSC347" + ,"daq3:simpleSC348" + ,"daq3:simpleSC349" + ,"daq3:simpleSC350" + ,"daq3:simpleSC351" + ,"daq3:simpleSC352" + ,"daq3:simpleSC353" + ,"daq3:simpleSC354" + ,"daq3:simpleSC355" + ,"daq3:simpleSC356" + ,"daq3:simpleSC357" + ,"daq3:simpleSC358" + ,"daq3:simpleSC359" ] TrackIDOffsets: [ From cb8e876a92ce9e0c672a23a7f13825f221dff50e Mon Sep 17 00:00:00 2001 From: Tracy Usher Date: Thu, 21 May 2026 12:00:33 -0700 Subject: [PATCH 05/11] The input scheme for stage 0 changes with the move to four modules at detsim --- fcl/reco/Stage0/mc/stage0_run2_icarus_mc.fcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fcl/reco/Stage0/mc/stage0_run2_icarus_mc.fcl b/fcl/reco/Stage0/mc/stage0_run2_icarus_mc.fcl index 3456eee69..fdfce80b0 100644 --- a/fcl/reco/Stage0/mc/stage0_run2_icarus_mc.fcl +++ b/fcl/reco/Stage0/mc/stage0_run2_icarus_mc.fcl @@ -44,7 +44,7 @@ physics.producers.ophit.InputModule: "shifted" # If we are running the 1D drift simulation we need to switch to using: # `physics.producers.MCDecodeTPCROI.FragmentsLabelVec: ["daq3:PHYSCRATEDATATPCWW","daq2:PHYSCRATEDATATPCWE","daq1:PHYSCRATEDATATPCEW","daq0:PHYSCRATEDATATPCEE"]` # -physics.producers.MCDecodeTPCROI.FragmentsLabelVec: ["daq:TPCWW","daq:TPCWE","daq:TPCEW","daq:TPCEE"] +physics.producers.MCDecodeTPCROI.FragmentsLabelVec: ["daq3:TPCWW","daq2:TPCWE","daq1:TPCEW","daq1:TPCEE"] physics.producers.MCDecodeTPCROI.OutInstanceLabelVec: ["PHYSCRATEDATATPCWW", "PHYSCRATEDATATPCWE", "PHYSCRATEDATATPCEW", "PHYSCRATEDATATPCEE"] physics.producers.decon1droi.RawDigitLabelVec: ["MCDecodeTPCROI:PHYSCRATEDATATPCWW","MCDecodeTPCROI:PHYSCRATEDATATPCWE","MCDecodeTPCROI:PHYSCRATEDATATPCEW","MCDecodeTPCROI:PHYSCRATEDATATPCEE"] From fbe9e2f23783bea085d1f1a6acdf0a86b5de51d3 Mon Sep 17 00:00:00 2001 From: Tracy Usher Date: Thu, 21 May 2026 12:00:58 -0700 Subject: [PATCH 06/11] I am not sure if these are necessary? --- .../detsimmodules_wirecell_ICARUS.fcl | 2 +- ...-drift-simchannel-yzsim-refactored.jsonnet | 106 +++++++++++++----- 2 files changed, 82 insertions(+), 26 deletions(-) diff --git a/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_ICARUS.fcl b/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_ICARUS.fcl index 6bc7c326f..7138418fc 100644 --- a/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_ICARUS.fcl +++ b/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_ICARUS.fcl @@ -16,7 +16,7 @@ icarus_simwire_wirecell: //loglevels: ["magnify:debug"] plugins: ["WireCellPgraph", "WireCellGen","WireCellSio","WireCellRoot","WireCellLarsoft", "WireCellHio"] // needs to be found via your WIRECELL_PATH - configs: ["pgrapher/experiment/icarus/wcls-multitpc-sim-drift-simchannel-refactored.jsonnet"] + configs: ["pgrapher/experiment/icarus/wcls-multitpc-sim-drift-simchannel-yzsim-refactored.jsonnet"] // Contract note: these exact "type:name" must be used to identify // the configuration data structures for these components in the Jsonnet. inputers: ["wclsSimDepoSetSource:electron"] diff --git a/icaruscode/TPC/ICARUSWireCell/icarus/wcls-multitpc-sim-drift-simchannel-yzsim-refactored.jsonnet b/icaruscode/TPC/ICARUSWireCell/icarus/wcls-multitpc-sim-drift-simchannel-yzsim-refactored.jsonnet index db363894c..38ca1fcc4 100644 --- a/icaruscode/TPC/ICARUSWireCell/icarus/wcls-multitpc-sim-drift-simchannel-yzsim-refactored.jsonnet +++ b/icaruscode/TPC/ICARUSWireCell/icarus/wcls-multitpc-sim-drift-simchannel-yzsim-refactored.jsonnet @@ -210,25 +210,48 @@ local setdrifters = [g.pnode({ name: 'setdrifters%d' %n, data: { drifter: wc.tn(drifters[n]) + #drifter: "Drifter" } }, nin=1, nout=1, uses=[drifters[n]]) #uses=[drifter]) for n in std.range(0,359)]; -local scalers = [{ +local yzmap_filter = { + type: "YZMap", name: "yzmap_filter", + data: { + filename: 'yzmap_icarus_v3_run1.json', + bin_width: 10*wc.cm, + bin_height: 10*wc.cm, + yoffset: 180*wc.cm, + zoffset: 900*wc.cm, + nbinsy: 31, + nbinsz: 180, + } +}; +local yzmap_gain = { + type: "YZMap", name: "yzmap_gain", + data: { + filename: 'yzmap_gain_icarus_v3_run1.json', + bin_width: 10*wc.cm, + bin_height: 10*wc.cm, + yoffset: 180*wc.cm, + zoffset: 900*wc.cm, + nbinsy: 31, + nbinsz: 180, + } +}; + +local scalers = [{ type: "Scaler", - name: "scaler%d" %n, //%std.floor(n/45), - data: params.lar { - yzmap_scale_filename: 'yzmap_gain_icarus_v3_run2.json', - bin_width: 10*wc.cm, - tpc_width: 1500*wc.mm, - bin_height: 10*wc.cm, - anode: wc.tn(tools.anodes[std.floor(n/45)]), - plane: std.mod(std.floor(n/15),3) - }, - } + name: "scaler%d" %n, + data: { + yzmap: wc.tn(yzmap_gain), + anode: wc.tn(tools.anodes[std.floor(n/45)]), + plane: std.mod(std.floor(n/15),3) + }, + } for n in std.range(0,359)]; local setscaler = [g.pnode({ @@ -238,7 +261,7 @@ local setscaler = [g.pnode({ scaler: wc.tn(scalers[n]) } }, nin=1, nout=1, - uses=[scalers[n]]) + uses=[scalers[n], yzmap_gain]) for n in std.range(0,359)]; @@ -416,20 +439,13 @@ local deposetfilteryz = [ g.pnode({ type: 'DepoSetFilterYZ', name: 'deposetfilteryz_resp%d-'%std.mod(r,15)+'plane%d-'%std.mod(std.floor(r/15),3)+tools.anodes[std.floor(r/45)].name, data: { - yzmap_filename: 'yzmap_icarus_v3_run2.json', - bin_width: 10*wc.cm, - tpc_width: 1500*wc.mm, - bin_height: 10*wc.cm, - yoffset: 180*wc.cm, - zoffset: 900*wc.cm, - nbinsy: 31, - nbinsz: 180, - resp: std.mod(r,15), + yzmap: wc.tn(yzmap_filter), + resp: std.mod(r,15), anode: wc.tn(tools.anodes[std.floor(r/45)]), - plane: std.mod(std.floor(r/15),3) + plane: std.mod(std.floor(r/15),3) } }, nin=1, nout=1, - uses=tools.anodes) + uses=tools.anodes + [yzmap_filter]) for r in std.range(0,359)]; local util = import 'pgrapher/experiment/icarus/funcs.jsonnet'; @@ -458,7 +474,10 @@ local pipe_reducer = util.fansummeryz('DepoSetFanout', analog_pipes, frame_summe // }, nin=1, nout=1); //local frameio = io.numpy.frames(output); -local sink = sim.frame_sink; +// sim.frame_sink is g.pnode({type:"DumpFrames"}, ...) — its inode has no +// 'name' field, so the wrapper's lazy `name: prune_array([..., inode.name, ""])[0]` +// throws "Field does not exist: name" the first time anything forces it. +local sink = g.pnode({ type: 'DumpFrames', name: 'sinkdump' }, nin=1, nout=0); @@ -478,4 +497,41 @@ local app = { // Finally, the configuration sequence which is emitted. -g.uses(graph) + [app] +// Replacement for g.uses(graph). The library version (pgraph.popuses + +// wc.unique_list) re-expands shared sub-DAGs every time they're encountered +// and then dedups via O(N^2) deep-equality; with the 360-element fan-out +// here that grows to many minutes. This DFS post-order visits each unique +// inode exactly once (memoized by "type:name") and emits children before +// parents, matching popuses' ordering -- which downstream WCT relies on +// (e.g. WireSchemaFile must configure before AnodePlanes that reference it). +// Pnodes (g.pipeline/g.pnode/g.intern wrappers) are scaffolding whose names +// can collide (fandrifter creates fanout/fanin/intern all named 'fandrifter'), +// so we always traverse them and never dedup them. The pgraph is acyclic +// by design, so unconditional traversal terminates. +local key_of(x) = if std.objectHas(x, 'name') && x.name != '' + then x.type + ':' + x.name + else x.type; +local strip_uses(x) = { [k]: x[k] for k in std.objectFields(x) if k != 'uses' }; + +local visit(node, state) = + if node.type == 'Pnode' then + if std.objectHas(node, 'uses') + then std.foldl(function(s, c) visit(c, s), node.uses, state) + else state + else + local k = key_of(node); + if std.objectHas(state.seen, k) then state + else + local after_children = + if std.objectHas(node, 'uses') + then std.foldl(function(s, c) visit(c, s), node.uses, state) + else state; + { + seen: after_children.seen { [k]: true }, + result: after_children.result + [strip_uses(node)], + }; + +local resolve_uses_unique(roots) = + std.foldl(function(s, n) visit(n, s), roots, { seen: {}, result: [] }).result; + +resolve_uses_unique(graph.uses) + [app] From fffb353c04e0628cdbdb467456fb511a498cbabc Mon Sep 17 00:00:00 2001 From: Tracy Usher Date: Tue, 2 Jun 2026 11:35:14 -0700 Subject: [PATCH 07/11] Updates aimed at getting the non-yz simulation to run. Note that the yz sim uses 4 modules (daq0-daq3) while the standard sim continues to use only one (daq) so stage 0 will need to recognize this --- .../detsimmodules_wirecell_ICARUS.fcl | 1 - .../detsimmodules_wirecell_per_TPC_ICARUS.fcl | 21 ++-- ...pc-sim-drift-simchannel-refactored.jsonnet | 104 ++++++++++++------ ...-drift-simchannel-yzsim-refactored.jsonnet | 66 +++++------ 4 files changed, 113 insertions(+), 79 deletions(-) diff --git a/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_ICARUS.fcl b/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_ICARUS.fcl index 7138418fc..374484657 100644 --- a/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_ICARUS.fcl +++ b/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_ICARUS.fcl @@ -22,7 +22,6 @@ icarus_simwire_wirecell: inputers: ["wclsSimDepoSetSource:electron"] outputers: [ - "wclsDepoSetSimChannelSink:postdriftold", "wclsDepoFluxWriter:postdrift", "wclsFrameSaver:simdigits0", "wclsFrameSaver:simdigits1", diff --git a/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_per_TPC_ICARUS.fcl b/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_per_TPC_ICARUS.fcl index 5d316110a..1a7ca12ba 100644 --- a/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_per_TPC_ICARUS.fcl +++ b/icaruscode/TPC/ICARUSWireCell/detsimmodules_wirecell_per_TPC_ICARUS.fcl @@ -16,13 +16,12 @@ icarus_simwire_wirecell: //loglevels: ["magnify:debug"] plugins: ["WireCellPgraph", "WireCellGen","WireCellSio","WireCellRoot","WireCellLarsoft", "WireCellHio"] // needs to be found via your WIRECELL_PATH - configs: ["pgrapher/experiment/icarus/wcls-multitpc-sim-drift-simchannel-yzsim-refactored.jsonnet"] + configs: ["pgrapher/experiment/icarus/wcls-multitpc-sim-drift-simchannel-refactored.jsonnet"] // Contract note: these exact "type:name" must be used to identify // the configuration data structures for these components in the Jsonnet. inputers: ["wclsSimDepoSetSource:electron"] outputers: [ - "wclsDepoSetSimChannelSink:postdriftold", "wclsDepoFluxWriter:postdrift", "wclsFrameSaver:simdigits0", "wclsFrameSaver:simdigits1", @@ -31,11 +30,11 @@ icarus_simwire_wirecell: ] // Make available parameters via Jsonnet's std.extVar() params: { - files_fields: "icarus_fnal_fit_ks_P0nom.json.bz2" - file_rcresp: "icarus_fnal_rc_tail.json" # use the RCResponse by default - cathode_input_format: "array" # scalar (flat) or array (bent) - SimEnergyDepositLabel: "ionization" - } + files_fields: "icarus_fnal_fit_ks_P0nom.json.bz2" + file_rcresp: "icarus_fnal_rc_tail.json" # use the RCResponse by default + cathode_input_format: "array" # scalar (flat) or array (bent) + SimEnergyDepositLabel: "ionization" + } structs: { # load values from simulationservices_icarus.fcl # Longitudinal diffusion constant [cm2/ns] @@ -48,10 +47,10 @@ icarus_simwire_wirecell: # Electron drift speed, assumes a certain applied E-field [mm/us] # driftSpeed: 1.5756 # Scaling Parameters from int and coh noise components - int_noise_scale: 1.0 - coh_noise_scale: 1.0 + int_noise_scale: 1.0 + coh_noise_scale: 1.0 - overlay_drifter: false # default drifter by default + overlay_drifter: false # default drifter by default # Gain and shaping time gain0: 17.05212 # mV/fC @@ -79,9 +78,11 @@ icarus_simwire_wirecell_SConly.wcls_main.outputers:[ ] icarus_simwire_wirecell_shifted: @local::icarus_simwire_wirecell +icarus_simwire_wirecell_shifted.wcls_main.configs: ["pgrapher/experiment/icarus/wcls-multitpc-sim-drift-simchannel-refactored.jsonnet"] icarus_simwire_wirecell_shifted.wcls_main.params.SimEnergyDepositLabel: "shifted" icarus_simwire_wirecell_filtersed: @local::icarus_simwire_wirecell +icarus_simwire_wirecell_filtersed.wcls_main.configs: ["pgrapher/experiment/icarus/wcls-multitpc-sim-drift-simchannel-refactored.jsonnet"] icarus_simwire_wirecell_filtersed.wcls_main.params.SimEnergyDepositLabel: "filtersed" diff --git a/icaruscode/TPC/ICARUSWireCell/icarus/wcls-multitpc-sim-drift-simchannel-refactored.jsonnet b/icaruscode/TPC/ICARUSWireCell/icarus/wcls-multitpc-sim-drift-simchannel-refactored.jsonnet index e5a0210df..80289e1af 100644 --- a/icaruscode/TPC/ICARUSWireCell/icarus/wcls-multitpc-sim-drift-simchannel-refactored.jsonnet +++ b/icaruscode/TPC/ICARUSWireCell/icarus/wcls-multitpc-sim-drift-simchannel-refactored.jsonnet @@ -200,39 +200,39 @@ local sp = sp_maker(params, tools); local sp_pipes = [sp.make_sigproc(a) for a in tools.anodes]; local rng = tools.random; -local wcls_simchannel_sink_old = - g.pnode({ - type: 'wclsDepoSetSimChannelSink', - name: 'postdriftold', - data: { - artlabel: 'simpleSCOld', // where to save in art::Event - anodes_tn: [wc.tn(anode) for anode in tools.anodes], - rng: wc.tn(rng), - tick: params.daq.tick, - start_time: -0.34 * wc.ms, // TriggerOffsetTPC from detectorclocks_icarus.fcl - readout_time: params.daq.readout_time, - nsigma: 3.0, - drift_speed: params.lar.drift_speed, - u_to_rp: 100 * wc.mm, - v_to_rp: 100 * wc.mm, - y_to_rp: 100 * wc.mm, - - // GP: The shaping time of the electronics response (1.3us) shifts the peak - // of the field response time. Eyeballing simulation times, it does this - // by a bit less than the 1.3us (1us). - // - // N.B. for future: there is likely an additional offset on the two induction - // planes due to where the deconvolution precisely defines where the "peak" - // of the pulse is. One may want to refine these parameters to account for that. - // This perturbation shouldn't be more than a tick or two. - u_time_offset: std.extVar('time_offset_u') * wc.us, - v_time_offset: std.extVar('time_offset_v') * wc.us, - y_time_offset: std.extVar('time_offset_y') * wc.us, - - g4_ref_time: -1500 * wc.us, // G4RefTime from detectorclocks_icarus.fcl - use_energy: true, - }, - },nin=1, nout=1, uses=tools.anodes); +//local wcls_simchannel_sink_old = +// g.pnode({ +// type: 'wclsDepoSetSimChannelSink', +// name: 'postdriftold', +// data: { +// artlabel: 'simpleSCOld', // where to save in art::Event +// anodes_tn: [wc.tn(anode) for anode in tools.anodes], +// rng: wc.tn(rng), +// tick: params.daq.tick, +// start_time: -0.34 * wc.ms, // TriggerOffsetTPC from detectorclocks_icarus.fcl +// readout_time: params.daq.readout_time, +// nsigma: 3.0, +// drift_speed: params.lar.drift_speed, +// u_to_rp: 100 * wc.mm, +// v_to_rp: 100 * wc.mm, +// y_to_rp: 100 * wc.mm, +// +// // GP: The shaping time of the electronics response (1.3us) shifts the peak +// // of the field response time. Eyeballing simulation times, it does this +// // by a bit less than the 1.3us (1us). +// // +// // N.B. for future: there is likely an additional offset on the two induction +// // planes due to where the deconvolution precisely defines where the "peak" +// // of the pulse is. One may want to refine these parameters to account for that. +// // This perturbation shouldn't be more than a tick or two. +// u_time_offset: std.extVar('time_offset_u') * wc.us, +// v_time_offset: std.extVar('time_offset_v') * wc.us, +// y_time_offset: std.extVar('time_offset_y') * wc.us, +// +// g4_ref_time: -1500 * wc.us, // G4RefTime from detectorclocks_icarus.fcl +// use_energy: true, +// }, +// },nin=1, nout=1, uses=tools.anodes); local wcls_simchannel_sink = g.pnode({ @@ -355,7 +355,7 @@ local sink = sim.frame_sink; // local graph = g.pipeline([wcls_input.depos, drifter, wcls_simchannel_sink.simchannels, bagger, pipe_reducer, retagger, wcls_output.sim_digits, sink]); //local graph = g.pipeline([wcls_input.depos, drifter, wcls_simchannel_sink, bagger, pipe_reducer, sink]); -local graph = g.pipeline([wcls_input.deposet, setdrifter, wcls_simchannel_sink_old, wcls_simchannel_sink, pipe_reducer, sink]); +local graph = g.pipeline([wcls_input.deposet, setdrifter, wcls_simchannel_sink, pipe_reducer, sink]); local app = { type: 'Pgrapher', @@ -366,5 +366,39 @@ local app = { // Finally, the configuration sequence which is emitted. +//g.uses(graph) + [app] + +// Finally, the configuration sequence which is emitted. + +local key_of(x) = if std.objectHas(x, 'name') && x.name != '' + then x.type + ':' + x.name + else x.type; + +local strip_uses(x) = { + [k]: x[k] + for k in std.objectFields(x) + if k != 'uses' +}; -g.uses(graph) + [app] +local visit(node, state) = + if node.type == 'Pnode' then + if std.objectHas(node, 'uses') + then std.foldl(function(s, c) visit(c, s), node.uses, state) + else state + else + local k = key_of(node); + if std.objectHas(state.seen, k) then state + else + local after_children = + if std.objectHas(node, 'uses') + then std.foldl(function(s, c) visit(c, s), node.uses, state) + else state; + { + seen: after_children.seen { [k]: true }, + result: after_children.result + [strip_uses(node)], + }; + +local resolve_uses_unique(roots) = + std.foldl(function(s, n) visit(n, s), roots, { seen: {}, result: [] }).result; + +resolve_uses_unique(graph.uses) + [app] \ No newline at end of file diff --git a/icaruscode/TPC/ICARUSWireCell/icarus/wcls-multitpc-sim-drift-simchannel-yzsim-refactored.jsonnet b/icaruscode/TPC/ICARUSWireCell/icarus/wcls-multitpc-sim-drift-simchannel-yzsim-refactored.jsonnet index 38ca1fcc4..8ccbd62bc 100644 --- a/icaruscode/TPC/ICARUSWireCell/icarus/wcls-multitpc-sim-drift-simchannel-yzsim-refactored.jsonnet +++ b/icaruscode/TPC/ICARUSWireCell/icarus/wcls-multitpc-sim-drift-simchannel-yzsim-refactored.jsonnet @@ -291,39 +291,39 @@ local sp = sp_maker(params, tools); local sp_pipes = [sp.make_sigproc(a) for a in tools.anodes]; local rng = tools.random; -local wcls_simchannel_sink_old = - g.pnode({ - type: 'wclsDepoSetSimChannelSink', - name: 'postdriftold', - data: { - artlabel: 'simpleSCOld', // where to save in art::Event - anodes_tn: [wc.tn(anode) for anode in tools.anodes], - rng: wc.tn(rng), - tick: params.daq.tick, - start_time: -0.34 * wc.ms, // TriggerOffsetTPC from detectorclocks_icarus.fcl - readout_time: params.daq.readout_time, - nsigma: 3.0, - drift_speed: params.lar.drift_speed, - u_to_rp: 100 * wc.mm, - v_to_rp: 100 * wc.mm, - y_to_rp: 100 * wc.mm, - - // GP: The shaping time of the electronics response (1.3us) shifts the peak - // of the field response time. Eyeballing simulation times, it does this - // by a bit less than the 1.3us (1us). - // - // N.B. for future: there is likely an additional offset on the two induction - // planes due to where the deconvolution precisely defines where the "peak" - // of the pulse is. One may want to refine these parameters to account for that. - // This perturbation shouldn't be more than a tick or two. - u_time_offset: std.extVar('time_offset_u') * wc.us, - v_time_offset: std.extVar('time_offset_v') * wc.us, - y_time_offset: std.extVar('time_offset_y') * wc.us, - - g4_ref_time: -1500 * wc.us, // G4RefTime from detectorclocks_icarus.fcl - use_energy: true, - }, - },nin=1, nout=1, uses=tools.anodes); +//local wcls_simchannel_sink_old = +// g.pnode({ +// type: 'wclsDepoSetSimChannelSink', +// name: 'postdriftold', +// data: { +// artlabel: 'simpleSCOld', // where to save in art::Event +// anodes_tn: [wc.tn(anode) for anode in tools.anodes], +// rng: wc.tn(rng), +// tick: params.daq.tick, +// start_time: -0.34 * wc.ms, // TriggerOffsetTPC from detectorclocks_icarus.fcl +// readout_time: params.daq.readout_time, +// nsigma: 3.0, +// drift_speed: params.lar.drift_speed, +// u_to_rp: 100 * wc.mm, +// v_to_rp: 100 * wc.mm, +// y_to_rp: 100 * wc.mm, +// +// // GP: The shaping time of the electronics response (1.3us) shifts the peak +// // of the field response time. Eyeballing simulation times, it does this +// // by a bit less than the 1.3us (1us). +// // +// // N.B. for future: there is likely an additional offset on the two induction +// // planes due to where the deconvolution precisely defines where the "peak" +// // of the pulse is. One may want to refine these parameters to account for that. +// // This perturbation shouldn't be more than a tick or two. +// u_time_offset: std.extVar('time_offset_u') * wc.us, +// v_time_offset: std.extVar('time_offset_v') * wc.us, +// y_time_offset: std.extVar('time_offset_y') * wc.us, +// +// g4_ref_time: -1500 * wc.us, // G4RefTime from detectorclocks_icarus.fcl +// use_energy: true, +// }, +// },nin=1, nout=1, uses=tools.anodes); local wcls_simchannel_sink = [ g.pnode({ From 1d031225a234ced2cfaad6e3b4af3e0e8da9c399 Mon Sep 17 00:00:00 2001 From: Tracy Usher Date: Tue, 2 Jun 2026 11:35:46 -0700 Subject: [PATCH 08/11] Oops, this part of previous commit --- fcl/detsim/detsim_2d_icarus_refactored.fcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fcl/detsim/detsim_2d_icarus_refactored.fcl b/fcl/detsim/detsim_2d_icarus_refactored.fcl index 993ce8586..568261d64 100644 --- a/fcl/detsim/detsim_2d_icarus_refactored.fcl +++ b/fcl/detsim/detsim_2d_icarus_refactored.fcl @@ -1,5 +1,5 @@ #include "services_icarus_simulation.fcl" -#include "detsimmodules_wirecell_ICARUS.fcl" +#include "detsimmodules_wirecell_per_TPC_ICARUS.fcl" #include "opdetsim_pmt_icarus.fcl" #include "crtsimmodules_icarus.fcl" #include "trigger_emulation_icarus.fcl" From a1fd210ec7ae3659384132952c44fa7723d2d03b Mon Sep 17 00:00:00 2001 From: Tracy Usher Date: Tue, 2 Jun 2026 11:36:26 -0700 Subject: [PATCH 09/11] We need a specific stage 0 file when the yz simulation runs which can inherit from the standard one --- fcl/reco/Stage0/mc/stage0_run2_wc_yz_icarus_mc.fcl | 9 +++++++++ 1 file changed, 9 insertions(+) create mode 100644 fcl/reco/Stage0/mc/stage0_run2_wc_yz_icarus_mc.fcl diff --git a/fcl/reco/Stage0/mc/stage0_run2_wc_yz_icarus_mc.fcl b/fcl/reco/Stage0/mc/stage0_run2_wc_yz_icarus_mc.fcl new file mode 100644 index 000000000..f1fddea0a --- /dev/null +++ b/fcl/reco/Stage0/mc/stage0_run2_wc_yz_icarus_mc.fcl @@ -0,0 +1,9 @@ +### +## This fhicl file is used to run "stage0" processing specifically for the case where +## the detector simulation has included the YZ simulation +## + +#include "stage0_run2_wc_icarus_mc.fcl" + +physics.producers.MCDecodeTPCROI.FragmentsLabelVec: ["daq3:TPCWW","daq2:TPCWE","daq1:TPCEW","daq0:TPCEE"] + From 5b53499a5007a4d2c664e9848e7756ec01eecf1e Mon Sep 17 00:00:00 2001 From: Tracy Usher Date: Tue, 2 Jun 2026 11:36:47 -0700 Subject: [PATCH 10/11] Returning this to a single det sim producer --- fcl/reco/Stage0/mc/stage0_run2_icarus_mc.fcl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fcl/reco/Stage0/mc/stage0_run2_icarus_mc.fcl b/fcl/reco/Stage0/mc/stage0_run2_icarus_mc.fcl index fdfce80b0..3456eee69 100644 --- a/fcl/reco/Stage0/mc/stage0_run2_icarus_mc.fcl +++ b/fcl/reco/Stage0/mc/stage0_run2_icarus_mc.fcl @@ -44,7 +44,7 @@ physics.producers.ophit.InputModule: "shifted" # If we are running the 1D drift simulation we need to switch to using: # `physics.producers.MCDecodeTPCROI.FragmentsLabelVec: ["daq3:PHYSCRATEDATATPCWW","daq2:PHYSCRATEDATATPCWE","daq1:PHYSCRATEDATATPCEW","daq0:PHYSCRATEDATATPCEE"]` # -physics.producers.MCDecodeTPCROI.FragmentsLabelVec: ["daq3:TPCWW","daq2:TPCWE","daq1:TPCEW","daq1:TPCEE"] +physics.producers.MCDecodeTPCROI.FragmentsLabelVec: ["daq:TPCWW","daq:TPCWE","daq:TPCEW","daq:TPCEE"] physics.producers.MCDecodeTPCROI.OutInstanceLabelVec: ["PHYSCRATEDATATPCWW", "PHYSCRATEDATATPCWE", "PHYSCRATEDATATPCEW", "PHYSCRATEDATATPCEE"] physics.producers.decon1droi.RawDigitLabelVec: ["MCDecodeTPCROI:PHYSCRATEDATATPCWW","MCDecodeTPCROI:PHYSCRATEDATATPCWE","MCDecodeTPCROI:PHYSCRATEDATATPCEW","MCDecodeTPCROI:PHYSCRATEDATATPCEE"] From 0c4b9e6674a6abab9e40bc3b09c9853300c4a67f Mon Sep 17 00:00:00 2001 From: Tracy Usher Date: Tue, 2 Jun 2026 11:37:12 -0700 Subject: [PATCH 11/11] The "wc" fhicl files now inherit from the "yz sim" file --- fcl/reco/Stage0/mc/stage0_run2_wc_icarus_mc_notriggersim.fcl | 2 +- fcl/reco/Stage0/mc/stage0_run2_wc_raw_icarus_mc.fcl | 2 +- fcl/reco/Stage0/mc/stage0_run2_wcdnn_icarus_mc.fcl | 2 +- fcl/standard/standard_mc_all_stage0_icarus.fcl | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/fcl/reco/Stage0/mc/stage0_run2_wc_icarus_mc_notriggersim.fcl b/fcl/reco/Stage0/mc/stage0_run2_wc_icarus_mc_notriggersim.fcl index 9d738f348..0e8375d0c 100644 --- a/fcl/reco/Stage0/mc/stage0_run2_wc_icarus_mc_notriggersim.fcl +++ b/fcl/reco/Stage0/mc/stage0_run2_wc_icarus_mc_notriggersim.fcl @@ -1,4 +1,4 @@ -#include "stage0_run2_wc_icarus_mc.fcl" +#include "stage0_run2_wc_yz_icarus_mc.fcl" # restore non-shifted labels physics.producers.emuTrigger.BeamGates: "beamgate" diff --git a/fcl/reco/Stage0/mc/stage0_run2_wc_raw_icarus_mc.fcl b/fcl/reco/Stage0/mc/stage0_run2_wc_raw_icarus_mc.fcl index 9531539d2..9ff51c6f3 100644 --- a/fcl/reco/Stage0/mc/stage0_run2_wc_raw_icarus_mc.fcl +++ b/fcl/reco/Stage0/mc/stage0_run2_wc_raw_icarus_mc.fcl @@ -1,7 +1,7 @@ ### ## This fhicl file takes the standard stage 0 wc mc file and keeps the raw digits ## -#include "stage0_run2_wc_icarus_mc.fcl" +#include "stage0_run2_wc_yz_icarus_mc.fcl" # Drop the daq format files on output, # Drop all output from the TPC decoder stage diff --git a/fcl/reco/Stage0/mc/stage0_run2_wcdnn_icarus_mc.fcl b/fcl/reco/Stage0/mc/stage0_run2_wcdnn_icarus_mc.fcl index 8e3c557f9..270374a62 100644 --- a/fcl/reco/Stage0/mc/stage0_run2_wcdnn_icarus_mc.fcl +++ b/fcl/reco/Stage0/mc/stage0_run2_wcdnn_icarus_mc.fcl @@ -1,3 +1,3 @@ -#include "stage0_run2_wc_icarus_mc.fcl" +#include "stage0_run2_wc_yz_icarus_mc.fcl" #include "enable_dnn_sp.fcl" diff --git a/fcl/standard/standard_mc_all_stage0_icarus.fcl b/fcl/standard/standard_mc_all_stage0_icarus.fcl index feb8aca63..7c34ec998 100644 --- a/fcl/standard/standard_mc_all_stage0_icarus.fcl +++ b/fcl/standard/standard_mc_all_stage0_icarus.fcl @@ -1 +1 @@ -#include "stage0_run2_icarus_mc.fcl" +#include "stage0_run2_wc_yz_icarus_mc.fcl"