diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index ede19caf..1ebfa532 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -17,7 +17,7 @@ jobs: name: Presubmit Checks runs-on: openprot-ci-runner steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 - name: Setup Bazel uses: bazel-contrib/setup-bazel@0.19.0 @@ -37,7 +37,7 @@ jobs: needs: presubmit runs-on: openprot-ci-runner steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 - name: Setup Bazel uses: bazel-contrib/setup-bazel@0.19.0 @@ -56,7 +56,7 @@ jobs: runs-on: openprot-ci-runner steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 - name: Setup Bazel uses: bazel-contrib/setup-bazel@0.19.0 @@ -74,7 +74,7 @@ jobs: needs: presubmit runs-on: ubuntu-latest steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 - name: Install Rust toolchain uses: dtolnay/rust-toolchain@stable @@ -82,7 +82,7 @@ jobs: components: clippy - name: Cache cargo registry - uses: actions/cache@v5 + uses: actions/cache@v6 with: path: | ~/.cargo/registry diff --git a/.github/workflows/github_pages.yml b/.github/workflows/github_pages.yml index fd0180fc..62d81719 100644 --- a/.github/workflows/github_pages.yml +++ b/.github/workflows/github_pages.yml @@ -24,7 +24,7 @@ jobs: url: ${{ steps.deployment.outputs.page_url }} steps: - name: Checkout - uses: actions/checkout@v6 + uses: actions/checkout@v7 - name: Setup Bazel uses: bazel-contrib/setup-bazel@0.19.0 diff --git a/.github/workflows/nightly.yml b/.github/workflows/nightly.yml index 2672ec4c..bc380004 100644 --- a/.github/workflows/nightly.yml +++ b/.github/workflows/nightly.yml @@ -20,7 +20,7 @@ jobs: if: github.event_name != 'pull_request' || github.event.label.name == 'run-nightly' steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 - name: Setup Bazel uses: bazel-contrib/setup-bazel@0.19.0 @@ -41,7 +41,7 @@ jobs: needs: nightly-build runs-on: ubuntu-latest steps: - - uses: actions/checkout@v6 + - uses: actions/checkout@v7 - name: Setup Bazel uses: bazel-contrib/setup-bazel@0.19.0 diff --git a/.github/workflows/roll-pigweed.yml b/.github/workflows/roll-pigweed.yml index 5f7111ab..2310f851 100644 --- a/.github/workflows/roll-pigweed.yml +++ b/.github/workflows/roll-pigweed.yml @@ -11,7 +11,7 @@ jobs: runs-on: ubuntu-latest steps: - name: Checkout the earlgrey-hwe branch - uses: actions/checkout@v6 + uses: actions/checkout@v7 - name: Set up Python uses: actions/setup-python@v6 diff --git a/.github/workflows/sync-main-to-earlgrey-hwe.yml b/.github/workflows/sync-main-to-earlgrey-hwe.yml index faad8154..c019acea 100644 --- a/.github/workflows/sync-main-to-earlgrey-hwe.yml +++ b/.github/workflows/sync-main-to-earlgrey-hwe.yml @@ -18,7 +18,7 @@ jobs: private-key: ${{ secrets.SYNCHRONIZE_BOT_PRIVATE_KEY }} - name: Checkout the main branch - uses: actions/checkout@v6 + uses: actions/checkout@v7 with: ref: main fetch-depth: 0 # Fetches all history so branches can be compared diff --git a/MODULE.bazel b/MODULE.bazel index ee3af5a8..12cf7759 100644 --- a/MODULE.bazel +++ b/MODULE.bazel @@ -22,7 +22,7 @@ local_path_override( git_override( module_name = "pigweed", - commit = "01465b97384a68fa698392ca5ed15c678738aab6", # roll:pigweed + commit = "e4acf4a3e44b0886fcc2a1c1f64ffccbb810ee6b", # roll:pigweed patch_args = ["-p1"], patches = [ # Allow integration_tests to build for armv7-m / armv7e-m so the diff --git a/MODULE.bazel.lock b/MODULE.bazel.lock index 70ec3ff4..0d4c973c 100644 --- a/MODULE.bazel.lock +++ b/MODULE.bazel.lock @@ -202,6 +202,8 @@ "https://bcr.bazel.build/modules/jsoncpp/1.9.6/source.json": "a04756d367a2126c3541682864ecec52f92cdee80a35735a3cb249ce015ca000", "https://bcr.bazel.build/modules/libpfm/4.11.0/MODULE.bazel": "45061ff025b301940f1e30d2c16bea596c25b176c8b6b3087e92615adbd52902", "https://bcr.bazel.build/modules/libpfm/4.11.0/source.json": "caaffb3ac2b59b8aac456917a4ecf3167d40478ee79f15ab7a877ec9273937c9", + "https://bcr.bazel.build/modules/llvm-project/17.0.3.bcr.4/MODULE.bazel": "96cc2499b42e0469d11ffbaee705e4686fa61ad173333edbbb9eee66035b925c", + "https://bcr.bazel.build/modules/llvm-project/17.0.3.bcr.4/source.json": "a14902ee5e559776a848af509324bfde916c059ebfe9e672d8d1a6158506e7bb", "https://bcr.bazel.build/modules/lz4/1.9.4/MODULE.bazel": "e3d307b1d354d70f6c809167eafecf5d622c3f27e3971ab7273410f429c7f83a", "https://bcr.bazel.build/modules/lz4/1.9.4/source.json": "233f0bdfc21f254e3dda14683ddc487ca68c6a3a83b7d5db904c503f85bd089b", "https://bcr.bazel.build/modules/mbedtls/3.6.0/MODULE.bazel": "8e380e4698107c5f8766264d4df92e36766248447858db28187151d884995a09", @@ -238,8 +240,8 @@ "https://bcr.bazel.build/modules/pico-sdk/2.2.2-develop.bcr.20260420-79b38e95/source.json": "167d1d3e30c37e1fc76b65cdcbafa683a82fafe1b098b5c02ee0839de5e38c24", "https://bcr.bazel.build/modules/picotool/2.1.0/MODULE.bazel": "809dcf7795f3846ce29b4d676dabc664e57e935926ec5c147ffe02602a63a76f", "https://bcr.bazel.build/modules/picotool/2.2.0/MODULE.bazel": "885720d6e8e2b5c5f03aabe4a326904e2b44ba466f55ad0a9554b81a2e1d2e75", - "https://bcr.bazel.build/modules/picotool/2.2.1-develop.bcr.20260407-d1a8d35/MODULE.bazel": "4d709eee3777ea4f9ac46c68243b4a643d2d072051f49817c4bf80de2ba92440", - "https://bcr.bazel.build/modules/picotool/2.2.1-develop.bcr.20260407-d1a8d35/source.json": "b0709e2233974ef0f8f30b1a4840920abe21ea7ef35fab7b09bfe6e1996edc78", + "https://bcr.bazel.build/modules/picotool/2.2.1-develop.bcr.20260623-7ac0c2a/MODULE.bazel": "749279a9edb7cb9543715d1a8a88b2d28831339ff0d3d94d919f94f6e5d6ef87", + "https://bcr.bazel.build/modules/picotool/2.2.1-develop.bcr.20260623-7ac0c2a/source.json": "4c71f60f3c467d6f133332124828044507d6a479de2b86ad1ef4936ccfce1c78", "https://bcr.bazel.build/modules/platforms/0.0.10/MODULE.bazel": "8cb8efaf200bdeb2150d93e162c40f388529a25852b332cec879373771e48ed5", "https://bcr.bazel.build/modules/platforms/0.0.11/MODULE.bazel": "0daefc49732e227caa8bfa834d65dc52e8cc18a2faf80df25e8caea151a9413f", "https://bcr.bazel.build/modules/platforms/0.0.4/MODULE.bazel": "9b328e31ee156f53f3c416a64f8491f7eb731742655a47c9eec4703a71644aee", @@ -462,6 +464,8 @@ "https://bcr.bazel.build/modules/rules_rust/0.68.1/MODULE.bazel": "8d3332ef4079673385eb81f8bd68b012decc04ac00c9d5a01a40eff90301732c", "https://bcr.bazel.build/modules/rules_rust/0.70.0/MODULE.bazel": "5b1407b11c305bc2522e204e7f170faf8399e836e49b6afef9074dfe532e6c3f", "https://bcr.bazel.build/modules/rules_rust/0.70.0/source.json": "24ae6d23425359db1c3148aa22c389970fce9a06102b2b3a329a2800f9569de2", + "https://bcr.bazel.build/modules/rules_rust_bindgen/0.70.0/MODULE.bazel": "3d1f5c3e7316e6dddd5c1c19569ab521c90a7373cde11649d7215535912d0d94", + "https://bcr.bazel.build/modules/rules_rust_bindgen/0.70.0/source.json": "d95a0c2f9d5f263bbad075ef2a2d2b38655dcc166a8ab9dab60fdcdea56acad5", "https://bcr.bazel.build/modules/rules_rust_mdbook/0.70.0/MODULE.bazel": "70e25e799e1e4c15db28ba3a6f5b470ab0e7383de1ac541332e4aff195ba0a2b", "https://bcr.bazel.build/modules/rules_rust_mdbook/0.70.0/source.json": "320380a2174f3358bf4e59f7484480fb4e73222a37a6b568021210f8d7fc6d4f", "https://bcr.bazel.build/modules/rules_rust_prost/0.68.1/MODULE.bazel": "b74007ee6f527a1853d1bffb6af31d6b5782d431fb575c3e704b87d41dd823dd", @@ -1395,8 +1399,8 @@ }, "@@pigweed+//pw_toolchain/cc:pw_cxx_toolchain.bzl%pw_cxx_toolchain": { "general": { - "bzlTransitiveDigest": "ur0PgZTSpo9gLUum1tYMVnAibSN5cy89N+uaHAxXtKU=", - "usagesDigest": "VJKzSLvYrPIp3N/cUgLBxWOQL+32xuBhnqLFoukfvvQ=", + "bzlTransitiveDigest": "AkQG/A61y2NaRKMyE6RG0+811zW9gOPZbCYPUD7rDbw=", + "usagesDigest": "LjL6Mn0mEhmcHDR0ZiXNIA8rTPYzNHwpLCeubh2bM20=", "recordedFileInputs": {}, "recordedDirentsInputs": {}, "envVariables": {}, @@ -1405,8 +1409,8 @@ "repoRuleId": "@@pigweed+//pw_env_setup/bazel/cipd_setup:cipd_rules.bzl%cipd_repository", "attributes": { "build_file": "@@pigweed+//pw_toolchain/build_external:arm_none_eabi_gcc.BUILD", - "path": "fuchsia/third_party/armgcc/${os}-${arch}", - "tag": "version:2@12.2.MPACBTI-Rel1.1" + "path": "fuchsia/third_party/3pp/armgcc/${os}-${arch}", + "tag": "version:2@15.2.rel1.1" } }, "llvm_toolchain": { @@ -1445,8 +1449,8 @@ }, "@@pigweed+//pw_toolchain/rust:extensions.bzl%pw_rust": { "general": { - "bzlTransitiveDigest": "VbWv5Ea8Ymo5+WBLsxmIiRRjVMUDImyeIdt8xvmCgsU=", - "usagesDigest": "bmE+ROzLg+gRBb2nCT2Wk2DGu4N6/oMEkgwPpbOK5ps=", + "bzlTransitiveDigest": "NumKVT83bggVjjBKoAoCyp3P/XcYY8xmmTR+T91EZBM=", + "usagesDigest": "qn6V/JpVbH7xCHpSEP1auRjnFp4ij5oSrXPEANV46js=", "recordedFileInputs": {}, "recordedDirentsInputs": {}, "envVariables": {}, @@ -1472,7 +1476,15 @@ "attributes": { "build_file": "@@pigweed+//pw_toolchain/rust:rust_analyzer.BUILD", "path": "fuchsia/third_party/rust-analyzer/linux-arm64", - "tag": "git_revision:e79b8223f7e0f000d75e7bf9a8f5b590ff7eb7f8" + "tag": "git_revision:29677075a141e121789e3b25ff3e40e79207b442" + } + }, + "rust_bindgen_linux_aarch64": { + "repoRuleId": "@@pigweed+//pw_env_setup/bazel/cipd_setup:cipd_rules.bzl%cipd_repository", + "attributes": { + "build_file": "@@pigweed+//pw_toolchain/rust:rust_bindgen.BUILD", + "path": "fuchsia/third_party/rust_bindgen/linux-arm64", + "tag": "git_revisions:93726885850c20847ac445664bc7bb2b827d9642,deb6854eec93529b2bd30178d400ad2ee7665cd4" } }, "rust_toolchain_host_linux_x86_64": { @@ -1496,7 +1508,15 @@ "attributes": { "build_file": "@@pigweed+//pw_toolchain/rust:rust_analyzer.BUILD", "path": "fuchsia/third_party/rust-analyzer/linux-amd64", - "tag": "git_revision:e79b8223f7e0f000d75e7bf9a8f5b590ff7eb7f8" + "tag": "git_revision:29677075a141e121789e3b25ff3e40e79207b442" + } + }, + "rust_bindgen_linux_x86_64": { + "repoRuleId": "@@pigweed+//pw_env_setup/bazel/cipd_setup:cipd_rules.bzl%cipd_repository", + "attributes": { + "build_file": "@@pigweed+//pw_toolchain/rust:rust_bindgen.BUILD", + "path": "fuchsia/third_party/rust_bindgen/linux-amd64", + "tag": "git_revisions:93726885850c20847ac445664bc7bb2b827d9642,deb6854eec93529b2bd30178d400ad2ee7665cd4" } }, "rust_toolchain_host_macos_aarch64": { @@ -1520,7 +1540,15 @@ "attributes": { "build_file": "@@pigweed+//pw_toolchain/rust:rust_analyzer.BUILD", "path": "fuchsia/third_party/rust-analyzer/mac-arm64", - "tag": "git_revision:e79b8223f7e0f000d75e7bf9a8f5b590ff7eb7f8" + "tag": "git_revision:29677075a141e121789e3b25ff3e40e79207b442" + } + }, + "rust_bindgen_macos_aarch64": { + "repoRuleId": "@@pigweed+//pw_env_setup/bazel/cipd_setup:cipd_rules.bzl%cipd_repository", + "attributes": { + "build_file": "@@pigweed+//pw_toolchain/rust:rust_bindgen.BUILD", + "path": "fuchsia/third_party/rust_bindgen/mac-arm64", + "tag": "git_revisions:93726885850c20847ac445664bc7bb2b827d9642,deb6854eec93529b2bd30178d400ad2ee7665cd4" } }, "rust_toolchain_host_macos_x86_64": { @@ -1544,7 +1572,15 @@ "attributes": { "build_file": "@@pigweed+//pw_toolchain/rust:rust_analyzer.BUILD", "path": "fuchsia/third_party/rust-analyzer/mac-amd64", - "tag": "git_revision:e79b8223f7e0f000d75e7bf9a8f5b590ff7eb7f8" + "tag": "git_revision:29677075a141e121789e3b25ff3e40e79207b442" + } + }, + "rust_bindgen_macos_x86_64": { + "repoRuleId": "@@pigweed+//pw_env_setup/bazel/cipd_setup:cipd_rules.bzl%cipd_repository", + "attributes": { + "build_file": "@@pigweed+//pw_toolchain/rust:rust_bindgen.BUILD", + "path": "fuchsia/third_party/rust_bindgen/mac-amd64", + "tag": "git_revisions:93726885850c20847ac445664bc7bb2b827d9642,deb6854eec93529b2bd30178d400ad2ee7665cd4" } }, "rust_toolchain_target_thumbv6m-none-eabi_armv6-m": { @@ -2785,23 +2821,23 @@ "bzlTransitiveDigest": "pJGPYIkbVrEoiR6YLuU72xx4PvVY4idccFMOWJLmQ+4=", "usagesDigest": "/Nz9QH+EBlDXoVXWiAEH8owsAo1cu+GkXjlRdolG7Sk=", "recordedFileInputs": { - "@@//third_party/crates_io/Cargo.lock": "eac2c7966bf4d855547714d841b236d4a4c245118815682e720a48e9035635fb", - "@@//third_party/crates_io/Cargo.toml": "31508eeb838cc079810d93cb9801a21cd5a992af58602b15205474862f8280b3", + "@@//third_party/crates_io/Cargo.lock": "89b1c9239e43dae22407a70b21cac165ea5832e2f0fa402c44ca5a1b745df669", + "@@//third_party/crates_io/Cargo.toml": "040660232445ac3ef9c0b5735465ea0b7af830f7263068e869c68b34e2dbb110", "@@caliptra_deps+//crates_io/embedded/Cargo.lock": "d6c0101f48da22f2bc2d339f358de79bad3dd03218c6db29a14099b9f7757691", "@@caliptra_deps+//crates_io/embedded/Cargo.toml": "8f9f4ed2721db13476b12fdac045dac2142b38f189a8abb5f4c446dc0c6ac3dd", "@@caliptra_deps+//crates_io/host/Cargo.lock": "ae555b01424917ec61d892c15d7a66af88c2f10be4e0e7b0bc2357b702883b89", "@@caliptra_deps+//crates_io/host/Cargo.toml": "466d5a4467db483353a045384ab6114406490f526d40689317021d91ef201071", "@@pigweed+//third_party/crates_io/crates_no_std/Cargo.lock": "a638a4d2ec1fd8494c090dc6136fbd84adbb6c8fce9982ab838edc76d6dfa71b", "@@pigweed+//third_party/crates_io/crates_no_std/Cargo.toml": "830c5731bf64fb8d82e583e8a0cdc21ceba2d7322fe42a7d07ced3ebeb22ad33", - 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To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\npackage(default_visibility = [\"//visibility:public\"])\n\nexports_files(\n [\n \"cargo-bazel.json\",\n \"crates.bzl\",\n \"defs.bzl\",\n ] + glob(\n allow_empty = True,\n include = [\"*.bazel\"],\n ),\n)\n\nfilegroup(\n name = \"srcs\",\n srcs = glob(\n allow_empty = True,\n include = [\n \"*.bazel\",\n \"*.bzl\",\n ],\n ),\n)\n\n# Workspace Member Dependencies\nalias(\n name = \"aes-0.8.4\",\n actual = \"@rust_crates__aes-0.8.4//:aes\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"aes\",\n actual = \"@rust_crates__aes-0.8.4//:aes\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"aes-gcm-0.10.3\",\n actual = \"@rust_crates__aes-gcm-0.10.3//:aes_gcm\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"aes-gcm\",\n actual = \"@rust_crates__aes-gcm-0.10.3//:aes_gcm\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"aligned-0.4.3\",\n actual = \"@rust_crates__aligned-0.4.3//:aligned\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"aligned\",\n actual = \"@rust_crates__aligned-0.4.3//:aligned\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"anyhow-1.0.102\",\n actual = \"@rust_crates__anyhow-1.0.102//:anyhow\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"anyhow\",\n actual = \"@rust_crates__anyhow-1.0.102//:anyhow\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"bitfield-0.14.0\",\n actual = \"@rust_crates__bitfield-0.14.0//:bitfield\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"bitfield\",\n actual = \"@rust_crates__bitfield-0.14.0//:bitfield\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"bitfield-struct-0.11.0\",\n actual = \"@rust_crates__bitfield-struct-0.11.0//:bitfield_struct\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"bitfield-struct\",\n actual = \"@rust_crates__bitfield-struct-0.11.0//:bitfield_struct\",\n tags = [\"manual\"],\n)\n\nalias(\n name = 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[\"manual\"],\n)\n", + "BUILD.bazel": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\npackage(default_visibility = [\"//visibility:public\"])\n\nexports_files(\n [\n \"cargo-bazel.json\",\n \"crates.bzl\",\n \"defs.bzl\",\n ] + glob(\n allow_empty = True,\n include = [\"*.bazel\"],\n ),\n)\n\nfilegroup(\n name = \"srcs\",\n srcs = glob(\n allow_empty = True,\n include = [\n \"*.bazel\",\n \"*.bzl\",\n ],\n ),\n)\n\n# Workspace Member Dependencies\nalias(\n name = \"aes-0.8.4\",\n actual = \"@rust_crates__aes-0.8.4//:aes\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"aes\",\n actual = \"@rust_crates__aes-0.8.4//:aes\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"aes-gcm-0.10.3\",\n actual = \"@rust_crates__aes-gcm-0.10.3//:aes_gcm\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"aes-gcm\",\n actual = \"@rust_crates__aes-gcm-0.10.3//:aes_gcm\",\n tags = [\"manual\"],\n)\n\nalias(\n name = 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\"@rust_crates__heapless-0.9.3//:heapless\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hex-0.4.3\",\n actual = \"@rust_crates__hex-0.4.3//:hex\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hex\",\n actual = \"@rust_crates__hex-0.4.3//:hex\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hex-literal-0.4.1\",\n actual = \"@rust_crates__hex-literal-0.4.1//:hex_literal\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hex-literal\",\n actual = \"@rust_crates__hex-literal-0.4.1//:hex_literal\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hmac-0.12.1\",\n actual = \"@rust_crates__hmac-0.12.1//:hmac\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hmac\",\n actual = \"@rust_crates__hmac-0.12.1//:hmac\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"k256-0.13.4\",\n actual = \"@rust_crates__k256-0.13.4//:k256\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"k256\",\n actual = \"@rust_crates__k256-0.13.4//:k256\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"log-0.4.31\",\n actual = \"@rust_crates__log-0.4.31//:log\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"log\",\n actual = \"@rust_crates__log-0.4.31//:log\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"mctp-0.2.0\",\n actual = \"@rust_crates__mctp-0.2.0//:mctp\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"mctp\",\n actual = \"@rust_crates__mctp-0.2.0//:mctp\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"mctp-lib-0.1.0\",\n actual = \"@rust_crates__mctp-lib-0.1.0//:mctp_lib\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"mctp-lib\",\n actual = \"@rust_crates__mctp-lib-0.1.0//:mctp_lib\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"memoffset-0.9.1\",\n actual = \"@rust_crates__memoffset-0.9.1//:memoffset\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"memoffset\",\n actual = \"@rust_crates__memoffset-0.9.1//:memoffset\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"minijinja-2.20.0\",\n actual = \"@rust_crates__minijinja-2.20.0//:minijinja\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"minijinja\",\n actual = \"@rust_crates__minijinja-2.20.0//:minijinja\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"nb-1.1.0\",\n actual = \"@rust_crates__nb-1.1.0//:nb\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"nb\",\n actual = \"@rust_crates__nb-1.1.0//:nb\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"nom-7.1.3\",\n actual = \"@rust_crates__nom-7.1.3//:nom\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"nom\",\n actual = \"@rust_crates__nom-7.1.3//:nom\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"object-0.37.3\",\n actual = \"@rust_crates__object-0.37.3//:object\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"object\",\n actual = \"@rust_crates__object-0.37.3//:object\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"openprot-hal-blocking-0.1.0\",\n actual = \"@rust_crates__openprot-hal-blocking-0.1.0//:openprot_hal_blocking\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"openprot-hal-blocking\",\n actual = \"@rust_crates__openprot-hal-blocking-0.1.0//:openprot_hal_blocking\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"p256-0.13.2\",\n actual = \"@rust_crates__p256-0.13.2//:p256\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"p256\",\n actual = \"@rust_crates__p256-0.13.2//:p256\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"p384-0.13.1\",\n actual = \"@rust_crates__p384-0.13.1//:p384\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"p384\",\n actual = \"@rust_crates__p384-0.13.1//:p384\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"panic-halt-1.0.0\",\n actual = \"@rust_crates__panic-halt-1.0.0//:panic_halt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"panic-halt\",\n actual = \"@rust_crates__panic-halt-1.0.0//:panic_halt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"paste-1.0.15\",\n actual = \"@rust_crates__paste-1.0.15//:paste\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"paste\",\n actual = \"@rust_crates__paste-1.0.15//:paste\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"proc-macro2-1.0.106\",\n actual = \"@rust_crates__proc-macro2-1.0.106//:proc_macro2\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"proc-macro2\",\n actual = \"@rust_crates__proc-macro2-1.0.106//:proc_macro2\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"prost-0.13.5\",\n actual = \"@rust_crates__prost-0.13.5//:prost\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"prost\",\n actual = \"@rust_crates__prost-0.13.5//:prost\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"quote-1.0.45\",\n actual = \"@rust_crates__quote-1.0.45//:quote\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"quote\",\n actual = \"@rust_crates__quote-1.0.45//:quote\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"rand_core-0.9.5\",\n actual = \"@rust_crates__rand_core-0.9.5//:rand_core\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"rand_core\",\n actual = \"@rust_crates__rand_core-0.9.5//:rand_core\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-0.12.1\",\n actual = \"@rust_crates__riscv-0.12.1//:riscv\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv\",\n actual = \"@rust_crates__riscv-0.12.1//:riscv\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-rt-0.12.2\",\n actual = \"@rust_crates__riscv-rt-0.12.2//:riscv_rt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-rt\",\n actual = \"@rust_crates__riscv-rt-0.12.2//:riscv_rt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-semihosting-0.1.3\",\n actual = \"@rust_crates__riscv-semihosting-0.1.3//:riscv_semihosting\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-semihosting\",\n actual = \"@rust_crates__riscv-semihosting-0.1.3//:riscv_semihosting\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"rustc-demangle-0.1.27\",\n actual = \"@rust_crates__rustc-demangle-0.1.27//:rustc_demangle\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"rustc-demangle\",\n actual = \"@rust_crates__rustc-demangle-0.1.27//:rustc_demangle\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"sec1-0.7.3\",\n actual = \"@rust_crates__sec1-0.7.3//:sec1\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"sec1\",\n actual = \"@rust_crates__sec1-0.7.3//:sec1\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde-1.0.228\",\n actual = \"@rust_crates__serde-1.0.228//:serde\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde\",\n actual = \"@rust_crates__serde-1.0.228//:serde\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde_derive-1.0.228\",\n actual = \"@rust_crates__serde_derive-1.0.228//:serde_derive\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde_derive\",\n actual = \"@rust_crates__serde_derive-1.0.228//:serde_derive\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde_json5-0.2.1\",\n actual = \"@rust_crates__serde_json5-0.2.1//:serde_json5\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde_json5\",\n actual = \"@rust_crates__serde_json5-0.2.1//:serde_json5\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"sha2-0.10.9\",\n actual = \"@rust_crates__sha2-0.10.9//:sha2\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"sha2\",\n actual = \"@rust_crates__sha2-0.10.9//:sha2\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"sha3-0.10.9\",\n actual = \"@rust_crates__sha3-0.10.9//:sha3\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"sha3\",\n actual = \"@rust_crates__sha3-0.10.9//:sha3\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"smlang-0.8.0\",\n actual = \"@rust_crates__smlang-0.8.0//:smlang\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"smlang\",\n actual = \"@rust_crates__smlang-0.8.0//:smlang\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"spdm-lib-0.1.0\",\n actual = \"@rust_crates__spdm-lib-0.1.0//:spdm_lib\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"spdm-lib\",\n actual = \"@rust_crates__spdm-lib-0.1.0//:spdm_lib\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"subtle-2.6.1\",\n actual = \"@rust_crates__subtle-2.6.1//:subtle\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"subtle\",\n actual = \"@rust_crates__subtle-2.6.1//:subtle\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"syn-1.0.109\",\n actual = \"@rust_crates__syn-1.0.109//:syn\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"syn1-1.0.109\",\n actual = \"@rust_crates__syn-1.0.109//:syn\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"syn1\",\n actual = \"@rust_crates__syn-1.0.109//:syn\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"syn-2.0.117\",\n actual = \"@rust_crates__syn-2.0.117//:syn\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"syn\",\n actual = \"@rust_crates__syn-2.0.117//:syn\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"thiserror-2.0.18\",\n actual = \"@rust_crates__thiserror-2.0.18//:thiserror\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"thiserror\",\n actual = \"@rust_crates__thiserror-2.0.18//:thiserror\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tock-registers-0.9.0\",\n actual = \"@rust_crates__tock-registers-0.9.0//:tock_registers\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tock-registers\",\n actual = \"@rust_crates__tock-registers-0.9.0//:tock_registers\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tokio-1.52.3\",\n actual = \"@rust_crates__tokio-1.52.3//:tokio\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tokio\",\n actual = \"@rust_crates__tokio-1.52.3//:tokio\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tokio-util-0.7.18\",\n actual = \"@rust_crates__tokio-util-0.7.18//:tokio_util\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tokio-util\",\n actual = \"@rust_crates__tokio-util-0.7.18//:tokio_util\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"vcell-0.1.3\",\n actual = \"@rust_crates__vcell-0.1.3//:vcell\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"vcell\",\n actual = \"@rust_crates__vcell-0.1.3//:vcell\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zerocopy-0.8.50\",\n actual = \"@rust_crates__zerocopy-0.8.50//:zerocopy\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zerocopy\",\n actual = \"@rust_crates__zerocopy-0.8.50//:zerocopy\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zeroize-1.8.2\",\n actual = \"@rust_crates__zeroize-1.8.2//:zeroize\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zeroize\",\n actual = \"@rust_crates__zeroize-1.8.2//:zeroize\",\n tags = [\"manual\"],\n)\n", "alias_rules.bzl": "\"\"\"Alias that transitions its target to `compilation_mode=opt`. Use `transition_alias=\"opt\"` to enable.\"\"\"\n\nload(\"@rules_cc//cc:defs.bzl\", \"CcInfo\")\nload(\"@rules_rust//rust:rust_common.bzl\", \"COMMON_PROVIDERS\")\n\ndef _transition_alias_impl(ctx):\n # `ctx.attr.actual` is a list of 1 item due to the transition\n providers = [ctx.attr.actual[0][provider] for provider in COMMON_PROVIDERS]\n if CcInfo in ctx.attr.actual[0]:\n providers.append(ctx.attr.actual[0][CcInfo])\n return providers\n\ndef _change_compilation_mode(compilation_mode):\n def _change_compilation_mode_impl(_settings, _attr):\n return {\n \"//command_line_option:compilation_mode\": compilation_mode,\n }\n\n return transition(\n implementation = _change_compilation_mode_impl,\n inputs = [],\n outputs = [\n \"//command_line_option:compilation_mode\",\n ],\n )\n\ndef _transition_alias_rule(compilation_mode):\n return rule(\n implementation = _transition_alias_impl,\n provides = COMMON_PROVIDERS,\n attrs = {\n \"actual\": attr.label(\n mandatory = True,\n doc = \"`rust_library()` target to transition to `compilation_mode=opt`.\",\n providers = COMMON_PROVIDERS,\n cfg = _change_compilation_mode(compilation_mode),\n ),\n \"_allowlist_function_transition\": attr.label(\n default = \"@bazel_tools//tools/allowlists/function_transition_allowlist\",\n ),\n },\n doc = \"Transitions a Rust library crate to the `compilation_mode=opt`.\",\n )\n\ntransition_alias_dbg = _transition_alias_rule(\"dbg\")\ntransition_alias_fastbuild = _transition_alias_rule(\"fastbuild\")\ntransition_alias_opt = _transition_alias_rule(\"opt\")\n", - "defs.bzl": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\"\"\"\n# `crates_repository` API\n\n- [aliases](#aliases)\n- [crate_deps](#crate_deps)\n- [all_crate_deps](#all_crate_deps)\n- [crate_repositories](#crate_repositories)\n\n\"\"\"\n\nload(\"@bazel_tools//tools/build_defs/repo:git.bzl\", \"git_repository\")\nload(\"@bazel_tools//tools/build_defs/repo:http.bzl\", \"http_archive\")\nload(\"@bazel_tools//tools/build_defs/repo:utils.bzl\", \"maybe\")\nload(\"@bazel_skylib//lib:selects.bzl\", \"selects\")\nload(\"@rules_rust//crate_universe/private:local_crate_mirror.bzl\", \"local_crate_mirror\")\n\n###############################################################################\n# MACROS API\n###############################################################################\n\n# An identifier that represent common dependencies (unconditional).\n_COMMON_CONDITION = \"\"\n\ndef _flatten_dependency_maps(all_dependency_maps):\n \"\"\"Flatten a list of dependency maps into one dictionary.\n\n Dependency maps have the following structure:\n\n ```python\n DEPENDENCIES_MAP = {\n # The first key in the map is a Bazel package\n # name of the workspace this file is defined in.\n \"workspace_member_package\": {\n\n # Not all dependencies are supported for all platforms.\n # the condition key is the condition required to be true\n # on the host platform.\n \"condition\": {\n\n # An alias to a crate target. # The label of the crate target the\n # Aliases are only crate names. # package name refers to.\n \"package_name\": \"@full//:label\",\n }\n }\n }\n ```\n\n Args:\n all_dependency_maps (list): A list of dicts as described above\n\n Returns:\n dict: A dictionary as described above\n \"\"\"\n dependencies = {}\n\n for workspace_deps_map in all_dependency_maps:\n for pkg_name, conditional_deps_map in workspace_deps_map.items():\n if pkg_name not in dependencies:\n non_frozen_map = dict()\n for key, values in conditional_deps_map.items():\n non_frozen_map.update({key: dict(values.items())})\n dependencies.setdefault(pkg_name, non_frozen_map)\n continue\n\n for condition, deps_map in conditional_deps_map.items():\n # If the condition has not been recorded, do so and continue\n if condition not in dependencies[pkg_name]:\n dependencies[pkg_name].setdefault(condition, dict(deps_map.items()))\n continue\n\n # Alert on any miss-matched dependencies\n inconsistent_entries = []\n for crate_name, crate_label in deps_map.items():\n existing = dependencies[pkg_name][condition].get(crate_name)\n if existing and existing != crate_label:\n inconsistent_entries.append((crate_name, existing, crate_label))\n dependencies[pkg_name][condition].update({crate_name: crate_label})\n\n return dependencies\n\ndef crate_deps(deps, package_name = None):\n \"\"\"Finds the fully qualified label of the requested crates for the package where this macro is called.\n\n Args:\n deps (list): The desired list of crate targets.\n package_name (str, optional): The package name of the set of dependencies to look up.\n Defaults to `native.package_name()`.\n\n Returns:\n list: A list of labels to generated rust targets (str)\n \"\"\"\n\n if not deps:\n return []\n\n if package_name == None:\n package_name = native.package_name()\n\n # Join both sets of dependencies\n dependencies = _flatten_dependency_maps([\n _NORMAL_DEPENDENCIES,\n _NORMAL_DEV_DEPENDENCIES,\n _PROC_MACRO_DEPENDENCIES,\n _PROC_MACRO_DEV_DEPENDENCIES,\n _BUILD_DEPENDENCIES,\n _BUILD_PROC_MACRO_DEPENDENCIES,\n ]).pop(package_name, {})\n\n # Combine all conditional packages so we can easily index over a flat list\n # TODO: Perhaps this should actually return select statements and maintain\n # the conditionals of the dependencies\n flat_deps = {}\n for deps_set in dependencies.values():\n for crate_name, crate_label in deps_set.items():\n flat_deps.update({crate_name: crate_label})\n\n missing_crates = []\n crate_targets = []\n for crate_target in deps:\n if crate_target not in flat_deps:\n missing_crates.append(crate_target)\n else:\n crate_targets.append(flat_deps[crate_target])\n\n if missing_crates:\n fail(\"Could not find crates `{}` among dependencies of `{}`. Available dependencies were `{}`\".format(\n missing_crates,\n package_name,\n dependencies,\n ))\n\n return crate_targets\n\ndef all_crate_deps(\n normal = False, \n normal_dev = False, \n proc_macro = False, \n proc_macro_dev = False,\n build = False,\n build_proc_macro = False,\n package_name = None):\n \"\"\"Finds the fully qualified label of all requested direct crate dependencies \\\n for the package where this macro is called.\n\n If no parameters are set, all normal dependencies are returned. Setting any one flag will\n otherwise impact the contents of the returned list.\n\n Args:\n normal (bool, optional): If True, normal dependencies are included in the\n output list.\n normal_dev (bool, optional): If True, normal dev dependencies will be\n included in the output list.\n proc_macro (bool, optional): If True, proc_macro dependencies are included\n in the output list.\n proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are\n included in the output list.\n build (bool, optional): If True, build dependencies are included\n in the output list.\n build_proc_macro (bool, optional): If True, build proc_macro dependencies are\n included in the output list.\n package_name (str, optional): The package name of the set of dependencies to look up.\n Defaults to `native.package_name()` when unset.\n\n Returns:\n list: A list of labels to generated rust targets (str)\n \"\"\"\n\n if package_name == None:\n package_name = native.package_name()\n\n # Determine the relevant maps to use\n all_dependency_maps = []\n if normal:\n all_dependency_maps.append(_NORMAL_DEPENDENCIES)\n if normal_dev:\n all_dependency_maps.append(_NORMAL_DEV_DEPENDENCIES)\n if proc_macro:\n all_dependency_maps.append(_PROC_MACRO_DEPENDENCIES)\n if proc_macro_dev:\n all_dependency_maps.append(_PROC_MACRO_DEV_DEPENDENCIES)\n if build:\n all_dependency_maps.append(_BUILD_DEPENDENCIES)\n if build_proc_macro:\n all_dependency_maps.append(_BUILD_PROC_MACRO_DEPENDENCIES)\n\n # Default to always using normal dependencies\n if not all_dependency_maps:\n all_dependency_maps.append(_NORMAL_DEPENDENCIES)\n\n dependencies = _flatten_dependency_maps(all_dependency_maps).pop(package_name, None)\n\n if not dependencies:\n if dependencies == None:\n fail(\"Tried to get all_crate_deps for package \" + package_name + \" but that package had no Cargo.toml file\")\n else:\n return []\n\n crate_deps = list(dependencies.pop(_COMMON_CONDITION, {}).values())\n for condition, deps in dependencies.items():\n crate_deps += selects.with_or({\n tuple(_CONDITIONS[condition]): deps.values(),\n \"//conditions:default\": [],\n })\n\n return crate_deps\n\ndef aliases(\n normal = False,\n normal_dev = False,\n proc_macro = False,\n proc_macro_dev = False,\n build = False,\n build_proc_macro = False,\n package_name = None):\n \"\"\"Produces a map of Crate alias names to their original label\n\n If no dependency kinds are specified, `normal` and `proc_macro` are used by default.\n Setting any one flag will otherwise determine the contents of the returned dict.\n\n Args:\n normal (bool, optional): If True, normal dependencies are included in the\n output list.\n normal_dev (bool, optional): If True, normal dev dependencies will be\n included in the output list..\n proc_macro (bool, optional): If True, proc_macro dependencies are included\n in the output list.\n proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are\n included in the output list.\n build (bool, optional): If True, build dependencies are included\n in the output list.\n build_proc_macro (bool, optional): If True, build proc_macro dependencies are\n included in the output list.\n package_name (str, optional): The package name of the set of dependencies to look up.\n Defaults to `native.package_name()` when unset.\n\n Returns:\n dict: The aliases of all associated packages\n \"\"\"\n if package_name == None:\n package_name = native.package_name()\n\n # Determine the relevant maps to use\n all_aliases_maps = []\n if normal:\n all_aliases_maps.append(_NORMAL_ALIASES)\n if normal_dev:\n all_aliases_maps.append(_NORMAL_DEV_ALIASES)\n if proc_macro:\n all_aliases_maps.append(_PROC_MACRO_ALIASES)\n if proc_macro_dev:\n all_aliases_maps.append(_PROC_MACRO_DEV_ALIASES)\n if build:\n all_aliases_maps.append(_BUILD_ALIASES)\n if build_proc_macro:\n all_aliases_maps.append(_BUILD_PROC_MACRO_ALIASES)\n\n # Default to always using normal aliases\n if not all_aliases_maps:\n all_aliases_maps.append(_NORMAL_ALIASES)\n all_aliases_maps.append(_PROC_MACRO_ALIASES)\n\n aliases = _flatten_dependency_maps(all_aliases_maps).pop(package_name, None)\n\n if not aliases:\n return dict()\n\n common_items = aliases.pop(_COMMON_CONDITION, {}).items()\n\n # If there are only common items in the dictionary, immediately return them\n if not len(aliases.keys()) == 1:\n return dict(common_items)\n\n # Build a single select statement where each conditional has accounted for the\n # common set of aliases.\n crate_aliases = {\"//conditions:default\": dict(common_items)}\n for condition, deps in aliases.items():\n condition_triples = _CONDITIONS[condition]\n for triple in condition_triples:\n if triple in crate_aliases:\n crate_aliases[triple].update(deps)\n else:\n crate_aliases.update({triple: dict(deps.items() + common_items)})\n\n return select(crate_aliases)\n\n###############################################################################\n# WORKSPACE MEMBER DEPS AND ALIASES\n###############################################################################\n\n_NORMAL_DEPENDENCIES = {\n \"third_party/crates_io\": {\n _COMMON_CONDITION: {\n \"aes\": Label(\"@rust_crates//:aes-0.8.4\"),\n \"aes-gcm\": Label(\"@rust_crates//:aes-gcm-0.10.3\"),\n \"aligned\": Label(\"@rust_crates//:aligned-0.4.3\"),\n \"anyhow\": Label(\"@rust_crates//:anyhow-1.0.102\"),\n \"bitfield\": Label(\"@rust_crates//:bitfield-0.14.0\"),\n \"bitflags\": Label(\"@rust_crates//:bitflags-2.12.1\"),\n \"byteorder\": Label(\"@rust_crates//:byteorder-1.5.0\"),\n \"cfg-if\": Label(\"@rust_crates//:cfg-if-1.0.4\"),\n \"cipher\": Label(\"@rust_crates//:cipher-0.4.4\"),\n \"clap\": Label(\"@rust_crates//:clap-4.6.1\"),\n \"compiler_builtins\": Label(\"@rust_crates//:compiler_builtins-0.1.160\"),\n \"cortex-m\": Label(\"@rust_crates//:cortex-m-0.7.7\"),\n \"cortex-m-rt\": Label(\"@rust_crates//:cortex-m-rt-0.7.5\"),\n \"cortex-m-semihosting\": Label(\"@rust_crates//:cortex-m-semihosting-0.5.0\"),\n \"ctr\": Label(\"@rust_crates//:ctr-0.9.2\"),\n \"ecdsa\": Label(\"@rust_crates//:ecdsa-0.16.9\"),\n \"embedded-hal\": Label(\"@rust_crates//:embedded-hal-1.0.0\"),\n \"embedded-hal-async\": Label(\"@rust_crates//:embedded-hal-async-1.0.0\"),\n \"embedded-hal-nb\": Label(\"@rust_crates//:embedded-hal-nb-1.0.0\"),\n \"embedded-io\": Label(\"@rust_crates//:embedded-io-0.6.1\"),\n \"embedded-storage\": Label(\"@rust_crates//:embedded-storage-0.3.1\"),\n \"fugit\": Label(\"@rust_crates//:fugit-0.3.9\"),\n \"futures\": Label(\"@rust_crates//:futures-0.3.32\"),\n \"heapless\": Label(\"@rust_crates//:heapless-0.9.3\"),\n \"hex\": Label(\"@rust_crates//:hex-0.4.3\"),\n \"hex-literal\": Label(\"@rust_crates//:hex-literal-0.4.1\"),\n \"hmac\": Label(\"@rust_crates//:hmac-0.12.1\"),\n \"k256\": Label(\"@rust_crates//:k256-0.13.4\"),\n \"log\": Label(\"@rust_crates//:log-0.4.31\"),\n \"mctp\": Label(\"@rust_crates//:mctp-0.2.0\"),\n \"mctp-lib\": Label(\"@rust_crates//:mctp-lib-0.1.0\"),\n \"memoffset\": Label(\"@rust_crates//:memoffset-0.9.1\"),\n \"minijinja\": Label(\"@rust_crates//:minijinja-2.20.0\"),\n \"nb\": Label(\"@rust_crates//:nb-1.1.0\"),\n \"nom\": Label(\"@rust_crates//:nom-7.1.3\"),\n \"object\": Label(\"@rust_crates//:object-0.37.3\"),\n \"openprot-hal-blocking\": Label(\"@rust_crates//:openprot-hal-blocking-0.1.0\"),\n \"p256\": Label(\"@rust_crates//:p256-0.13.2\"),\n \"p384\": Label(\"@rust_crates//:p384-0.13.1\"),\n \"panic-halt\": Label(\"@rust_crates//:panic-halt-1.0.0\"),\n \"proc-macro2\": Label(\"@rust_crates//:proc-macro2-1.0.106\"),\n \"prost\": Label(\"@rust_crates//:prost-0.13.5\"),\n \"quote\": Label(\"@rust_crates//:quote-1.0.45\"),\n \"rand_core\": Label(\"@rust_crates//:rand_core-0.9.5\"),\n \"riscv\": Label(\"@rust_crates//:riscv-0.12.1\"),\n \"riscv-rt\": Label(\"@rust_crates//:riscv-rt-0.12.2\"),\n \"riscv-semihosting\": Label(\"@rust_crates//:riscv-semihosting-0.1.3\"),\n \"rustc-demangle\": Label(\"@rust_crates//:rustc-demangle-0.1.27\"),\n \"sec1\": Label(\"@rust_crates//:sec1-0.7.3\"),\n \"serde\": Label(\"@rust_crates//:serde-1.0.228\"),\n \"serde_json5\": Label(\"@rust_crates//:serde_json5-0.2.1\"),\n \"sha2\": Label(\"@rust_crates//:sha2-0.10.9\"),\n \"sha3\": Label(\"@rust_crates//:sha3-0.10.9\"),\n \"smlang\": Label(\"@rust_crates//:smlang-0.8.0\"),\n \"spdm-lib\": Label(\"@rust_crates//:spdm-lib-0.1.0\"),\n \"subtle\": Label(\"@rust_crates//:subtle-2.6.1\"),\n \"syn1\": Label(\"@rust_crates//:syn-1.0.109\"),\n \"syn\": Label(\"@rust_crates//:syn-2.0.117\"),\n \"thiserror\": Label(\"@rust_crates//:thiserror-2.0.18\"),\n \"tock-registers\": Label(\"@rust_crates//:tock-registers-0.9.0\"),\n \"tokio\": Label(\"@rust_crates//:tokio-1.52.3\"),\n \"tokio-util\": Label(\"@rust_crates//:tokio-util-0.7.18\"),\n \"vcell\": Label(\"@rust_crates//:vcell-0.1.3\"),\n \"zerocopy\": Label(\"@rust_crates//:zerocopy-0.8.50\"),\n \"zeroize\": Label(\"@rust_crates//:zeroize-1.8.2\"),\n },\n },\n}\n\n\n_NORMAL_ALIASES = {\n \"third_party/crates_io\": {\n _COMMON_CONDITION: {\n Label(\"@rust_crates//:syn-1.0.109\"): \"syn1\",\n },\n },\n}\n\n\n_NORMAL_DEV_DEPENDENCIES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_NORMAL_DEV_ALIASES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_PROC_MACRO_DEPENDENCIES = {\n \"third_party/crates_io\": {\n _COMMON_CONDITION: {\n \"bitfield-struct\": Label(\"@rust_crates//:bitfield-struct-0.11.0\"),\n \"paste\": Label(\"@rust_crates//:paste-1.0.15\"),\n \"serde_derive\": Label(\"@rust_crates//:serde_derive-1.0.228\"),\n },\n },\n}\n\n\n_PROC_MACRO_ALIASES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_PROC_MACRO_DEV_DEPENDENCIES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_PROC_MACRO_DEV_ALIASES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_BUILD_DEPENDENCIES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_BUILD_ALIASES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_BUILD_PROC_MACRO_DEPENDENCIES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_BUILD_PROC_MACRO_ALIASES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_CONDITIONS = {\n \"aarch64-apple-darwin\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n \"aarch64-linux-android\": [],\n \"aarch64-unknown-linux-gnu\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n \"cfg(all(any(target_os = \\\"linux\\\", target_os = \\\"android\\\"), any(rustix_use_libc, miri, not(all(target_os = \\\"linux\\\", any(target_endian = \\\"little\\\", any(target_arch = \\\"s390x\\\", target_arch = \\\"powerpc\\\")), any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc\\\"), all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"s390x\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\")))))))\": [],\n \"cfg(all(not(rustix_use_libc), not(miri), target_os = \\\"linux\\\", any(target_endian = \\\"little\\\", any(target_arch = \\\"s390x\\\", target_arch = \\\"powerpc\\\")), any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc\\\"), all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"s390x\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\"))))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \\\"linux\\\", any(target_endian = \\\"little\\\", any(target_arch = \\\"s390x\\\", target_arch = \\\"powerpc\\\")), any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc\\\"), all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"s390x\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\")))))))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\",\"@rules_rust//rust/platform:thumbv7em-none-eabi\",\"@rules_rust//rust/platform:x86_64-apple-darwin\"],\n \"cfg(all(target_arch = \\\"aarch64\\\", target_os = \\\"linux\\\"))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n \"cfg(all(target_arch = \\\"aarch64\\\", target_vendor = \\\"apple\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n \"cfg(all(target_arch = \\\"loongarch64\\\", target_os = \\\"linux\\\"))\": [],\n \"cfg(any())\": [],\n \"cfg(any(target_arch = \\\"aarch64\\\", target_arch = \\\"x86_64\\\", target_arch = \\\"x86\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(any(target_arch = \\\"arm\\\", target_pointer_width = \\\"32\\\", target_pointer_width = \\\"64\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\",\"@rules_rust//rust/platform:thumbv7em-none-eabi\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(any(unix, target_os = \\\"hermit\\\", target_os = \\\"wasi\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(any(unix, target_os = \\\"wasi\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(target_arch = \\\"aarch64\\\")\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n \"cfg(target_os = \\\"hermit\\\")\": [],\n \"cfg(target_os = \\\"redox\\\")\": [],\n \"cfg(target_os = \\\"wasi\\\")\": [],\n \"cfg(unix)\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(windows)\": [],\n \"riscv32imc-unknown-none-elf\": [\"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\"],\n \"thumbv7em-none-eabi\": [\"@rules_rust//rust/platform:thumbv7em-none-eabi\"],\n \"x86_64-apple-darwin\": [\"@rules_rust//rust/platform:x86_64-apple-darwin\"],\n \"x86_64-unknown-linux-gnu\": [\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n}\n\n###############################################################################\n\ndef crate_repositories():\n \"\"\"A macro for defining repositories for all generated crates.\n\n Returns:\n A list of repos visible to the module through the module extension.\n \"\"\"\n maybe(\n http_archive,\n name = \"rust_crates__adler2-2.0.1\",\n sha256 = \"320119579fcad9c21884f5c4861d16174d0e06250625266f50fe6898340abefa\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/adler2/2.0.1/download\"],\n strip_prefix = \"adler2-2.0.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.adler2-2.0.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__aead-0.5.2\",\n sha256 = \"d122413f284cf2d62fb1b7db97e02edb8cda96d769b16e443a4f6195e35662b0\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/aead/0.5.2/download\"],\n strip_prefix = \"aead-0.5.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.aead-0.5.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__aes-0.8.4\",\n sha256 = \"b169f7a6d4742236a0a00c541b845991d0ac43e546831af1249753ab4c3aa3a0\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/aes/0.8.4/download\"],\n strip_prefix = \"aes-0.8.4\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.aes-0.8.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__aes-gcm-0.10.3\",\n sha256 = \"831010a0f742e1209b3bcea8fab6a8e149051ba6099432c8cb2cc117dec3ead1\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/aes-gcm/0.10.3/download\"],\n strip_prefix = \"aes-gcm-0.10.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.aes-gcm-0.10.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__aligned-0.4.3\",\n sha256 = \"ee4508988c62edf04abd8d92897fca0c2995d907ce1dfeaf369dac3716a40685\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/aligned/0.4.3/download\"],\n strip_prefix = \"aligned-0.4.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.aligned-0.4.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__anstream-1.0.0\",\n sha256 = \"824a212faf96e9acacdbd09febd34438f8f711fb84e09a8916013cd7815ca28d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstream/1.0.0/download\"],\n strip_prefix = \"anstream-1.0.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.anstream-1.0.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__anstyle-1.0.14\",\n sha256 = \"940b3a0ca603d1eade50a4846a2afffd5ef57a9feac2c0e2ec2e14f9ead76000\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle/1.0.14/download\"],\n strip_prefix = \"anstyle-1.0.14\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.anstyle-1.0.14.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__anstyle-parse-1.0.0\",\n sha256 = \"52ce7f38b242319f7cabaa6813055467063ecdc9d355bbb4ce0c68908cd8130e\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle-parse/1.0.0/download\"],\n strip_prefix = \"anstyle-parse-1.0.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.anstyle-parse-1.0.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__anstyle-query-1.1.5\",\n sha256 = \"40c48f72fd53cd289104fc64099abca73db4166ad86ea0b4341abe65af83dadc\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle-query/1.1.5/download\"],\n strip_prefix = \"anstyle-query-1.1.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.anstyle-query-1.1.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__anstyle-wincon-3.0.11\",\n sha256 = \"291e6a250ff86cd4a820112fb8898808a366d8f9f58ce16d1f538353ad55747d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle-wincon/3.0.11/download\"],\n strip_prefix = \"anstyle-wincon-3.0.11\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.anstyle-wincon-3.0.11.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__anyhow-1.0.102\",\n sha256 = \"7f202df86484c868dbad7eaa557ef785d5c66295e41b460ef922eca0723b842c\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anyhow/1.0.102/download\"],\n strip_prefix = \"anyhow-1.0.102\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.anyhow-1.0.102.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__as-slice-0.2.1\",\n sha256 = \"516b6b4f0e40d50dcda9365d53964ec74560ad4284da2e7fc97122cd83174516\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/as-slice/0.2.1/download\"],\n strip_prefix = \"as-slice-0.2.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.as-slice-0.2.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__autocfg-1.5.1\",\n sha256 = \"f2032f911046de80f0a198e0901378627c33f59ea0ac00e363d481118bd70a53\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/autocfg/1.5.1/download\"],\n strip_prefix = \"autocfg-1.5.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.autocfg-1.5.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__bare-metal-0.2.5\",\n sha256 = \"5deb64efa5bd81e31fcd1938615a6d98c82eafcbcd787162b6f63b91d6bac5b3\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bare-metal/0.2.5/download\"],\n strip_prefix = \"bare-metal-0.2.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.bare-metal-0.2.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__base16ct-0.2.0\",\n sha256 = \"4c7f02d4ea65f2c1853089ffd8d2787bdbc63de2f0d29dedbcf8ccdfa0ccd4cf\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/base16ct/0.2.0/download\"],\n strip_prefix = \"base16ct-0.2.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.base16ct-0.2.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__bitfield-0.13.2\",\n sha256 = \"46afbd2983a5d5a7bd740ccb198caf5b82f45c40c09c0eed36052d91cb92e719\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bitfield/0.13.2/download\"],\n strip_prefix = \"bitfield-0.13.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.bitfield-0.13.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__bitfield-0.14.0\",\n sha256 = \"2d7e60934ceec538daadb9d8432424ed043a904d8e0243f3c6446bce549a46ac\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bitfield/0.14.0/download\"],\n strip_prefix = \"bitfield-0.14.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.bitfield-0.14.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__bitfield-struct-0.11.0\",\n sha256 = \"d3ca019570363e800b05ad4fd890734f28ac7b72f563ad8a35079efb793616f8\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bitfield-struct/0.11.0/download\"],\n strip_prefix = \"bitfield-struct-0.11.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.bitfield-struct-0.11.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__bitflags-2.12.1\",\n sha256 = \"84d7ced0ae9557296835c32bf1b1e02b44c746701f898460fb000d7eaa84f00a\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bitflags/2.12.1/download\"],\n strip_prefix = \"bitflags-2.12.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.bitflags-2.12.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__block-buffer-0.10.4\",\n sha256 = \"3078c7629b62d3f0439517fa394996acacc5cbc91c5a20d8c658e77abd503a71\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/block-buffer/0.10.4/download\"],\n strip_prefix = \"block-buffer-0.10.4\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.block-buffer-0.10.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__byteorder-1.5.0\",\n sha256 = \"1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/byteorder/1.5.0/download\"],\n strip_prefix = \"byteorder-1.5.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.byteorder-1.5.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__bytes-1.11.1\",\n sha256 = \"1e748733b7cbc798e1434b6ac524f0c1ff2ab456fe201501e6497c8417a4fc33\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bytes/1.11.1/download\"],\n strip_prefix = \"bytes-1.11.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.bytes-1.11.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cfg-if-1.0.4\",\n sha256 = \"9330f8b2ff13f34540b44e946ef35111825727b38d33286ef986142615121801\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cfg-if/1.0.4/download\"],\n strip_prefix = \"cfg-if-1.0.4\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cfg-if-1.0.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cipher-0.4.4\",\n sha256 = \"773f3b9af64447d2ce9850330c473515014aa235e6a783b02db81ff39e4a3dad\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cipher/0.4.4/download\"],\n strip_prefix = \"cipher-0.4.4\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cipher-0.4.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__clap-4.6.1\",\n sha256 = \"1ddb117e43bbf7dacf0a4190fef4d345b9bad68dfc649cb349e7d17d28428e51\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/clap/4.6.1/download\"],\n strip_prefix = \"clap-4.6.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.clap-4.6.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__clap_builder-4.6.0\",\n sha256 = \"714a53001bf66416adb0e2ef5ac857140e7dc3a0c48fb28b2f10762fc4b5069f\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/clap_builder/4.6.0/download\"],\n strip_prefix = \"clap_builder-4.6.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.clap_builder-4.6.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__clap_derive-4.6.1\",\n sha256 = \"f2ce8604710f6733aa641a2b3731eaa1e8b3d9973d5e3565da11800813f997a9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/clap_derive/4.6.1/download\"],\n strip_prefix = \"clap_derive-4.6.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.clap_derive-4.6.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__clap_lex-1.1.0\",\n sha256 = \"c8d4a3bb8b1e0c1050499d1815f5ab16d04f0959b233085fb31653fbfc9d98f9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/clap_lex/1.1.0/download\"],\n strip_prefix = \"clap_lex-1.1.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.clap_lex-1.1.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__colorchoice-1.0.5\",\n sha256 = \"1d07550c9036bf2ae0c684c4297d503f838287c83c53686d05370d0e139ae570\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/colorchoice/1.0.5/download\"],\n strip_prefix = \"colorchoice-1.0.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.colorchoice-1.0.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__compiler_builtins-0.1.160\",\n sha256 = \"6376049cfa92c0aa8b9ac95fae22184b981c658208d4ed8a1dc553cd83612895\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/compiler_builtins/0.1.160/download\"],\n strip_prefix = \"compiler_builtins-0.1.160\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.compiler_builtins-0.1.160.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__const-oid-0.9.6\",\n sha256 = \"c2459377285ad874054d797f3ccebf984978aa39129f6eafde5cdc8315b612f8\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/const-oid/0.9.6/download\"],\n strip_prefix = \"const-oid-0.9.6\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.const-oid-0.9.6.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cortex-m-0.7.7\",\n sha256 = \"8ec610d8f49840a5b376c69663b6369e71f4b34484b9b2eb29fb918d92516cb9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cortex-m/0.7.7/download\"],\n strip_prefix = \"cortex-m-0.7.7\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cortex-m-0.7.7.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cortex-m-rt-0.7.5\",\n sha256 = \"801d4dec46b34c299ccf6b036717ae0fce602faa4f4fe816d9013b9a7c9f5ba6\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cortex-m-rt/0.7.5/download\"],\n strip_prefix = \"cortex-m-rt-0.7.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cortex-m-rt-0.7.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cortex-m-rt-macros-0.7.5\",\n sha256 = \"e37549a379a9e0e6e576fd208ee60394ccb8be963889eebba3ffe0980364f472\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cortex-m-rt-macros/0.7.5/download\"],\n strip_prefix = \"cortex-m-rt-macros-0.7.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cortex-m-rt-macros-0.7.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cortex-m-semihosting-0.5.0\",\n sha256 = \"c23234600452033cc77e4b761e740e02d2c4168e11dbf36ab14a0f58973592b0\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cortex-m-semihosting/0.5.0/download\"],\n strip_prefix = \"cortex-m-semihosting-0.5.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cortex-m-semihosting-0.5.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cpufeatures-0.2.17\",\n sha256 = \"59ed5838eebb26a2bb2e58f6d5b5316989ae9d08bab10e0e6d103e656d1b0280\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cpufeatures/0.2.17/download\"],\n strip_prefix = \"cpufeatures-0.2.17\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cpufeatures-0.2.17.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__crc-3.4.0\",\n sha256 = \"5eb8a2a1cd12ab0d987a5d5e825195d372001a4094a0376319d5a0ad71c1ba0d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/crc/3.4.0/download\"],\n strip_prefix = \"crc-3.4.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.crc-3.4.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__crc-catalog-2.5.0\",\n sha256 = \"217698eaf96b4a3f0bc4f3662aaa55bdf913cd54d7204591faa790070c6d0853\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/crc-catalog/2.5.0/download\"],\n strip_prefix = \"crc-catalog-2.5.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.crc-catalog-2.5.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__crc32fast-1.5.0\",\n sha256 = \"9481c1c90cbf2ac953f07c8d4a58aa3945c425b7185c9154d67a65e4230da511\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/crc32fast/1.5.0/download\"],\n strip_prefix = \"crc32fast-1.5.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.crc32fast-1.5.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__critical-section-1.2.0\",\n sha256 = \"790eea4361631c5e7d22598ecd5723ff611904e3344ce8720784c93e3d83d40b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/critical-section/1.2.0/download\"],\n strip_prefix = \"critical-section-1.2.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.critical-section-1.2.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__crypto-bigint-0.5.5\",\n sha256 = \"0dc92fb57ca44df6db8059111ab3af99a63d5d0f8375d9972e319a379c6bab76\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/crypto-bigint/0.5.5/download\"],\n strip_prefix = \"crypto-bigint-0.5.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.crypto-bigint-0.5.5.bazel\"),\n )\n\n maybe(\n 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Label(\"@rust_crates//rust_crates:BUILD.der-0.7.10.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__digest-0.10.7\",\n sha256 = \"9ed9a281f7bc9b7576e61468ba615a66a5c8cfdff42420a70aa82701a3b1e292\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/digest/0.10.7/download\"],\n strip_prefix = \"digest-0.10.7\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.digest-0.10.7.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__ecdsa-0.16.9\",\n sha256 = \"ee27f32b5c5292967d2d4a9d7f1e0b0aed2c15daded5a60300e4abb9d8020bca\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/ecdsa/0.16.9/download\"],\n strip_prefix = \"ecdsa-0.16.9\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.ecdsa-0.16.9.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__either-1.16.0\",\n sha256 = \"91622ff5e7162018101f2fea40d6ebf4a78bbe5a49736a2020649edf9693679e\",\n type = \"tar.gz\",\n urls = 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maybe(\n http_archive,\n name = \"rust_crates__futures-0.3.32\",\n sha256 = \"8b147ee9d1f6d097cef9ce628cd2ee62288d963e16fb287bd9286455b241382d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/futures/0.3.32/download\"],\n strip_prefix = \"futures-0.3.32\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.futures-0.3.32.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__futures-channel-0.3.32\",\n sha256 = \"07bbe89c50d7a535e539b8c17bc0b49bdb77747034daa8087407d655f3f7cc1d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/futures-channel/0.3.32/download\"],\n strip_prefix = \"futures-channel-0.3.32\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.futures-channel-0.3.32.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__futures-core-0.3.32\",\n sha256 = \"7e3450815272ef58cec6d564423f6e755e25379b217b0bc688e295ba24df6b1d\",\n type = \"tar.gz\",\n urls = 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maybe(\n http_archive,\n name = \"rust_crates__hmac-0.12.1\",\n sha256 = \"6c49c37c09c17a53d937dfbb742eb3a961d65a994e6bcdcf37e7399d0cc8ab5e\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/hmac/0.12.1/download\"],\n strip_prefix = \"hmac-0.12.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.hmac-0.12.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__indexmap-2.14.0\",\n sha256 = \"d466e9454f08e4a911e14806c24e16fba1b4c121d1ea474396f396069cf949d9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/indexmap/2.14.0/download\"],\n strip_prefix = \"indexmap-2.14.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.indexmap-2.14.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__inout-0.1.4\",\n sha256 = \"879f10e63c20629ecabbb64a8010319738c66a5cd0c29b02d63d272b03751d01\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/inout/0.1.4/download\"],\n strip_prefix = \"inout-0.1.4\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.inout-0.1.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__is_terminal_polyfill-1.70.2\",\n sha256 = \"a6cb138bb79a146c1bd460005623e142ef0181e3d0219cb493e02f7d08a35695\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/is_terminal_polyfill/1.70.2/download\"],\n strip_prefix = \"is_terminal_polyfill-1.70.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.is_terminal_polyfill-1.70.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__itertools-0.14.0\",\n sha256 = \"2b192c782037fadd9cfa75548310488aabdbf3d2da73885b31bd0abd03351285\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/itertools/0.14.0/download\"],\n strip_prefix = \"itertools-0.14.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.itertools-0.14.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__k256-0.13.4\",\n sha256 = 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Label(\"@rust_crates//rust_crates:BUILD.mctp-lib-0.1.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__memchr-2.8.1\",\n sha256 = \"6b947ae49db0d222b1dbc6b113ce7248a3fc3a6ca21b696717bfc000ba4484d8\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/memchr/2.8.1/download\"],\n strip_prefix = \"memchr-2.8.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.memchr-2.8.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__memo-map-0.3.3\",\n sha256 = \"38d1115007560874e373613744c6fba374c17688327a71c1476d1a5954cc857b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/memo-map/0.3.3/download\"],\n strip_prefix = \"memo-map-0.3.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.memo-map-0.3.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__memoffset-0.9.1\",\n sha256 = \"488016bfae457b036d996092f6cb448677611ce4449e970ceaf42695203f218a\",\n type = \"tar.gz\",\n urls = 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strip_prefix = \"object-0.37.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.object-0.37.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__once_cell_polyfill-1.70.2\",\n sha256 = \"384b8ab6d37215f3c5301a95a4accb5d64aa607f1fcb26a11b5303878451b4fe\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/once_cell_polyfill/1.70.2/download\"],\n strip_prefix = \"once_cell_polyfill-1.70.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.once_cell_polyfill-1.70.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__opaque-debug-0.3.1\",\n sha256 = \"c08d65885ee38876c4f86fa503fb49d7b507c2b62552df7c70b2fce627e06381\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/opaque-debug/0.3.1/download\"],\n strip_prefix = \"opaque-debug-0.3.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.opaque-debug-0.3.1.bazel\"),\n )\n\n maybe(\n git_repository,\n name = \"rust_crates__openprot-hal-blocking-0.1.0\",\n commit = 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Label(\"@rust_crates//rust_crates:BUILD.rand_core-0.6.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__rand_core-0.9.5\",\n sha256 = \"76afc826de14238e6e8c374ddcc1fa19e374fd8dd986b0d2af0d02377261d83c\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/rand_core/0.9.5/download\"],\n strip_prefix = \"rand_core-0.9.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.rand_core-0.9.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__redox_syscall-0.5.18\",\n sha256 = \"ed2bf2547551a7053d6fdfafda3f938979645c44812fbfcda098faae3f1a362d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/redox_syscall/0.5.18/download\"],\n strip_prefix = \"redox_syscall-0.5.18\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.redox_syscall-0.5.18.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__rfc6979-0.4.0\",\n sha256 = \"f8dd2a808d456c4a54e300a23e9f5a67e122c3024119acbfd73e3bf664491cb2\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/rfc6979/0.4.0/download\"],\n strip_prefix = \"rfc6979-0.4.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.rfc6979-0.4.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__riscv-0.11.1\",\n sha256 = \"2f5c1b8bf41ea746266cdee443d1d1e9125c86ce1447e1a2615abd34330d33a9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/riscv/0.11.1/download\"],\n strip_prefix = \"riscv-0.11.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.riscv-0.11.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__riscv-0.12.1\",\n sha256 = \"5ea8ff73d3720bdd0a97925f0bf79ad2744b6da8ff36be3840c48ac81191d7a7\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/riscv/0.12.1/download\"],\n strip_prefix = \"riscv-0.12.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.riscv-0.12.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__riscv-0.13.0\",\n sha256 = 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Label(\"@rust_crates//rust_crates:BUILD.riscv-macros-0.2.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__riscv-pac-0.2.0\",\n sha256 = \"8188909339ccc0c68cfb5a04648313f09621e8b87dc03095454f1a11f6c5d436\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/riscv-pac/0.2.0/download\"],\n strip_prefix = \"riscv-pac-0.2.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.riscv-pac-0.2.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__riscv-rt-0.12.2\",\n sha256 = \"c0d35e32cf1383183e8885d8a9aa4402a087fd094dc34c2cb6df6687d0229dfe\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/riscv-rt/0.12.2/download\"],\n strip_prefix = \"riscv-rt-0.12.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.riscv-rt-0.12.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__riscv-rt-macros-0.2.2\",\n sha256 = \"30f19a85fe107b65031e0ba8ec60c34c2494069fe910d6c297f5e7cb5a6f76d0\",\n type = \"tar.gz\",\n urls = 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Label(\"@rust_crates//rust_crates:BUILD.smbus-pec-1.0.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__smlang-0.8.0\",\n sha256 = \"1de84f9f80bbe6272174e2bfdb8cf7ce4815b218038a42161c2f21c1d872c215\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/smlang/0.8.0/download\"],\n strip_prefix = \"smlang-0.8.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.smlang-0.8.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__smlang-macros-0.8.0\",\n sha256 = \"231b4425dcc43afc7e18c34e7c6738cd252d42d91d909c948df14107c9ae79f1\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/smlang-macros/0.8.0/download\"],\n strip_prefix = \"smlang-macros-0.8.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.smlang-macros-0.8.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__socket2-0.6.4\",\n sha256 = \"52d1cfed4120b4d927bf7c0f86d2087a4a7d6027c906d9f9d525a80573b9be51\",\n type = \"tar.gz\",\n urls = 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\"183aaf7fa637cc7b5f54c45b8f7cb6e8d73831f9f75a56b6defa5bf8c51d1699\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/string_morph/0.1.0/download\"],\n strip_prefix = \"string_morph-0.1.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.string_morph-0.1.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__strsim-0.11.1\",\n sha256 = \"7da8b5736845d9f2fcb837ea5d9e2628564b3b043a70948a3f0b778838c5fb4f\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/strsim/0.11.1/download\"],\n strip_prefix = \"strsim-0.11.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.strsim-0.11.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__subtle-2.6.1\",\n sha256 = \"13c2bddecc57b384dee18652358fb23172facb8a2c51ccc10d74c157bdea3292\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/subtle/2.6.1/download\"],\n strip_prefix = \"subtle-2.6.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.subtle-2.6.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__syn-1.0.109\",\n sha256 = \"72b64191b275b66ffe2469e8af2c1cfe3bafa67b529ead792a6d0160888b4237\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/syn/1.0.109/download\"],\n strip_prefix = \"syn-1.0.109\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.syn-1.0.109.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__syn-2.0.117\",\n sha256 = \"e665b8803e7b1d2a727f4023456bbbbe74da67099c585258af0ad9c5013b9b99\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/syn/2.0.117/download\"],\n strip_prefix = \"syn-2.0.117\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.syn-2.0.117.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__terminal_size-0.4.4\",\n sha256 = \"230a1b821ccbd75b185820a1f1ff7b14d21da1e442e22c0863ea5f08771a8874\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/terminal_size/0.4.4/download\"],\n strip_prefix = \"terminal_size-0.4.4\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.terminal_size-0.4.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__thiserror-2.0.18\",\n sha256 = \"4288b5bcbc7920c07a1149a35cf9590a2aa808e0bc1eafaade0b80947865fbc4\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/thiserror/2.0.18/download\"],\n strip_prefix = \"thiserror-2.0.18\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.thiserror-2.0.18.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__thiserror-impl-2.0.18\",\n sha256 = \"ebc4ee7f67670e9b64d05fa4253e753e016c6c95ff35b89b7941d6b856dec1d5\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/thiserror-impl/2.0.18/download\"],\n strip_prefix = \"thiserror-impl-2.0.18\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.thiserror-impl-2.0.18.bazel\"),\n )\n\n maybe(\n git_repository,\n name = \"rust_crates__tock-registers-0.9.0\",\n commit = \"9554639b17501a9f5940cef7a1770a0823e790c3\",\n init_submodules = True,\n remote = \"https://github.com/tock/tock.git\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.tock-registers-0.9.0.bazel\"),\n strip_prefix = \"libraries/tock-register-interface\",\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__tokio-1.52.3\",\n sha256 = \"8fc7f01b389ac15039e4dc9531aa973a135d7a4135281b12d7c1bc79fd57fffe\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/tokio/1.52.3/download\"],\n strip_prefix = \"tokio-1.52.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.tokio-1.52.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__tokio-macros-2.7.0\",\n sha256 = \"385a6cb71ab9ab790c5fe8d67f1645e6c450a7ce006a33de03daa956cf70a496\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/tokio-macros/2.7.0/download\"],\n strip_prefix = \"tokio-macros-2.7.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.tokio-macros-2.7.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__tokio-util-0.7.18\",\n sha256 = \"9ae9cec805b01e8fc3fd2fe289f89149a9b66dd16786abd8b19cfa7b48cb0098\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/tokio-util/0.7.18/download\"],\n strip_prefix = \"tokio-util-0.7.18\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.tokio-util-0.7.18.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__twox-hash-2.1.2\",\n sha256 = \"9ea3136b675547379c4bd395ca6b938e5ad3c3d20fad76e7fe85f9e0d011419c\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/twox-hash/2.1.2/download\"],\n strip_prefix = \"twox-hash-2.1.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.twox-hash-2.1.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__typenum-1.20.1\",\n sha256 = \"b6f5e870be6c3b371b77fe0ee0bafb859fa4964b4404c27de1d380043c4dda20\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/typenum/1.20.1/download\"],\n strip_prefix = \"typenum-1.20.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.typenum-1.20.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__ucd-trie-0.1.7\",\n sha256 = \"2896d95c02a80c6d6a5d6e953d479f5ddf2dfdb6a244441010e373ac0fb88971\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/ucd-trie/0.1.7/download\"],\n strip_prefix = \"ucd-trie-0.1.7\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.ucd-trie-0.1.7.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__unicode-ident-1.0.24\",\n sha256 = \"e6e4313cd5fcd3dad5cafa179702e2b244f760991f45397d14d4ebf38247da75\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/unicode-ident/1.0.24/download\"],\n strip_prefix = \"unicode-ident-1.0.24\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.unicode-ident-1.0.24.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__universal-hash-0.5.1\",\n sha256 = \"fc1de2c688dc15305988b563c3854064043356019f97a4b46276fe734c4f07ea\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/universal-hash/0.5.1/download\"],\n strip_prefix = \"universal-hash-0.5.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.universal-hash-0.5.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__utf8parse-0.2.2\",\n sha256 = \"06abde3611657adf66d383f00b093d7faecc7fa57071cce2578660c9f1010821\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/utf8parse/0.2.2/download\"],\n strip_prefix = \"utf8parse-0.2.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.utf8parse-0.2.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__uuid-1.23.2\",\n sha256 = \"d258b83ceec21034727ecee8c382cfa6c3e133699b0742c64571814fb420c9f7\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/uuid/1.23.2/download\"],\n strip_prefix = \"uuid-1.23.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.uuid-1.23.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__vcell-0.1.3\",\n sha256 = \"77439c1b53d2303b20d9459b1ade71a83c716e3f9c34f3228c00e6f185d6c002\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/vcell/0.1.3/download\"],\n strip_prefix = \"vcell-0.1.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.vcell-0.1.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__version_check-0.9.5\",\n sha256 = \"0b928f33d975fc6ad9f86c8f283853ad26bdd5b10b7f1542aa2fa15e2289105a\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/version_check/0.9.5/download\"],\n strip_prefix = \"version_check-0.9.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.version_check-0.9.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__void-1.0.2\",\n sha256 = \"6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/void/1.0.2/download\"],\n strip_prefix = \"void-1.0.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.void-1.0.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__volatile-register-0.2.2\",\n sha256 = \"de437e2a6208b014ab52972a27e59b33fa2920d3e00fe05026167a1c509d19cc\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/volatile-register/0.2.2/download\"],\n strip_prefix = \"volatile-register-0.2.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.volatile-register-0.2.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__wasi-0.11.1-wasi-snapshot-preview1\",\n sha256 = \"ccf3ec651a847eb01de73ccad15eb7d99f80485de043efb2f370cd654f4ea44b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wasi/0.11.1+wasi-snapshot-preview1/download\"],\n strip_prefix = \"wasi-0.11.1+wasi-snapshot-preview1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.wasi-0.11.1+wasi-snapshot-preview1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__windows-link-0.2.1\",\n sha256 = \"f0805222e57f7521d6a62e36fa9163bc891acd422f971defe97d64e70d0a4fe5\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/windows-link/0.2.1/download\"],\n strip_prefix = \"windows-link-0.2.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.windows-link-0.2.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__windows-sys-0.61.2\",\n sha256 = \"ae137229bcbd6cdf0f7b80a31df61766145077ddf49416a728b02cb3921ff3fc\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/windows-sys/0.61.2/download\"],\n strip_prefix = \"windows-sys-0.61.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.windows-sys-0.61.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__zerocopy-0.8.50\",\n sha256 = \"3b065d4f0e55f82fae73202e189638116a87c55ab6b8e6c2721e13dd9d854ad1\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zerocopy/0.8.50/download\"],\n strip_prefix = \"zerocopy-0.8.50\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.zerocopy-0.8.50.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__zerocopy-derive-0.8.50\",\n sha256 = \"0b631b19d36a892ab55420c92dbc83ccd79274f25be714855d3074aa71cab639\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zerocopy-derive/0.8.50/download\"],\n strip_prefix = \"zerocopy-derive-0.8.50\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.zerocopy-derive-0.8.50.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__zeroize-1.8.2\",\n sha256 = \"b97154e67e32c85465826e8bcc1c59429aaaf107c1e4a9e53c8d8ccd5eff88d0\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zeroize/1.8.2/download\"],\n strip_prefix = \"zeroize-1.8.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.zeroize-1.8.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__zeroize_derive-1.4.3\",\n sha256 = \"85a5b4158499876c763cb03bc4e49185d3cccbabb15b33c627f7884f43db852e\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zeroize_derive/1.4.3/download\"],\n strip_prefix = \"zeroize_derive-1.4.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.zeroize_derive-1.4.3.bazel\"),\n )\n\n return [\n struct(repo=\"rust_crates__aes-0.8.4\", is_dev_dep = False),\n struct(repo=\"rust_crates__aes-gcm-0.10.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__aligned-0.4.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__anyhow-1.0.102\", is_dev_dep = False),\n struct(repo=\"rust_crates__bitfield-0.14.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__bitfield-struct-0.11.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__bitflags-2.12.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__byteorder-1.5.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__cfg-if-1.0.4\", is_dev_dep = False),\n struct(repo=\"rust_crates__cipher-0.4.4\", is_dev_dep = False),\n struct(repo=\"rust_crates__clap-4.6.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__compiler_builtins-0.1.160\", is_dev_dep = False),\n struct(repo=\"rust_crates__cortex-m-0.7.7\", is_dev_dep = False),\n struct(repo=\"rust_crates__cortex-m-rt-0.7.5\", is_dev_dep = False),\n struct(repo=\"rust_crates__cortex-m-semihosting-0.5.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__ctr-0.9.2\", is_dev_dep = False),\n struct(repo=\"rust_crates__ecdsa-0.16.9\", is_dev_dep = False),\n struct(repo=\"rust_crates__embedded-hal-1.0.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__embedded-hal-async-1.0.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__embedded-hal-nb-1.0.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__embedded-io-0.6.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__embedded-storage-0.3.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__fugit-0.3.9\", is_dev_dep = False),\n struct(repo=\"rust_crates__futures-0.3.32\", is_dev_dep = False),\n struct(repo=\"rust_crates__heapless-0.9.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__hex-0.4.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__hex-literal-0.4.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__hmac-0.12.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__k256-0.13.4\", is_dev_dep = False),\n struct(repo=\"rust_crates__log-0.4.31\", is_dev_dep = False),\n struct(repo=\"rust_crates__mctp-0.2.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__mctp-lib-0.1.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__memoffset-0.9.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__minijinja-2.20.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__nb-1.1.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__nom-7.1.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__object-0.37.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__openprot-hal-blocking-0.1.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__p256-0.13.2\", is_dev_dep = False),\n struct(repo=\"rust_crates__p384-0.13.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__panic-halt-1.0.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__paste-1.0.15\", is_dev_dep = False),\n struct(repo=\"rust_crates__proc-macro2-1.0.106\", is_dev_dep = False),\n struct(repo=\"rust_crates__prost-0.13.5\", is_dev_dep = False),\n struct(repo=\"rust_crates__quote-1.0.45\", is_dev_dep = False),\n struct(repo=\"rust_crates__rand_core-0.9.5\", is_dev_dep = False),\n struct(repo=\"rust_crates__riscv-0.12.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__riscv-rt-0.12.2\", is_dev_dep = False),\n struct(repo=\"rust_crates__riscv-semihosting-0.1.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__rustc-demangle-0.1.27\", is_dev_dep = False),\n struct(repo=\"rust_crates__sec1-0.7.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__serde-1.0.228\", is_dev_dep = False),\n struct(repo=\"rust_crates__serde_derive-1.0.228\", is_dev_dep = False),\n struct(repo=\"rust_crates__serde_json5-0.2.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__sha2-0.10.9\", is_dev_dep = False),\n struct(repo=\"rust_crates__sha3-0.10.9\", is_dev_dep = False),\n struct(repo=\"rust_crates__smlang-0.8.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__spdm-lib-0.1.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__subtle-2.6.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__syn-1.0.109\", is_dev_dep = False),\n struct(repo=\"rust_crates__syn-2.0.117\", is_dev_dep = False),\n struct(repo=\"rust_crates__thiserror-2.0.18\", is_dev_dep = False),\n struct(repo=\"rust_crates__tock-registers-0.9.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__tokio-1.52.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__tokio-util-0.7.18\", is_dev_dep = False),\n struct(repo=\"rust_crates__vcell-0.1.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__zerocopy-0.8.50\", is_dev_dep = False),\n struct(repo=\"rust_crates__zeroize-1.8.2\", is_dev_dep = False),\n ]\n" + "defs.bzl": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\"\"\"\n# `crates_repository` API\n\n- [aliases](#aliases)\n- [crate_deps](#crate_deps)\n- [all_crate_deps](#all_crate_deps)\n- [crate_repositories](#crate_repositories)\n\n\"\"\"\n\nload(\"@bazel_tools//tools/build_defs/repo:git.bzl\", \"git_repository\")\nload(\"@bazel_tools//tools/build_defs/repo:http.bzl\", \"http_archive\")\nload(\"@bazel_tools//tools/build_defs/repo:utils.bzl\", \"maybe\")\nload(\"@bazel_skylib//lib:selects.bzl\", \"selects\")\nload(\"@rules_rust//crate_universe/private:local_crate_mirror.bzl\", \"local_crate_mirror\")\n\n###############################################################################\n# MACROS API\n###############################################################################\n\n# An identifier that represent common dependencies (unconditional).\n_COMMON_CONDITION = \"\"\n\ndef _flatten_dependency_maps(all_dependency_maps):\n \"\"\"Flatten a list of dependency maps into one dictionary.\n\n Dependency maps have the following structure:\n\n ```python\n DEPENDENCIES_MAP = {\n # The first key in the map is a Bazel package\n # name of the workspace this file is defined in.\n \"workspace_member_package\": {\n\n # Not all dependencies are supported for all platforms.\n # the condition key is the condition required to be true\n # on the host platform.\n \"condition\": {\n\n # An alias to a crate target. # The label of the crate target the\n # Aliases are only crate names. # package name refers to.\n \"package_name\": \"@full//:label\",\n }\n }\n }\n ```\n\n Args:\n all_dependency_maps (list): A list of dicts as described above\n\n Returns:\n dict: A dictionary as described above\n \"\"\"\n dependencies = {}\n\n for workspace_deps_map in all_dependency_maps:\n for pkg_name, conditional_deps_map in workspace_deps_map.items():\n if pkg_name not in dependencies:\n non_frozen_map = dict()\n for key, values in conditional_deps_map.items():\n non_frozen_map.update({key: dict(values.items())})\n dependencies.setdefault(pkg_name, non_frozen_map)\n continue\n\n for condition, deps_map in conditional_deps_map.items():\n # If the condition has not been recorded, do so and continue\n if condition not in dependencies[pkg_name]:\n dependencies[pkg_name].setdefault(condition, dict(deps_map.items()))\n continue\n\n # Alert on any miss-matched dependencies\n inconsistent_entries = []\n for crate_name, crate_label in deps_map.items():\n existing = dependencies[pkg_name][condition].get(crate_name)\n if existing and existing != crate_label:\n inconsistent_entries.append((crate_name, existing, crate_label))\n dependencies[pkg_name][condition].update({crate_name: crate_label})\n\n return dependencies\n\ndef crate_deps(deps, package_name = None):\n \"\"\"Finds the fully qualified label of the requested crates for the package where this macro is called.\n\n Args:\n deps (list): The desired list of crate targets.\n package_name (str, optional): The package name of the set of dependencies to look up.\n Defaults to `native.package_name()`.\n\n Returns:\n list: A list of labels to generated rust targets (str)\n \"\"\"\n\n if not deps:\n return []\n\n if package_name == None:\n package_name = native.package_name()\n\n # Join both sets of dependencies\n dependencies = _flatten_dependency_maps([\n _NORMAL_DEPENDENCIES,\n _NORMAL_DEV_DEPENDENCIES,\n _PROC_MACRO_DEPENDENCIES,\n _PROC_MACRO_DEV_DEPENDENCIES,\n _BUILD_DEPENDENCIES,\n _BUILD_PROC_MACRO_DEPENDENCIES,\n ]).pop(package_name, {})\n\n # Combine all conditional packages so we can easily index over a flat list\n # TODO: Perhaps this should actually return select statements and maintain\n # the conditionals of the dependencies\n flat_deps = {}\n for deps_set in dependencies.values():\n for crate_name, crate_label in deps_set.items():\n flat_deps.update({crate_name: crate_label})\n\n missing_crates = []\n crate_targets = []\n for crate_target in deps:\n if crate_target not in flat_deps:\n missing_crates.append(crate_target)\n else:\n crate_targets.append(flat_deps[crate_target])\n\n if missing_crates:\n fail(\"Could not find crates `{}` among dependencies of `{}`. Available dependencies were `{}`\".format(\n missing_crates,\n package_name,\n dependencies,\n ))\n\n return crate_targets\n\ndef all_crate_deps(\n normal = False, \n normal_dev = False, \n proc_macro = False, \n proc_macro_dev = False,\n build = False,\n build_proc_macro = False,\n package_name = None):\n \"\"\"Finds the fully qualified label of all requested direct crate dependencies \\\n for the package where this macro is called.\n\n If no parameters are set, all normal dependencies are returned. Setting any one flag will\n otherwise impact the contents of the returned list.\n\n Args:\n normal (bool, optional): If True, normal dependencies are included in the\n output list.\n normal_dev (bool, optional): If True, normal dev dependencies will be\n included in the output list.\n proc_macro (bool, optional): If True, proc_macro dependencies are included\n in the output list.\n proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are\n included in the output list.\n build (bool, optional): If True, build dependencies are included\n in the output list.\n build_proc_macro (bool, optional): If True, build proc_macro dependencies are\n included in the output list.\n package_name (str, optional): The package name of the set of dependencies to look up.\n Defaults to `native.package_name()` when unset.\n\n Returns:\n list: A list of labels to generated rust targets (str)\n \"\"\"\n\n if package_name == None:\n package_name = native.package_name()\n\n # Determine the relevant maps to use\n all_dependency_maps = []\n if normal:\n all_dependency_maps.append(_NORMAL_DEPENDENCIES)\n if normal_dev:\n all_dependency_maps.append(_NORMAL_DEV_DEPENDENCIES)\n if proc_macro:\n all_dependency_maps.append(_PROC_MACRO_DEPENDENCIES)\n if proc_macro_dev:\n all_dependency_maps.append(_PROC_MACRO_DEV_DEPENDENCIES)\n if build:\n all_dependency_maps.append(_BUILD_DEPENDENCIES)\n if build_proc_macro:\n all_dependency_maps.append(_BUILD_PROC_MACRO_DEPENDENCIES)\n\n # Default to always using normal dependencies\n if not all_dependency_maps:\n all_dependency_maps.append(_NORMAL_DEPENDENCIES)\n\n dependencies = _flatten_dependency_maps(all_dependency_maps).pop(package_name, None)\n\n if not dependencies:\n if dependencies == None:\n fail(\"Tried to get all_crate_deps for package \" + package_name + \" but that package had no Cargo.toml file\")\n else:\n return []\n\n crate_deps = list(dependencies.pop(_COMMON_CONDITION, {}).values())\n for condition, deps in dependencies.items():\n crate_deps += selects.with_or({\n tuple(_CONDITIONS[condition]): deps.values(),\n \"//conditions:default\": [],\n })\n\n return crate_deps\n\ndef aliases(\n normal = False,\n normal_dev = False,\n proc_macro = False,\n proc_macro_dev = False,\n build = False,\n build_proc_macro = False,\n package_name = None):\n \"\"\"Produces a map of Crate alias names to their original label\n\n If no dependency kinds are specified, `normal` and `proc_macro` are used by default.\n Setting any one flag will otherwise determine the contents of the returned dict.\n\n Args:\n normal (bool, optional): If True, normal dependencies are included in the\n output list.\n normal_dev (bool, optional): If True, normal dev dependencies will be\n included in the output list..\n proc_macro (bool, optional): If True, proc_macro dependencies are included\n in the output list.\n proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are\n included in the output list.\n build (bool, optional): If True, build dependencies are included\n in the output list.\n build_proc_macro (bool, optional): If True, build proc_macro dependencies are\n included in the output list.\n package_name (str, optional): The package name of the set of dependencies to look up.\n Defaults to `native.package_name()` when unset.\n\n Returns:\n dict: The aliases of all associated packages\n \"\"\"\n if package_name == None:\n package_name = native.package_name()\n\n # Determine the relevant maps to use\n all_aliases_maps = []\n if normal:\n all_aliases_maps.append(_NORMAL_ALIASES)\n if normal_dev:\n all_aliases_maps.append(_NORMAL_DEV_ALIASES)\n if proc_macro:\n all_aliases_maps.append(_PROC_MACRO_ALIASES)\n if proc_macro_dev:\n all_aliases_maps.append(_PROC_MACRO_DEV_ALIASES)\n if build:\n all_aliases_maps.append(_BUILD_ALIASES)\n if build_proc_macro:\n all_aliases_maps.append(_BUILD_PROC_MACRO_ALIASES)\n\n # Default to always using normal aliases\n if not all_aliases_maps:\n all_aliases_maps.append(_NORMAL_ALIASES)\n all_aliases_maps.append(_PROC_MACRO_ALIASES)\n\n aliases = _flatten_dependency_maps(all_aliases_maps).pop(package_name, None)\n\n if not aliases:\n return dict()\n\n common_items = aliases.pop(_COMMON_CONDITION, {}).items()\n\n # If there are only common items in the dictionary, immediately return them\n if not len(aliases.keys()) == 1:\n return dict(common_items)\n\n # Build a single select statement where each conditional has accounted for the\n # common set of aliases.\n crate_aliases = {\"//conditions:default\": dict(common_items)}\n for condition, deps in aliases.items():\n condition_triples = _CONDITIONS[condition]\n for triple in condition_triples:\n if triple in crate_aliases:\n crate_aliases[triple].update(deps)\n else:\n crate_aliases.update({triple: dict(deps.items() + common_items)})\n\n return select(crate_aliases)\n\n###############################################################################\n# WORKSPACE MEMBER DEPS AND ALIASES\n###############################################################################\n\n_NORMAL_DEPENDENCIES = {\n \"third_party/crates_io\": {\n _COMMON_CONDITION: {\n \"aes\": Label(\"@rust_crates//:aes-0.8.4\"),\n \"aes-gcm\": Label(\"@rust_crates//:aes-gcm-0.10.3\"),\n \"aligned\": Label(\"@rust_crates//:aligned-0.4.3\"),\n \"anyhow\": Label(\"@rust_crates//:anyhow-1.0.103\"),\n \"bitfield\": Label(\"@rust_crates//:bitfield-0.14.0\"),\n \"bitflags\": Label(\"@rust_crates//:bitflags-2.12.1\"),\n \"byteorder\": Label(\"@rust_crates//:byteorder-1.5.0\"),\n \"cfg-if\": Label(\"@rust_crates//:cfg-if-1.0.4\"),\n \"cipher\": Label(\"@rust_crates//:cipher-0.4.4\"),\n \"clap\": Label(\"@rust_crates//:clap-4.6.1\"),\n \"compiler_builtins\": Label(\"@rust_crates//:compiler_builtins-0.1.160\"),\n \"cortex-m\": Label(\"@rust_crates//:cortex-m-0.7.7\"),\n \"cortex-m-rt\": Label(\"@rust_crates//:cortex-m-rt-0.7.5\"),\n \"cortex-m-semihosting\": Label(\"@rust_crates//:cortex-m-semihosting-0.5.0\"),\n \"critical-section\": Label(\"@rust_crates//:critical-section-1.2.0\"),\n \"ctr\": Label(\"@rust_crates//:ctr-0.9.2\"),\n \"ecdsa\": Label(\"@rust_crates//:ecdsa-0.16.9\"),\n \"embedded-hal\": Label(\"@rust_crates//:embedded-hal-1.0.0\"),\n \"embedded-hal-async\": Label(\"@rust_crates//:embedded-hal-async-1.0.0\"),\n \"embedded-hal-nb\": Label(\"@rust_crates//:embedded-hal-nb-1.0.0\"),\n \"embedded-io\": Label(\"@rust_crates//:embedded-io-0.6.1\"),\n \"embedded-storage\": Label(\"@rust_crates//:embedded-storage-0.3.1\"),\n \"fugit\": Label(\"@rust_crates//:fugit-0.3.9\"),\n \"futures\": Label(\"@rust_crates//:futures-0.3.32\"),\n \"heapless\": Label(\"@rust_crates//:heapless-0.9.3\"),\n \"hex\": Label(\"@rust_crates//:hex-0.4.3\"),\n \"hex-literal\": Label(\"@rust_crates//:hex-literal-0.4.1\"),\n \"hmac\": Label(\"@rust_crates//:hmac-0.12.1\"),\n \"k256\": Label(\"@rust_crates//:k256-0.13.4\"),\n \"log\": Label(\"@rust_crates//:log-0.4.31\"),\n \"mctp\": Label(\"@rust_crates//:mctp-0.2.0\"),\n \"mctp-lib\": Label(\"@rust_crates//:mctp-lib-0.1.0\"),\n \"memoffset\": Label(\"@rust_crates//:memoffset-0.9.1\"),\n \"minijinja\": Label(\"@rust_crates//:minijinja-2.20.0\"),\n \"nb\": Label(\"@rust_crates//:nb-1.1.0\"),\n \"nom\": Label(\"@rust_crates//:nom-7.1.3\"),\n \"object\": Label(\"@rust_crates//:object-0.37.3\"),\n \"openprot-hal-blocking\": Label(\"@rust_crates//:openprot-hal-blocking-0.1.0\"),\n \"p256\": Label(\"@rust_crates//:p256-0.13.2\"),\n \"p384\": Label(\"@rust_crates//:p384-0.13.1\"),\n \"panic-halt\": Label(\"@rust_crates//:panic-halt-1.0.0\"),\n \"proc-macro2\": Label(\"@rust_crates//:proc-macro2-1.0.106\"),\n \"prost\": Label(\"@rust_crates//:prost-0.13.5\"),\n \"quote\": Label(\"@rust_crates//:quote-1.0.45\"),\n \"rand_core\": Label(\"@rust_crates//:rand_core-0.9.5\"),\n \"riscv\": Label(\"@rust_crates//:riscv-0.12.1\"),\n \"riscv-rt\": Label(\"@rust_crates//:riscv-rt-0.12.2\"),\n \"riscv-semihosting\": Label(\"@rust_crates//:riscv-semihosting-0.1.3\"),\n \"rustc-demangle\": Label(\"@rust_crates//:rustc-demangle-0.1.27\"),\n \"sec1\": Label(\"@rust_crates//:sec1-0.7.3\"),\n \"serde\": Label(\"@rust_crates//:serde-1.0.228\"),\n \"serde_json5\": Label(\"@rust_crates//:serde_json5-0.2.1\"),\n \"sha2\": Label(\"@rust_crates//:sha2-0.10.9\"),\n \"sha3\": Label(\"@rust_crates//:sha3-0.10.9\"),\n \"smlang\": Label(\"@rust_crates//:smlang-0.8.0\"),\n \"spdm-lib\": Label(\"@rust_crates//:spdm-lib-0.1.0\"),\n \"subtle\": Label(\"@rust_crates//:subtle-2.6.1\"),\n \"syn1\": Label(\"@rust_crates//:syn-1.0.109\"),\n \"syn\": Label(\"@rust_crates//:syn-2.0.117\"),\n \"thiserror\": Label(\"@rust_crates//:thiserror-2.0.18\"),\n \"tock-registers\": Label(\"@rust_crates//:tock-registers-0.9.0\"),\n \"tokio\": Label(\"@rust_crates//:tokio-1.52.3\"),\n \"tokio-util\": Label(\"@rust_crates//:tokio-util-0.7.18\"),\n \"vcell\": Label(\"@rust_crates//:vcell-0.1.3\"),\n \"zerocopy\": Label(\"@rust_crates//:zerocopy-0.8.50\"),\n \"zeroize\": Label(\"@rust_crates//:zeroize-1.8.2\"),\n },\n },\n}\n\n\n_NORMAL_ALIASES = {\n \"third_party/crates_io\": {\n _COMMON_CONDITION: {\n Label(\"@rust_crates//:syn-1.0.109\"): \"syn1\",\n },\n },\n}\n\n\n_NORMAL_DEV_DEPENDENCIES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_NORMAL_DEV_ALIASES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_PROC_MACRO_DEPENDENCIES = {\n \"third_party/crates_io\": {\n _COMMON_CONDITION: {\n \"bitfield-struct\": Label(\"@rust_crates//:bitfield-struct-0.11.0\"),\n \"paste\": Label(\"@rust_crates//:paste-1.0.15\"),\n \"serde_derive\": Label(\"@rust_crates//:serde_derive-1.0.228\"),\n },\n },\n}\n\n\n_PROC_MACRO_ALIASES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_PROC_MACRO_DEV_DEPENDENCIES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_PROC_MACRO_DEV_ALIASES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_BUILD_DEPENDENCIES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_BUILD_ALIASES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_BUILD_PROC_MACRO_DEPENDENCIES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_BUILD_PROC_MACRO_ALIASES = {\n \"third_party/crates_io\": {\n },\n}\n\n\n_CONDITIONS = {\n \"aarch64-apple-darwin\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n \"aarch64-linux-android\": [],\n \"aarch64-unknown-linux-gnu\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n \"cfg(all(any(target_os = \\\"linux\\\", target_os = \\\"android\\\"), any(rustix_use_libc, miri, not(all(target_os = \\\"linux\\\", any(target_endian = \\\"little\\\", any(target_arch = \\\"s390x\\\", target_arch = \\\"powerpc\\\")), any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc\\\"), all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"s390x\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\")))))))\": [],\n \"cfg(all(not(rustix_use_libc), not(miri), target_os = \\\"linux\\\", any(target_endian = \\\"little\\\", any(target_arch = \\\"s390x\\\", target_arch = \\\"powerpc\\\")), any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc\\\"), all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"s390x\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\"))))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \\\"linux\\\", any(target_endian = \\\"little\\\", any(target_arch = \\\"s390x\\\", target_arch = \\\"powerpc\\\")), any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc\\\"), all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"s390x\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\")))))))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\",\"@rules_rust//rust/platform:thumbv7em-none-eabi\",\"@rules_rust//rust/platform:x86_64-apple-darwin\"],\n \"cfg(all(target_arch = \\\"aarch64\\\", target_os = \\\"linux\\\"))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n \"cfg(all(target_arch = \\\"aarch64\\\", target_vendor = \\\"apple\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n \"cfg(all(target_arch = \\\"loongarch64\\\", target_os = \\\"linux\\\"))\": [],\n \"cfg(any())\": [],\n \"cfg(any(target_arch = \\\"aarch64\\\", target_arch = \\\"x86_64\\\", target_arch = \\\"x86\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(any(target_arch = \\\"arm\\\", target_pointer_width = \\\"32\\\", target_pointer_width = \\\"64\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\",\"@rules_rust//rust/platform:thumbv7em-none-eabi\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(any(unix, target_os = \\\"hermit\\\", target_os = \\\"wasi\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(any(unix, target_os = \\\"wasi\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(target_arch = \\\"aarch64\\\")\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n \"cfg(target_os = \\\"hermit\\\")\": [],\n \"cfg(target_os = \\\"redox\\\")\": [],\n \"cfg(target_os = \\\"wasi\\\")\": [],\n \"cfg(unix)\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(windows)\": [],\n \"riscv32imc-unknown-none-elf\": [\"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\"],\n \"thumbv7em-none-eabi\": [\"@rules_rust//rust/platform:thumbv7em-none-eabi\"],\n \"x86_64-apple-darwin\": [\"@rules_rust//rust/platform:x86_64-apple-darwin\"],\n \"x86_64-unknown-linux-gnu\": [\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n}\n\n###############################################################################\n\ndef crate_repositories():\n \"\"\"A macro for defining repositories for all generated crates.\n\n Returns:\n A list of repos visible to the module through the module extension.\n \"\"\"\n maybe(\n http_archive,\n name = \"rust_crates__adler2-2.0.1\",\n sha256 = \"320119579fcad9c21884f5c4861d16174d0e06250625266f50fe6898340abefa\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/adler2/2.0.1/download\"],\n strip_prefix = \"adler2-2.0.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.adler2-2.0.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__aead-0.5.2\",\n sha256 = \"d122413f284cf2d62fb1b7db97e02edb8cda96d769b16e443a4f6195e35662b0\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/aead/0.5.2/download\"],\n strip_prefix = \"aead-0.5.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.aead-0.5.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__aes-0.8.4\",\n sha256 = \"b169f7a6d4742236a0a00c541b845991d0ac43e546831af1249753ab4c3aa3a0\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/aes/0.8.4/download\"],\n strip_prefix = \"aes-0.8.4\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.aes-0.8.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__aes-gcm-0.10.3\",\n sha256 = \"831010a0f742e1209b3bcea8fab6a8e149051ba6099432c8cb2cc117dec3ead1\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/aes-gcm/0.10.3/download\"],\n strip_prefix = \"aes-gcm-0.10.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.aes-gcm-0.10.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__aligned-0.4.3\",\n sha256 = \"ee4508988c62edf04abd8d92897fca0c2995d907ce1dfeaf369dac3716a40685\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/aligned/0.4.3/download\"],\n strip_prefix = \"aligned-0.4.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.aligned-0.4.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__anstream-1.0.0\",\n sha256 = \"824a212faf96e9acacdbd09febd34438f8f711fb84e09a8916013cd7815ca28d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstream/1.0.0/download\"],\n strip_prefix = \"anstream-1.0.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.anstream-1.0.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__anstyle-1.0.14\",\n sha256 = \"940b3a0ca603d1eade50a4846a2afffd5ef57a9feac2c0e2ec2e14f9ead76000\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle/1.0.14/download\"],\n strip_prefix = \"anstyle-1.0.14\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.anstyle-1.0.14.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__anstyle-parse-1.0.0\",\n sha256 = \"52ce7f38b242319f7cabaa6813055467063ecdc9d355bbb4ce0c68908cd8130e\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle-parse/1.0.0/download\"],\n strip_prefix = \"anstyle-parse-1.0.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.anstyle-parse-1.0.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__anstyle-query-1.1.5\",\n sha256 = \"40c48f72fd53cd289104fc64099abca73db4166ad86ea0b4341abe65af83dadc\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle-query/1.1.5/download\"],\n strip_prefix = \"anstyle-query-1.1.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.anstyle-query-1.1.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__anstyle-wincon-3.0.11\",\n sha256 = \"291e6a250ff86cd4a820112fb8898808a366d8f9f58ce16d1f538353ad55747d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle-wincon/3.0.11/download\"],\n strip_prefix = \"anstyle-wincon-3.0.11\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.anstyle-wincon-3.0.11.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__anyhow-1.0.103\",\n sha256 = \"2a4385e2e34eb35d6b3efe798b9eb88096925d87726c0798709bf56d9ed84af3\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anyhow/1.0.103/download\"],\n strip_prefix = \"anyhow-1.0.103\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.anyhow-1.0.103.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__as-slice-0.2.1\",\n sha256 = \"516b6b4f0e40d50dcda9365d53964ec74560ad4284da2e7fc97122cd83174516\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/as-slice/0.2.1/download\"],\n strip_prefix = \"as-slice-0.2.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.as-slice-0.2.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__autocfg-1.5.1\",\n sha256 = \"f2032f911046de80f0a198e0901378627c33f59ea0ac00e363d481118bd70a53\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/autocfg/1.5.1/download\"],\n strip_prefix = \"autocfg-1.5.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.autocfg-1.5.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__bare-metal-0.2.5\",\n sha256 = \"5deb64efa5bd81e31fcd1938615a6d98c82eafcbcd787162b6f63b91d6bac5b3\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bare-metal/0.2.5/download\"],\n strip_prefix = \"bare-metal-0.2.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.bare-metal-0.2.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__base16ct-0.2.0\",\n sha256 = \"4c7f02d4ea65f2c1853089ffd8d2787bdbc63de2f0d29dedbcf8ccdfa0ccd4cf\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/base16ct/0.2.0/download\"],\n strip_prefix = \"base16ct-0.2.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.base16ct-0.2.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__bitfield-0.13.2\",\n sha256 = \"46afbd2983a5d5a7bd740ccb198caf5b82f45c40c09c0eed36052d91cb92e719\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bitfield/0.13.2/download\"],\n strip_prefix = \"bitfield-0.13.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.bitfield-0.13.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__bitfield-0.14.0\",\n sha256 = \"2d7e60934ceec538daadb9d8432424ed043a904d8e0243f3c6446bce549a46ac\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bitfield/0.14.0/download\"],\n strip_prefix = \"bitfield-0.14.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.bitfield-0.14.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__bitfield-struct-0.11.0\",\n sha256 = \"d3ca019570363e800b05ad4fd890734f28ac7b72f563ad8a35079efb793616f8\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bitfield-struct/0.11.0/download\"],\n strip_prefix = \"bitfield-struct-0.11.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.bitfield-struct-0.11.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__bitflags-2.12.1\",\n sha256 = \"84d7ced0ae9557296835c32bf1b1e02b44c746701f898460fb000d7eaa84f00a\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bitflags/2.12.1/download\"],\n strip_prefix = \"bitflags-2.12.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.bitflags-2.12.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__block-buffer-0.10.4\",\n sha256 = \"3078c7629b62d3f0439517fa394996acacc5cbc91c5a20d8c658e77abd503a71\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/block-buffer/0.10.4/download\"],\n strip_prefix = \"block-buffer-0.10.4\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.block-buffer-0.10.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__byteorder-1.5.0\",\n sha256 = \"1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/byteorder/1.5.0/download\"],\n strip_prefix = \"byteorder-1.5.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.byteorder-1.5.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__bytes-1.11.1\",\n sha256 = \"1e748733b7cbc798e1434b6ac524f0c1ff2ab456fe201501e6497c8417a4fc33\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bytes/1.11.1/download\"],\n strip_prefix = \"bytes-1.11.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.bytes-1.11.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cfg-if-1.0.4\",\n sha256 = \"9330f8b2ff13f34540b44e946ef35111825727b38d33286ef986142615121801\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cfg-if/1.0.4/download\"],\n strip_prefix = \"cfg-if-1.0.4\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cfg-if-1.0.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cipher-0.4.4\",\n sha256 = \"773f3b9af64447d2ce9850330c473515014aa235e6a783b02db81ff39e4a3dad\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cipher/0.4.4/download\"],\n strip_prefix = \"cipher-0.4.4\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cipher-0.4.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__clap-4.6.1\",\n sha256 = \"1ddb117e43bbf7dacf0a4190fef4d345b9bad68dfc649cb349e7d17d28428e51\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/clap/4.6.1/download\"],\n strip_prefix = \"clap-4.6.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.clap-4.6.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__clap_builder-4.6.0\",\n sha256 = \"714a53001bf66416adb0e2ef5ac857140e7dc3a0c48fb28b2f10762fc4b5069f\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/clap_builder/4.6.0/download\"],\n strip_prefix = \"clap_builder-4.6.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.clap_builder-4.6.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__clap_derive-4.6.1\",\n sha256 = \"f2ce8604710f6733aa641a2b3731eaa1e8b3d9973d5e3565da11800813f997a9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/clap_derive/4.6.1/download\"],\n strip_prefix = \"clap_derive-4.6.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.clap_derive-4.6.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__clap_lex-1.1.0\",\n sha256 = \"c8d4a3bb8b1e0c1050499d1815f5ab16d04f0959b233085fb31653fbfc9d98f9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/clap_lex/1.1.0/download\"],\n strip_prefix = \"clap_lex-1.1.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.clap_lex-1.1.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__colorchoice-1.0.5\",\n sha256 = \"1d07550c9036bf2ae0c684c4297d503f838287c83c53686d05370d0e139ae570\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/colorchoice/1.0.5/download\"],\n strip_prefix = \"colorchoice-1.0.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.colorchoice-1.0.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__compiler_builtins-0.1.160\",\n sha256 = \"6376049cfa92c0aa8b9ac95fae22184b981c658208d4ed8a1dc553cd83612895\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/compiler_builtins/0.1.160/download\"],\n strip_prefix = \"compiler_builtins-0.1.160\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.compiler_builtins-0.1.160.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__const-oid-0.9.6\",\n sha256 = \"c2459377285ad874054d797f3ccebf984978aa39129f6eafde5cdc8315b612f8\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/const-oid/0.9.6/download\"],\n strip_prefix = \"const-oid-0.9.6\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.const-oid-0.9.6.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cortex-m-0.7.7\",\n sha256 = \"8ec610d8f49840a5b376c69663b6369e71f4b34484b9b2eb29fb918d92516cb9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cortex-m/0.7.7/download\"],\n strip_prefix = \"cortex-m-0.7.7\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cortex-m-0.7.7.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cortex-m-rt-0.7.5\",\n sha256 = \"801d4dec46b34c299ccf6b036717ae0fce602faa4f4fe816d9013b9a7c9f5ba6\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cortex-m-rt/0.7.5/download\"],\n strip_prefix = \"cortex-m-rt-0.7.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cortex-m-rt-0.7.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cortex-m-rt-macros-0.7.5\",\n sha256 = \"e37549a379a9e0e6e576fd208ee60394ccb8be963889eebba3ffe0980364f472\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cortex-m-rt-macros/0.7.5/download\"],\n strip_prefix = \"cortex-m-rt-macros-0.7.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cortex-m-rt-macros-0.7.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cortex-m-semihosting-0.5.0\",\n sha256 = \"c23234600452033cc77e4b761e740e02d2c4168e11dbf36ab14a0f58973592b0\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cortex-m-semihosting/0.5.0/download\"],\n strip_prefix = \"cortex-m-semihosting-0.5.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cortex-m-semihosting-0.5.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__cpufeatures-0.2.17\",\n sha256 = \"59ed5838eebb26a2bb2e58f6d5b5316989ae9d08bab10e0e6d103e656d1b0280\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cpufeatures/0.2.17/download\"],\n strip_prefix = \"cpufeatures-0.2.17\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.cpufeatures-0.2.17.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__crc-3.4.0\",\n sha256 = \"5eb8a2a1cd12ab0d987a5d5e825195d372001a4094a0376319d5a0ad71c1ba0d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/crc/3.4.0/download\"],\n strip_prefix = \"crc-3.4.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.crc-3.4.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__crc-catalog-2.5.0\",\n sha256 = \"217698eaf96b4a3f0bc4f3662aaa55bdf913cd54d7204591faa790070c6d0853\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/crc-catalog/2.5.0/download\"],\n strip_prefix = \"crc-catalog-2.5.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.crc-catalog-2.5.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__crc32fast-1.5.0\",\n sha256 = \"9481c1c90cbf2ac953f07c8d4a58aa3945c425b7185c9154d67a65e4230da511\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/crc32fast/1.5.0/download\"],\n strip_prefix = \"crc32fast-1.5.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.crc32fast-1.5.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__critical-section-1.2.0\",\n sha256 = \"790eea4361631c5e7d22598ecd5723ff611904e3344ce8720784c93e3d83d40b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/critical-section/1.2.0/download\"],\n strip_prefix = \"critical-section-1.2.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.critical-section-1.2.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__crypto-bigint-0.5.5\",\n sha256 = \"0dc92fb57ca44df6db8059111ab3af99a63d5d0f8375d9972e319a379c6bab76\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/crypto-bigint/0.5.5/download\"],\n strip_prefix = \"crypto-bigint-0.5.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.crypto-bigint-0.5.5.bazel\"),\n )\n\n maybe(\n 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Label(\"@rust_crates//rust_crates:BUILD.der-0.7.10.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__digest-0.10.7\",\n sha256 = \"9ed9a281f7bc9b7576e61468ba615a66a5c8cfdff42420a70aa82701a3b1e292\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/digest/0.10.7/download\"],\n strip_prefix = \"digest-0.10.7\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.digest-0.10.7.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__ecdsa-0.16.9\",\n sha256 = \"ee27f32b5c5292967d2d4a9d7f1e0b0aed2c15daded5a60300e4abb9d8020bca\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/ecdsa/0.16.9/download\"],\n strip_prefix = \"ecdsa-0.16.9\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.ecdsa-0.16.9.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__either-1.16.0\",\n sha256 = \"91622ff5e7162018101f2fea40d6ebf4a78bbe5a49736a2020649edf9693679e\",\n type = \"tar.gz\",\n urls = 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maybe(\n http_archive,\n name = \"rust_crates__futures-0.3.32\",\n sha256 = \"8b147ee9d1f6d097cef9ce628cd2ee62288d963e16fb287bd9286455b241382d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/futures/0.3.32/download\"],\n strip_prefix = \"futures-0.3.32\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.futures-0.3.32.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__futures-channel-0.3.32\",\n sha256 = \"07bbe89c50d7a535e539b8c17bc0b49bdb77747034daa8087407d655f3f7cc1d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/futures-channel/0.3.32/download\"],\n strip_prefix = \"futures-channel-0.3.32\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.futures-channel-0.3.32.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__futures-core-0.3.32\",\n sha256 = \"7e3450815272ef58cec6d564423f6e755e25379b217b0bc688e295ba24df6b1d\",\n type = \"tar.gz\",\n urls = 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maybe(\n http_archive,\n name = \"rust_crates__hmac-0.12.1\",\n sha256 = \"6c49c37c09c17a53d937dfbb742eb3a961d65a994e6bcdcf37e7399d0cc8ab5e\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/hmac/0.12.1/download\"],\n strip_prefix = \"hmac-0.12.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.hmac-0.12.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__indexmap-2.14.0\",\n sha256 = \"d466e9454f08e4a911e14806c24e16fba1b4c121d1ea474396f396069cf949d9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/indexmap/2.14.0/download\"],\n strip_prefix = \"indexmap-2.14.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.indexmap-2.14.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__inout-0.1.4\",\n sha256 = \"879f10e63c20629ecabbb64a8010319738c66a5cd0c29b02d63d272b03751d01\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/inout/0.1.4/download\"],\n strip_prefix = \"inout-0.1.4\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.inout-0.1.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__is_terminal_polyfill-1.70.2\",\n sha256 = \"a6cb138bb79a146c1bd460005623e142ef0181e3d0219cb493e02f7d08a35695\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/is_terminal_polyfill/1.70.2/download\"],\n strip_prefix = \"is_terminal_polyfill-1.70.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.is_terminal_polyfill-1.70.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__itertools-0.14.0\",\n sha256 = \"2b192c782037fadd9cfa75548310488aabdbf3d2da73885b31bd0abd03351285\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/itertools/0.14.0/download\"],\n strip_prefix = \"itertools-0.14.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.itertools-0.14.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__k256-0.13.4\",\n sha256 = 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Label(\"@rust_crates//rust_crates:BUILD.mctp-lib-0.1.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__memchr-2.8.1\",\n sha256 = \"6b947ae49db0d222b1dbc6b113ce7248a3fc3a6ca21b696717bfc000ba4484d8\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/memchr/2.8.1/download\"],\n strip_prefix = \"memchr-2.8.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.memchr-2.8.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__memo-map-0.3.3\",\n sha256 = \"38d1115007560874e373613744c6fba374c17688327a71c1476d1a5954cc857b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/memo-map/0.3.3/download\"],\n strip_prefix = \"memo-map-0.3.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.memo-map-0.3.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__memoffset-0.9.1\",\n sha256 = \"488016bfae457b036d996092f6cb448677611ce4449e970ceaf42695203f218a\",\n type = \"tar.gz\",\n urls = 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strip_prefix = \"object-0.37.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.object-0.37.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__once_cell_polyfill-1.70.2\",\n sha256 = \"384b8ab6d37215f3c5301a95a4accb5d64aa607f1fcb26a11b5303878451b4fe\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/once_cell_polyfill/1.70.2/download\"],\n strip_prefix = \"once_cell_polyfill-1.70.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.once_cell_polyfill-1.70.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__opaque-debug-0.3.1\",\n sha256 = \"c08d65885ee38876c4f86fa503fb49d7b507c2b62552df7c70b2fce627e06381\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/opaque-debug/0.3.1/download\"],\n strip_prefix = \"opaque-debug-0.3.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.opaque-debug-0.3.1.bazel\"),\n )\n\n maybe(\n git_repository,\n name = \"rust_crates__openprot-hal-blocking-0.1.0\",\n commit = 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Label(\"@rust_crates//rust_crates:BUILD.rand_core-0.6.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__rand_core-0.9.5\",\n sha256 = \"76afc826de14238e6e8c374ddcc1fa19e374fd8dd986b0d2af0d02377261d83c\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/rand_core/0.9.5/download\"],\n strip_prefix = \"rand_core-0.9.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.rand_core-0.9.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__redox_syscall-0.5.18\",\n sha256 = \"ed2bf2547551a7053d6fdfafda3f938979645c44812fbfcda098faae3f1a362d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/redox_syscall/0.5.18/download\"],\n strip_prefix = \"redox_syscall-0.5.18\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.redox_syscall-0.5.18.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__rfc6979-0.4.0\",\n sha256 = \"f8dd2a808d456c4a54e300a23e9f5a67e122c3024119acbfd73e3bf664491cb2\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/rfc6979/0.4.0/download\"],\n strip_prefix = \"rfc6979-0.4.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.rfc6979-0.4.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__riscv-0.11.1\",\n sha256 = \"2f5c1b8bf41ea746266cdee443d1d1e9125c86ce1447e1a2615abd34330d33a9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/riscv/0.11.1/download\"],\n strip_prefix = \"riscv-0.11.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.riscv-0.11.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__riscv-0.12.1\",\n sha256 = \"5ea8ff73d3720bdd0a97925f0bf79ad2744b6da8ff36be3840c48ac81191d7a7\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/riscv/0.12.1/download\"],\n strip_prefix = \"riscv-0.12.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.riscv-0.12.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__riscv-0.13.0\",\n sha256 = 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Label(\"@rust_crates//rust_crates:BUILD.riscv-macros-0.2.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__riscv-pac-0.2.0\",\n sha256 = \"8188909339ccc0c68cfb5a04648313f09621e8b87dc03095454f1a11f6c5d436\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/riscv-pac/0.2.0/download\"],\n strip_prefix = \"riscv-pac-0.2.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.riscv-pac-0.2.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__riscv-rt-0.12.2\",\n sha256 = \"c0d35e32cf1383183e8885d8a9aa4402a087fd094dc34c2cb6df6687d0229dfe\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/riscv-rt/0.12.2/download\"],\n strip_prefix = \"riscv-rt-0.12.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.riscv-rt-0.12.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__riscv-rt-macros-0.2.2\",\n sha256 = \"30f19a85fe107b65031e0ba8ec60c34c2494069fe910d6c297f5e7cb5a6f76d0\",\n type = \"tar.gz\",\n urls = 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Label(\"@rust_crates//rust_crates:BUILD.smbus-pec-1.0.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__smlang-0.8.0\",\n sha256 = \"1de84f9f80bbe6272174e2bfdb8cf7ce4815b218038a42161c2f21c1d872c215\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/smlang/0.8.0/download\"],\n strip_prefix = \"smlang-0.8.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.smlang-0.8.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__smlang-macros-0.8.0\",\n sha256 = \"231b4425dcc43afc7e18c34e7c6738cd252d42d91d909c948df14107c9ae79f1\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/smlang-macros/0.8.0/download\"],\n strip_prefix = \"smlang-macros-0.8.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.smlang-macros-0.8.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__socket2-0.6.4\",\n sha256 = \"52d1cfed4120b4d927bf7c0f86d2087a4a7d6027c906d9f9d525a80573b9be51\",\n type = \"tar.gz\",\n urls = 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\"183aaf7fa637cc7b5f54c45b8f7cb6e8d73831f9f75a56b6defa5bf8c51d1699\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/string_morph/0.1.0/download\"],\n strip_prefix = \"string_morph-0.1.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.string_morph-0.1.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__strsim-0.11.1\",\n sha256 = \"7da8b5736845d9f2fcb837ea5d9e2628564b3b043a70948a3f0b778838c5fb4f\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/strsim/0.11.1/download\"],\n strip_prefix = \"strsim-0.11.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.strsim-0.11.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__subtle-2.6.1\",\n sha256 = \"13c2bddecc57b384dee18652358fb23172facb8a2c51ccc10d74c157bdea3292\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/subtle/2.6.1/download\"],\n strip_prefix = \"subtle-2.6.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.subtle-2.6.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__syn-1.0.109\",\n sha256 = \"72b64191b275b66ffe2469e8af2c1cfe3bafa67b529ead792a6d0160888b4237\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/syn/1.0.109/download\"],\n strip_prefix = \"syn-1.0.109\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.syn-1.0.109.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__syn-2.0.117\",\n sha256 = \"e665b8803e7b1d2a727f4023456bbbbe74da67099c585258af0ad9c5013b9b99\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/syn/2.0.117/download\"],\n strip_prefix = \"syn-2.0.117\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.syn-2.0.117.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__terminal_size-0.4.4\",\n sha256 = \"230a1b821ccbd75b185820a1f1ff7b14d21da1e442e22c0863ea5f08771a8874\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/terminal_size/0.4.4/download\"],\n strip_prefix = \"terminal_size-0.4.4\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.terminal_size-0.4.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__thiserror-2.0.18\",\n sha256 = \"4288b5bcbc7920c07a1149a35cf9590a2aa808e0bc1eafaade0b80947865fbc4\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/thiserror/2.0.18/download\"],\n strip_prefix = \"thiserror-2.0.18\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.thiserror-2.0.18.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__thiserror-impl-2.0.18\",\n sha256 = \"ebc4ee7f67670e9b64d05fa4253e753e016c6c95ff35b89b7941d6b856dec1d5\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/thiserror-impl/2.0.18/download\"],\n strip_prefix = \"thiserror-impl-2.0.18\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.thiserror-impl-2.0.18.bazel\"),\n )\n\n maybe(\n git_repository,\n name = \"rust_crates__tock-registers-0.9.0\",\n commit = \"9554639b17501a9f5940cef7a1770a0823e790c3\",\n init_submodules = True,\n remote = \"https://github.com/tock/tock.git\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.tock-registers-0.9.0.bazel\"),\n strip_prefix = \"libraries/tock-register-interface\",\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__tokio-1.52.3\",\n sha256 = \"8fc7f01b389ac15039e4dc9531aa973a135d7a4135281b12d7c1bc79fd57fffe\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/tokio/1.52.3/download\"],\n strip_prefix = \"tokio-1.52.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.tokio-1.52.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__tokio-macros-2.7.0\",\n sha256 = \"385a6cb71ab9ab790c5fe8d67f1645e6c450a7ce006a33de03daa956cf70a496\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/tokio-macros/2.7.0/download\"],\n strip_prefix = \"tokio-macros-2.7.0\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.tokio-macros-2.7.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__tokio-util-0.7.18\",\n sha256 = \"9ae9cec805b01e8fc3fd2fe289f89149a9b66dd16786abd8b19cfa7b48cb0098\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/tokio-util/0.7.18/download\"],\n strip_prefix = \"tokio-util-0.7.18\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.tokio-util-0.7.18.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__twox-hash-2.1.2\",\n sha256 = \"9ea3136b675547379c4bd395ca6b938e5ad3c3d20fad76e7fe85f9e0d011419c\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/twox-hash/2.1.2/download\"],\n strip_prefix = \"twox-hash-2.1.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.twox-hash-2.1.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__typenum-1.20.1\",\n sha256 = \"b6f5e870be6c3b371b77fe0ee0bafb859fa4964b4404c27de1d380043c4dda20\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/typenum/1.20.1/download\"],\n strip_prefix = \"typenum-1.20.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.typenum-1.20.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__ucd-trie-0.1.7\",\n sha256 = \"2896d95c02a80c6d6a5d6e953d479f5ddf2dfdb6a244441010e373ac0fb88971\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/ucd-trie/0.1.7/download\"],\n strip_prefix = \"ucd-trie-0.1.7\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.ucd-trie-0.1.7.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__unicode-ident-1.0.24\",\n sha256 = \"e6e4313cd5fcd3dad5cafa179702e2b244f760991f45397d14d4ebf38247da75\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/unicode-ident/1.0.24/download\"],\n strip_prefix = \"unicode-ident-1.0.24\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.unicode-ident-1.0.24.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__universal-hash-0.5.1\",\n sha256 = \"fc1de2c688dc15305988b563c3854064043356019f97a4b46276fe734c4f07ea\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/universal-hash/0.5.1/download\"],\n strip_prefix = \"universal-hash-0.5.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.universal-hash-0.5.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__utf8parse-0.2.2\",\n sha256 = \"06abde3611657adf66d383f00b093d7faecc7fa57071cce2578660c9f1010821\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/utf8parse/0.2.2/download\"],\n strip_prefix = \"utf8parse-0.2.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.utf8parse-0.2.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__uuid-1.23.2\",\n sha256 = \"d258b83ceec21034727ecee8c382cfa6c3e133699b0742c64571814fb420c9f7\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/uuid/1.23.2/download\"],\n strip_prefix = \"uuid-1.23.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.uuid-1.23.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__vcell-0.1.3\",\n sha256 = \"77439c1b53d2303b20d9459b1ade71a83c716e3f9c34f3228c00e6f185d6c002\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/vcell/0.1.3/download\"],\n strip_prefix = \"vcell-0.1.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.vcell-0.1.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__version_check-0.9.5\",\n sha256 = \"0b928f33d975fc6ad9f86c8f283853ad26bdd5b10b7f1542aa2fa15e2289105a\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/version_check/0.9.5/download\"],\n strip_prefix = \"version_check-0.9.5\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.version_check-0.9.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__void-1.0.2\",\n sha256 = \"6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/void/1.0.2/download\"],\n strip_prefix = \"void-1.0.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.void-1.0.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__volatile-register-0.2.2\",\n sha256 = \"de437e2a6208b014ab52972a27e59b33fa2920d3e00fe05026167a1c509d19cc\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/volatile-register/0.2.2/download\"],\n strip_prefix = \"volatile-register-0.2.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.volatile-register-0.2.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__wasi-0.11.1-wasi-snapshot-preview1\",\n sha256 = \"ccf3ec651a847eb01de73ccad15eb7d99f80485de043efb2f370cd654f4ea44b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wasi/0.11.1+wasi-snapshot-preview1/download\"],\n strip_prefix = \"wasi-0.11.1+wasi-snapshot-preview1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.wasi-0.11.1+wasi-snapshot-preview1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__windows-link-0.2.1\",\n sha256 = \"f0805222e57f7521d6a62e36fa9163bc891acd422f971defe97d64e70d0a4fe5\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/windows-link/0.2.1/download\"],\n strip_prefix = \"windows-link-0.2.1\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.windows-link-0.2.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__windows-sys-0.61.2\",\n sha256 = \"ae137229bcbd6cdf0f7b80a31df61766145077ddf49416a728b02cb3921ff3fc\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/windows-sys/0.61.2/download\"],\n strip_prefix = \"windows-sys-0.61.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.windows-sys-0.61.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__zerocopy-0.8.50\",\n sha256 = \"3b065d4f0e55f82fae73202e189638116a87c55ab6b8e6c2721e13dd9d854ad1\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zerocopy/0.8.50/download\"],\n strip_prefix = \"zerocopy-0.8.50\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.zerocopy-0.8.50.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__zerocopy-derive-0.8.50\",\n sha256 = \"0b631b19d36a892ab55420c92dbc83ccd79274f25be714855d3074aa71cab639\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zerocopy-derive/0.8.50/download\"],\n strip_prefix = \"zerocopy-derive-0.8.50\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.zerocopy-derive-0.8.50.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__zeroize-1.8.2\",\n sha256 = \"b97154e67e32c85465826e8bcc1c59429aaaf107c1e4a9e53c8d8ccd5eff88d0\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zeroize/1.8.2/download\"],\n strip_prefix = \"zeroize-1.8.2\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.zeroize-1.8.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"rust_crates__zeroize_derive-1.4.3\",\n sha256 = \"85a5b4158499876c763cb03bc4e49185d3cccbabb15b33c627f7884f43db852e\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zeroize_derive/1.4.3/download\"],\n strip_prefix = \"zeroize_derive-1.4.3\",\n build_file = Label(\"@rust_crates//rust_crates:BUILD.zeroize_derive-1.4.3.bazel\"),\n )\n\n return [\n struct(repo=\"rust_crates__aes-0.8.4\", is_dev_dep = False),\n struct(repo=\"rust_crates__aes-gcm-0.10.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__aligned-0.4.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__anyhow-1.0.103\", is_dev_dep = False),\n struct(repo=\"rust_crates__bitfield-0.14.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__bitfield-struct-0.11.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__bitflags-2.12.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__byteorder-1.5.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__cfg-if-1.0.4\", is_dev_dep = False),\n struct(repo=\"rust_crates__cipher-0.4.4\", is_dev_dep = False),\n struct(repo=\"rust_crates__clap-4.6.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__compiler_builtins-0.1.160\", is_dev_dep = False),\n struct(repo=\"rust_crates__cortex-m-0.7.7\", is_dev_dep = False),\n struct(repo=\"rust_crates__cortex-m-rt-0.7.5\", is_dev_dep = False),\n struct(repo=\"rust_crates__cortex-m-semihosting-0.5.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__critical-section-1.2.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__ctr-0.9.2\", is_dev_dep = False),\n struct(repo=\"rust_crates__ecdsa-0.16.9\", is_dev_dep = False),\n struct(repo=\"rust_crates__embedded-hal-1.0.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__embedded-hal-async-1.0.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__embedded-hal-nb-1.0.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__embedded-io-0.6.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__embedded-storage-0.3.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__fugit-0.3.9\", is_dev_dep = False),\n struct(repo=\"rust_crates__futures-0.3.32\", is_dev_dep = False),\n struct(repo=\"rust_crates__heapless-0.9.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__hex-0.4.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__hex-literal-0.4.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__hmac-0.12.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__k256-0.13.4\", is_dev_dep = False),\n struct(repo=\"rust_crates__log-0.4.31\", is_dev_dep = False),\n struct(repo=\"rust_crates__mctp-0.2.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__mctp-lib-0.1.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__memoffset-0.9.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__minijinja-2.20.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__nb-1.1.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__nom-7.1.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__object-0.37.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__openprot-hal-blocking-0.1.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__p256-0.13.2\", is_dev_dep = False),\n struct(repo=\"rust_crates__p384-0.13.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__panic-halt-1.0.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__paste-1.0.15\", is_dev_dep = False),\n struct(repo=\"rust_crates__proc-macro2-1.0.106\", is_dev_dep = False),\n struct(repo=\"rust_crates__prost-0.13.5\", is_dev_dep = False),\n struct(repo=\"rust_crates__quote-1.0.45\", is_dev_dep = False),\n struct(repo=\"rust_crates__rand_core-0.9.5\", is_dev_dep = False),\n struct(repo=\"rust_crates__riscv-0.12.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__riscv-rt-0.12.2\", is_dev_dep = False),\n struct(repo=\"rust_crates__riscv-semihosting-0.1.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__rustc-demangle-0.1.27\", is_dev_dep = False),\n struct(repo=\"rust_crates__sec1-0.7.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__serde-1.0.228\", is_dev_dep = False),\n struct(repo=\"rust_crates__serde_derive-1.0.228\", is_dev_dep = False),\n struct(repo=\"rust_crates__serde_json5-0.2.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__sha2-0.10.9\", is_dev_dep = False),\n struct(repo=\"rust_crates__sha3-0.10.9\", is_dev_dep = False),\n struct(repo=\"rust_crates__smlang-0.8.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__spdm-lib-0.1.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__subtle-2.6.1\", is_dev_dep = False),\n struct(repo=\"rust_crates__syn-1.0.109\", is_dev_dep = False),\n struct(repo=\"rust_crates__syn-2.0.117\", is_dev_dep = False),\n struct(repo=\"rust_crates__thiserror-2.0.18\", is_dev_dep = False),\n struct(repo=\"rust_crates__tock-registers-0.9.0\", is_dev_dep = False),\n struct(repo=\"rust_crates__tokio-1.52.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__tokio-util-0.7.18\", is_dev_dep = False),\n struct(repo=\"rust_crates__vcell-0.1.3\", is_dev_dep = False),\n struct(repo=\"rust_crates__zerocopy-0.8.50\", is_dev_dep = False),\n struct(repo=\"rust_crates__zeroize-1.8.2\", is_dev_dep = False),\n ]\n" } } }, @@ -2978,20 +3014,20 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"anstyle_wincon\",\n deps = [\n \"@rust_crates__anstyle-1.0.14//:anstyle\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=anstyle-wincon\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\": [],\n \"@rules_rust//rust/platform:thumbv7em-none-eabi\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"3.0.11\",\n)\n" } }, - "rust_crates__anyhow-1.0.102": { + "rust_crates__anyhow-1.0.103": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "7f202df86484c868dbad7eaa557ef785d5c66295e41b460ef922eca0723b842c", + "sha256": "2a4385e2e34eb35d6b3efe798b9eb88096925d87726c0798709bf56d9ed84af3", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/anyhow/1.0.102/download" + "https://static.crates.io/crates/anyhow/1.0.103/download" ], - "strip_prefix": "anyhow-1.0.102", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"anyhow\",\n deps = [\n \"@rust_crates__anyhow-1.0.102//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=anyhow\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\": [],\n \"@rules_rust//rust/platform:thumbv7em-none-eabi\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.0.102\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"anyhow\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=anyhow\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"1.0.102\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "strip_prefix": "anyhow-1.0.103", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"anyhow\",\n deps = [\n \"@rust_crates__anyhow-1.0.103//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=anyhow\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\": [],\n \"@rules_rust//rust/platform:thumbv7em-none-eabi\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.0.103\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"anyhow\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=anyhow\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"1.0.103\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "rust_crates__as-slice-0.2.1": { @@ -3327,7 +3363,7 @@ "https://static.crates.io/crates/cortex-m/0.7.7/download" ], "strip_prefix": "cortex-m-0.7.7", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"cortex_m\",\n deps = [\n \"@rust_crates__bare-metal-0.2.5//:bare_metal\",\n \"@rust_crates__bitfield-0.13.2//:bitfield\",\n \"@rust_crates__cortex-m-0.7.7//:build_script_build\",\n \"@rust_crates__embedded-hal-0.2.7//:embedded_hal\",\n \"@rust_crates__volatile-register-0.2.2//:volatile_register\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=cortex-m\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\": [],\n \"@rules_rust//rust/platform:thumbv7em-none-eabi\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.7.7\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2018\",\n links = \"cortex-m\",\n pkg_name = \"cortex-m\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=cortex-m\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.7.7\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"cortex_m\",\n deps = [\n \"@rust_crates__bare-metal-0.2.5//:bare_metal\",\n \"@rust_crates__bitfield-0.13.2//:bitfield\",\n \"@rust_crates__cortex-m-0.7.7//:build_script_build\",\n \"@rust_crates__critical-section-1.2.0//:critical_section\",\n \"@rust_crates__embedded-hal-0.2.7//:embedded_hal\",\n \"@rust_crates__volatile-register-0.2.2//:volatile_register\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"critical-section\",\n \"critical-section-single-core\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=cortex-m\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\": [],\n \"@rules_rust//rust/platform:thumbv7em-none-eabi\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.7.7\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"critical-section\",\n \"critical-section-single-core\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2018\",\n links = \"cortex-m\",\n pkg_name = \"cortex-m\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=cortex-m\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.7.7\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "rust_crates__cortex-m-rt-0.7.5": { @@ -3455,7 +3491,7 @@ "https://static.crates.io/crates/critical-section/1.2.0/download" ], "strip_prefix": "critical-section-1.2.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"critical_section\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=critical-section\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\": [],\n \"@rules_rust//rust/platform:thumbv7em-none-eabi\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.2.0\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"critical_section\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"restore-state-bool\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=critical-section\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\": [],\n \"@rules_rust//rust/platform:thumbv7em-none-eabi\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.2.0\",\n)\n" } }, "rust_crates__crypto-bigint-0.5.5": { @@ -4839,7 +4875,7 @@ "https://static.crates.io/crates/prost-derive/0.13.5/download" ], "strip_prefix": "prost-derive-0.13.5", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"prost_derive\",\n deps = [\n \"@rust_crates__anyhow-1.0.102//:anyhow\",\n \"@rust_crates__itertools-0.14.0//:itertools\",\n \"@rust_crates__proc-macro2-1.0.106//:proc_macro2\",\n \"@rust_crates__quote-1.0.45//:quote\",\n \"@rust_crates__syn-2.0.117//:syn\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=prost-derive\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\": [],\n \"@rules_rust//rust/platform:thumbv7em-none-eabi\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.13.5\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'openprot'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"prost_derive\",\n deps = [\n \"@rust_crates__anyhow-1.0.103//:anyhow\",\n \"@rust_crates__itertools-0.14.0//:itertools\",\n \"@rust_crates__proc-macro2-1.0.106//:proc_macro2\",\n \"@rust_crates__quote-1.0.45//:quote\",\n \"@rust_crates__syn-2.0.117//:syn\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=prost-derive\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:riscv32imc-unknown-none-elf\": [],\n \"@rules_rust//rust/platform:thumbv7em-none-eabi\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.13.5\",\n)\n" } }, "rust_crates__quote-1.0.45": { @@ -7060,9 +7096,9 @@ "repoRuleId": "@@rules_rust+//crate_universe:extensions.bzl%_generate_repo", "attributes": { "contents": { - "BUILD.bazel": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\npackage(default_visibility = [\"//visibility:public\"])\n\nexports_files(\n [\n \"cargo-bazel.json\",\n \"crates.bzl\",\n \"defs.bzl\",\n ] + glob(\n allow_empty = True,\n include = [\"*.bazel\"],\n ),\n)\n\nfilegroup(\n name = \"srcs\",\n srcs = glob(\n allow_empty = True,\n include = [\n \"*.bazel\",\n \"*.bzl\",\n ],\n ),\n)\n\n# Workspace Member Dependencies\nalias(\n name = \"anyhow-1.0.102\",\n actual = \"@crates_std__anyhow-1.0.102//:anyhow\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"anyhow\",\n actual = \"@crates_std__anyhow-1.0.102//:anyhow\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"bitfield-struct-0.12.1\",\n actual = \"@crates_std__bitfield-struct-0.12.1//:bitfield_struct\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"bitfield-struct\",\n actual = \"@crates_std__bitfield-struct-0.12.1//:bitfield_struct\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"bitflags-2.11.1\",\n actual = \"@crates_std__bitflags-2.11.1//:bitflags\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"bitflags\",\n actual = \"@crates_std__bitflags-2.11.1//:bitflags\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"byteorder-1.5.0\",\n actual = \"@crates_std__byteorder-1.5.0//:byteorder\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"byteorder\",\n actual = \"@crates_std__byteorder-1.5.0//:byteorder\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"clap-4.6.1\",\n actual = \"@crates_std__clap-4.6.1//:clap\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"clap\",\n actual = \"@crates_std__clap-4.6.1//:clap\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cliclack-0.3.8\",\n actual = \"@crates_std__cliclack-0.3.8//:cliclack\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cliclack\",\n actual = \"@crates_std__cliclack-0.3.8//:cliclack\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cortex-m-0.7.7\",\n actual = \"@crates_std__cortex-m-0.7.7//:cortex_m\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cortex-m\",\n actual = \"@crates_std__cortex-m-0.7.7//:cortex_m\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cortex-m-rt-0.7.5\",\n actual = \"@crates_std__cortex-m-rt-0.7.5//:cortex_m_rt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cortex-m-rt\",\n actual = \"@crates_std__cortex-m-rt-0.7.5//:cortex_m_rt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cortex-m-semihosting-0.5.0\",\n actual = \"@crates_std__cortex-m-semihosting-0.5.0//:cortex_m_semihosting\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cortex-m-semihosting\",\n actual = \"@crates_std__cortex-m-semihosting-0.5.0//:cortex_m_semihosting\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"embedded-io-0.6.1\",\n actual = \"@crates_std__embedded-io-0.6.1//:embedded_io\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"embedded-io\",\n actual = \"@crates_std__embedded-io-0.6.1//:embedded_io\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"futures-0.3.32\",\n actual = \"@crates_std__futures-0.3.32//:futures\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"futures\",\n actual = \"@crates_std__futures-0.3.32//:futures\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hashlink-0.10.0\",\n actual = \"@crates_std__hashlink-0.10.0//:hashlink\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hashlink\",\n actual = \"@crates_std__hashlink-0.10.0//:hashlink\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hex-0.4.3\",\n actual = \"@crates_std__hex-0.4.3//:hex\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hex\",\n actual = \"@crates_std__hex-0.4.3//:hex\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"intrusive-collections-0.9.7\",\n actual = \"@crates_std__intrusive-collections-0.9.7//:intrusive_collections\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"intrusive-collections\",\n actual = \"@crates_std__intrusive-collections-0.9.7//:intrusive_collections\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"libc-0.2.186\",\n actual = \"@crates_std__libc-0.2.186//:libc\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"libc\",\n actual = \"@crates_std__libc-0.2.186//:libc\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"minijinja-2.19.0\",\n actual = \"@crates_std__minijinja-2.19.0//:minijinja\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"minijinja\",\n actual = \"@crates_std__minijinja-2.19.0//:minijinja\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"nix-0.29.0\",\n actual = \"@crates_std__nix-0.29.0//:nix\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"nix\",\n actual = \"@crates_std__nix-0.29.0//:nix\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"nom-7.1.3\",\n actual = \"@crates_std__nom-7.1.3//:nom\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"nom\",\n actual = \"@crates_std__nom-7.1.3//:nom\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"object-0.36.7\",\n actual = \"@crates_std__object-0.36.7//:object\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"object\",\n actual = \"@crates_std__object-0.36.7//:object\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"panic-halt-1.0.0\",\n actual = \"@crates_std__panic-halt-1.0.0//:panic_halt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"panic-halt\",\n actual = \"@crates_std__panic-halt-1.0.0//:panic_halt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"paste-1.0.15\",\n actual = \"@crates_std__paste-1.0.15//:paste\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"paste\",\n actual = \"@crates_std__paste-1.0.15//:paste\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"proc-macro2-1.0.106\",\n actual = \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"proc-macro2\",\n actual = \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"prost-0.14.3\",\n actual = \"@crates_std__prost-0.14.3//:prost\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"prost\",\n actual = \"@crates_std__prost-0.14.3//:prost\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"prost-types-0.14.3\",\n actual = \"@crates_std__prost-types-0.14.3//:prost_types\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"prost-types\",\n actual = \"@crates_std__prost-types-0.14.3//:prost_types\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"protoc-gen-prost-0.5.0\",\n actual = \"@crates_std__protoc-gen-prost-0.5.0//:protoc_gen_prost\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"protoc-gen-prost\",\n actual = \"@crates_std__protoc-gen-prost-0.5.0//:protoc_gen_prost\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"psm-0.1.31\",\n actual = \"@crates_std__psm-0.1.31//:psm\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"psm\",\n actual = \"@crates_std__psm-0.1.31//:psm\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"quote-1.0.45\",\n actual = \"@crates_std__quote-1.0.45//:quote\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"quote\",\n actual = \"@crates_std__quote-1.0.45//:quote\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-0.12.1\",\n actual = \"@crates_std__riscv-0.12.1//:riscv\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv\",\n actual = \"@crates_std__riscv-0.12.1//:riscv\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-rt-0.12.2\",\n actual = \"@crates_std__riscv-rt-0.12.2//:riscv_rt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-rt\",\n actual = \"@crates_std__riscv-rt-0.12.2//:riscv_rt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-semihosting-0.1.3\",\n actual = \"@crates_std__riscv-semihosting-0.1.3//:riscv_semihosting\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-semihosting\",\n actual = \"@crates_std__riscv-semihosting-0.1.3//:riscv_semihosting\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"rustc-demangle-0.1.27\",\n actual = \"@crates_std__rustc-demangle-0.1.27//:rustc_demangle\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"rustc-demangle\",\n actual = \"@crates_std__rustc-demangle-0.1.27//:rustc_demangle\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde-1.0.228\",\n actual = \"@crates_std__serde-1.0.228//:serde\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde\",\n actual = \"@crates_std__serde-1.0.228//:serde\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde_json-1.0.149\",\n actual = \"@crates_std__serde_json-1.0.149//:serde_json\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde_json\",\n actual = \"@crates_std__serde_json-1.0.149//:serde_json\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde_json5-0.2.1\",\n actual = \"@crates_std__serde_json5-0.2.1//:serde_json5\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde_json5\",\n actual = \"@crates_std__serde_json5-0.2.1//:serde_json5\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"syn-2.0.117\",\n actual = \"@crates_std__syn-2.0.117//:syn\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"syn\",\n actual = \"@crates_std__syn-2.0.117//:syn\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"thiserror-2.0.18\",\n actual = \"@crates_std__thiserror-2.0.18//:thiserror\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"thiserror\",\n actual = \"@crates_std__thiserror-2.0.18//:thiserror\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tokio-1.52.1\",\n actual = \"@crates_std__tokio-1.52.1//:tokio\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tokio\",\n actual = \"@crates_std__tokio-1.52.1//:tokio\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tokio-util-0.7.18\",\n actual = \"@crates_std__tokio-util-0.7.18//:tokio_util\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tokio-util\",\n actual = \"@crates_std__tokio-util-0.7.18//:tokio_util\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"toml-0.8.23\",\n actual = \"@crates_std__toml-0.8.23//:toml\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"toml\",\n actual = \"@crates_std__toml-0.8.23//:toml\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zerocopy-0.8.48\",\n actual = \"@crates_std__zerocopy-0.8.48//:zerocopy\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zerocopy\",\n actual = \"@crates_std__zerocopy-0.8.48//:zerocopy\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zngur-0.7.0\",\n actual = \"@crates_std__zngur-0.7.0//:zngur\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zngur\",\n actual = \"@crates_std__zngur-0.7.0//:zngur\",\n tags = [\"manual\"],\n)\n\n# Binaries\nalias(\n name = \"protoc-gen-prost__protoc-gen-prost\",\n actual = \"@crates_std__protoc-gen-prost-0.5.0//:protoc-gen-prost__bin\",\n tags = [\"manual\"],\n)\n", + "BUILD.bazel": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\npackage(default_visibility = [\"//visibility:public\"])\n\nexports_files(\n [\n \"cargo-bazel.json\",\n \"crates.bzl\",\n \"defs.bzl\",\n ] + glob(\n allow_empty = True,\n include = [\"*.bazel\"],\n ),\n)\n\nfilegroup(\n name = \"srcs\",\n srcs = glob(\n allow_empty = True,\n include = [\n \"*.bazel\",\n \"*.bzl\",\n ],\n ),\n)\n\n# Workspace Member Dependencies\nalias(\n name = \"anyhow-1.0.102\",\n actual = \"@crates_std__anyhow-1.0.102//:anyhow\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"anyhow\",\n actual = \"@crates_std__anyhow-1.0.102//:anyhow\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"bitfield-struct-0.12.1\",\n actual = \"@crates_std__bitfield-struct-0.12.1//:bitfield_struct\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"bitfield-struct\",\n actual = \"@crates_std__bitfield-struct-0.12.1//:bitfield_struct\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"bitflags-2.13.0\",\n actual = \"@crates_std__bitflags-2.13.0//:bitflags\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"bitflags\",\n actual = \"@crates_std__bitflags-2.13.0//:bitflags\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"byteorder-1.5.0\",\n actual = \"@crates_std__byteorder-1.5.0//:byteorder\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"byteorder\",\n actual = \"@crates_std__byteorder-1.5.0//:byteorder\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"clap-4.6.1\",\n actual = \"@crates_std__clap-4.6.1//:clap\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"clap\",\n actual = \"@crates_std__clap-4.6.1//:clap\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cliclack-0.3.8\",\n actual = \"@crates_std__cliclack-0.3.8//:cliclack\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cliclack\",\n actual = \"@crates_std__cliclack-0.3.8//:cliclack\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cortex-m-0.7.7\",\n actual = \"@crates_std__cortex-m-0.7.7//:cortex_m\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cortex-m\",\n actual = \"@crates_std__cortex-m-0.7.7//:cortex_m\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cortex-m-rt-0.7.5\",\n actual = \"@crates_std__cortex-m-rt-0.7.5//:cortex_m_rt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cortex-m-rt\",\n actual = \"@crates_std__cortex-m-rt-0.7.5//:cortex_m_rt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cortex-m-semihosting-0.5.0\",\n actual = \"@crates_std__cortex-m-semihosting-0.5.0//:cortex_m_semihosting\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"cortex-m-semihosting\",\n actual = \"@crates_std__cortex-m-semihosting-0.5.0//:cortex_m_semihosting\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"embedded-io-0.6.1\",\n actual = \"@crates_std__embedded-io-0.6.1//:embedded_io\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"embedded-io\",\n actual = \"@crates_std__embedded-io-0.6.1//:embedded_io\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"futures-0.3.32\",\n actual = \"@crates_std__futures-0.3.32//:futures\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"futures\",\n actual = \"@crates_std__futures-0.3.32//:futures\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hashlink-0.10.0\",\n actual = \"@crates_std__hashlink-0.10.0//:hashlink\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hashlink\",\n actual = \"@crates_std__hashlink-0.10.0//:hashlink\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hex-0.4.3\",\n actual = \"@crates_std__hex-0.4.3//:hex\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"hex\",\n actual = \"@crates_std__hex-0.4.3//:hex\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"intrusive-collections-0.9.7\",\n actual = \"@crates_std__intrusive-collections-0.9.7//:intrusive_collections\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"intrusive-collections\",\n actual = \"@crates_std__intrusive-collections-0.9.7//:intrusive_collections\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"libc-0.2.186\",\n actual = \"@crates_std__libc-0.2.186//:libc\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"libc\",\n actual = \"@crates_std__libc-0.2.186//:libc\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"minijinja-2.20.0\",\n actual = \"@crates_std__minijinja-2.20.0//:minijinja\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"minijinja\",\n actual = \"@crates_std__minijinja-2.20.0//:minijinja\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"nix-0.29.0\",\n actual = \"@crates_std__nix-0.29.0//:nix\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"nix\",\n actual = \"@crates_std__nix-0.29.0//:nix\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"nom-7.1.3\",\n actual = \"@crates_std__nom-7.1.3//:nom\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"nom\",\n actual = \"@crates_std__nom-7.1.3//:nom\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"object-0.36.7\",\n actual = \"@crates_std__object-0.36.7//:object\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"object\",\n actual = \"@crates_std__object-0.36.7//:object\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"panic-halt-1.0.0\",\n actual = \"@crates_std__panic-halt-1.0.0//:panic_halt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"panic-halt\",\n actual = \"@crates_std__panic-halt-1.0.0//:panic_halt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"paste-1.0.15\",\n actual = \"@crates_std__paste-1.0.15//:paste\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"paste\",\n actual = \"@crates_std__paste-1.0.15//:paste\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"proc-macro2-1.0.106\",\n actual = \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"proc-macro2\",\n actual = \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"prost-0.14.3\",\n actual = \"@crates_std__prost-0.14.3//:prost\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"prost\",\n actual = \"@crates_std__prost-0.14.3//:prost\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"prost-reflect-0.16.4\",\n actual = \"@crates_std__prost-reflect-0.16.4//:prost_reflect\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"prost-reflect\",\n actual = \"@crates_std__prost-reflect-0.16.4//:prost_reflect\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"prost-types-0.14.3\",\n actual = \"@crates_std__prost-types-0.14.3//:prost_types\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"prost-types\",\n actual = \"@crates_std__prost-types-0.14.3//:prost_types\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"protoc-gen-prost-0.5.0\",\n actual = \"@crates_std__protoc-gen-prost-0.5.0//:protoc_gen_prost\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"protoc-gen-prost\",\n actual = \"@crates_std__protoc-gen-prost-0.5.0//:protoc_gen_prost\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"psm-0.1.31\",\n actual = \"@crates_std__psm-0.1.31//:psm\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"psm\",\n actual = \"@crates_std__psm-0.1.31//:psm\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"quote-1.0.45\",\n actual = \"@crates_std__quote-1.0.45//:quote\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"quote\",\n actual = \"@crates_std__quote-1.0.45//:quote\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-0.12.1\",\n actual = \"@crates_std__riscv-0.12.1//:riscv\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv\",\n actual = \"@crates_std__riscv-0.12.1//:riscv\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-rt-0.12.2\",\n actual = \"@crates_std__riscv-rt-0.12.2//:riscv_rt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-rt\",\n actual = \"@crates_std__riscv-rt-0.12.2//:riscv_rt\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-semihosting-0.1.3\",\n actual = \"@crates_std__riscv-semihosting-0.1.3//:riscv_semihosting\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"riscv-semihosting\",\n actual = \"@crates_std__riscv-semihosting-0.1.3//:riscv_semihosting\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"rustc-demangle-0.1.27\",\n actual = \"@crates_std__rustc-demangle-0.1.27//:rustc_demangle\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"rustc-demangle\",\n actual = \"@crates_std__rustc-demangle-0.1.27//:rustc_demangle\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde-1.0.228\",\n actual = \"@crates_std__serde-1.0.228//:serde\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde\",\n actual = \"@crates_std__serde-1.0.228//:serde\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde_json-1.0.150\",\n actual = \"@crates_std__serde_json-1.0.150//:serde_json\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde_json\",\n actual = \"@crates_std__serde_json-1.0.150//:serde_json\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde_json5-0.2.1\",\n actual = \"@crates_std__serde_json5-0.2.1//:serde_json5\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"serde_json5\",\n actual = \"@crates_std__serde_json5-0.2.1//:serde_json5\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"syn-2.0.117\",\n actual = \"@crates_std__syn-2.0.117//:syn\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"syn\",\n actual = \"@crates_std__syn-2.0.117//:syn\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"thiserror-2.0.18\",\n actual = \"@crates_std__thiserror-2.0.18//:thiserror\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"thiserror\",\n actual = \"@crates_std__thiserror-2.0.18//:thiserror\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tokio-1.52.3\",\n actual = \"@crates_std__tokio-1.52.3//:tokio\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tokio\",\n actual = \"@crates_std__tokio-1.52.3//:tokio\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tokio-util-0.7.18\",\n actual = \"@crates_std__tokio-util-0.7.18//:tokio_util\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"tokio-util\",\n actual = \"@crates_std__tokio-util-0.7.18//:tokio_util\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"toml-0.8.23\",\n actual = \"@crates_std__toml-0.8.23//:toml\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"toml\",\n actual = \"@crates_std__toml-0.8.23//:toml\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zerocopy-0.8.50\",\n actual = \"@crates_std__zerocopy-0.8.50//:zerocopy\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zerocopy\",\n actual = \"@crates_std__zerocopy-0.8.50//:zerocopy\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zngur-0.10.0\",\n actual = \"@crates_std__zngur-0.10.0//:zngur\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zngur\",\n actual = \"@crates_std__zngur-0.10.0//:zngur\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zngur-lib-0.10.0\",\n actual = \"@crates_std__zngur-lib-0.10.0//:zngur_lib\",\n tags = [\"manual\"],\n)\n\nalias(\n name = \"zngur-lib\",\n actual = \"@crates_std__zngur-lib-0.10.0//:zngur_lib\",\n tags = [\"manual\"],\n)\n\n# Binaries\nalias(\n name = \"protoc-gen-prost__protoc-gen-prost\",\n actual = \"@crates_std__protoc-gen-prost-0.5.0//:protoc-gen-prost__bin\",\n tags = [\"manual\"],\n)\n", "alias_rules.bzl": "\"\"\"Alias that transitions its target to `compilation_mode=opt`. Use `transition_alias=\"opt\"` to enable.\"\"\"\n\nload(\"@rules_cc//cc:defs.bzl\", \"CcInfo\")\nload(\"@rules_rust//rust:rust_common.bzl\", \"COMMON_PROVIDERS\")\n\ndef _transition_alias_impl(ctx):\n # `ctx.attr.actual` is a list of 1 item due to the transition\n providers = [ctx.attr.actual[0][provider] for provider in COMMON_PROVIDERS]\n if CcInfo in ctx.attr.actual[0]:\n providers.append(ctx.attr.actual[0][CcInfo])\n return providers\n\ndef _change_compilation_mode(compilation_mode):\n def _change_compilation_mode_impl(_settings, _attr):\n return {\n \"//command_line_option:compilation_mode\": compilation_mode,\n }\n\n return transition(\n implementation = _change_compilation_mode_impl,\n inputs = [],\n outputs = [\n \"//command_line_option:compilation_mode\",\n ],\n )\n\ndef _transition_alias_rule(compilation_mode):\n return rule(\n implementation = _transition_alias_impl,\n provides = COMMON_PROVIDERS,\n attrs = {\n \"actual\": attr.label(\n mandatory = True,\n doc = \"`rust_library()` target to transition to `compilation_mode=opt`.\",\n providers = COMMON_PROVIDERS,\n cfg = _change_compilation_mode(compilation_mode),\n ),\n \"_allowlist_function_transition\": attr.label(\n default = \"@bazel_tools//tools/allowlists/function_transition_allowlist\",\n ),\n },\n doc = \"Transitions a Rust library crate to the `compilation_mode=opt`.\",\n )\n\ntransition_alias_dbg = _transition_alias_rule(\"dbg\")\ntransition_alias_fastbuild = _transition_alias_rule(\"fastbuild\")\ntransition_alias_opt = _transition_alias_rule(\"opt\")\n", - "defs.bzl": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\"\"\"\n# `crates_repository` API\n\n- [aliases](#aliases)\n- [crate_deps](#crate_deps)\n- [all_crate_deps](#all_crate_deps)\n- [crate_repositories](#crate_repositories)\n\n\"\"\"\n\nload(\"@bazel_tools//tools/build_defs/repo:git.bzl\", \"git_repository\")\nload(\"@bazel_tools//tools/build_defs/repo:http.bzl\", \"http_archive\")\nload(\"@bazel_tools//tools/build_defs/repo:utils.bzl\", \"maybe\")\nload(\"@bazel_skylib//lib:selects.bzl\", \"selects\")\nload(\"@rules_rust//crate_universe/private:local_crate_mirror.bzl\", \"local_crate_mirror\")\n\n###############################################################################\n# MACROS API\n###############################################################################\n\n# An identifier that represent common dependencies (unconditional).\n_COMMON_CONDITION = \"\"\n\ndef _flatten_dependency_maps(all_dependency_maps):\n \"\"\"Flatten a list of dependency maps into one dictionary.\n\n Dependency maps have the following structure:\n\n ```python\n DEPENDENCIES_MAP = {\n # The first key in the map is a Bazel package\n # name of the workspace this file is defined in.\n \"workspace_member_package\": {\n\n # Not all dependencies are supported for all platforms.\n # the condition key is the condition required to be true\n # on the host platform.\n \"condition\": {\n\n # An alias to a crate target. # The label of the crate target the\n # Aliases are only crate names. # package name refers to.\n \"package_name\": \"@full//:label\",\n }\n }\n }\n ```\n\n Args:\n all_dependency_maps (list): A list of dicts as described above\n\n Returns:\n dict: A dictionary as described above\n \"\"\"\n dependencies = {}\n\n for workspace_deps_map in all_dependency_maps:\n for pkg_name, conditional_deps_map in workspace_deps_map.items():\n if pkg_name not in dependencies:\n non_frozen_map = dict()\n for key, values in conditional_deps_map.items():\n non_frozen_map.update({key: dict(values.items())})\n dependencies.setdefault(pkg_name, non_frozen_map)\n continue\n\n for condition, deps_map in conditional_deps_map.items():\n # If the condition has not been recorded, do so and continue\n if condition not in dependencies[pkg_name]:\n dependencies[pkg_name].setdefault(condition, dict(deps_map.items()))\n continue\n\n # Alert on any miss-matched dependencies\n inconsistent_entries = []\n for crate_name, crate_label in deps_map.items():\n existing = dependencies[pkg_name][condition].get(crate_name)\n if existing and existing != crate_label:\n inconsistent_entries.append((crate_name, existing, crate_label))\n dependencies[pkg_name][condition].update({crate_name: crate_label})\n\n return dependencies\n\ndef crate_deps(deps, package_name = None):\n \"\"\"Finds the fully qualified label of the requested crates for the package where this macro is called.\n\n Args:\n deps (list): The desired list of crate targets.\n package_name (str, optional): The package name of the set of dependencies to look up.\n Defaults to `native.package_name()`.\n\n Returns:\n list: A list of labels to generated rust targets (str)\n \"\"\"\n\n if not deps:\n return []\n\n if package_name == None:\n package_name = native.package_name()\n\n # Join both sets of dependencies\n dependencies = _flatten_dependency_maps([\n _NORMAL_DEPENDENCIES,\n _NORMAL_DEV_DEPENDENCIES,\n _PROC_MACRO_DEPENDENCIES,\n _PROC_MACRO_DEV_DEPENDENCIES,\n _BUILD_DEPENDENCIES,\n _BUILD_PROC_MACRO_DEPENDENCIES,\n ]).pop(package_name, {})\n\n # Combine all conditional packages so we can easily index over a flat list\n # TODO: Perhaps this should actually return select statements and maintain\n # the conditionals of the dependencies\n flat_deps = {}\n for deps_set in dependencies.values():\n for crate_name, crate_label in deps_set.items():\n flat_deps.update({crate_name: crate_label})\n\n missing_crates = []\n crate_targets = []\n for crate_target in deps:\n if crate_target not in flat_deps:\n missing_crates.append(crate_target)\n else:\n crate_targets.append(flat_deps[crate_target])\n\n if missing_crates:\n fail(\"Could not find crates `{}` among dependencies of `{}`. Available dependencies were `{}`\".format(\n missing_crates,\n package_name,\n dependencies,\n ))\n\n return crate_targets\n\ndef all_crate_deps(\n normal = False, \n normal_dev = False, \n proc_macro = False, \n proc_macro_dev = False,\n build = False,\n build_proc_macro = False,\n package_name = None):\n \"\"\"Finds the fully qualified label of all requested direct crate dependencies \\\n for the package where this macro is called.\n\n If no parameters are set, all normal dependencies are returned. Setting any one flag will\n otherwise impact the contents of the returned list.\n\n Args:\n normal (bool, optional): If True, normal dependencies are included in the\n output list.\n normal_dev (bool, optional): If True, normal dev dependencies will be\n included in the output list.\n proc_macro (bool, optional): If True, proc_macro dependencies are included\n in the output list.\n proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are\n included in the output list.\n build (bool, optional): If True, build dependencies are included\n in the output list.\n build_proc_macro (bool, optional): If True, build proc_macro dependencies are\n included in the output list.\n package_name (str, optional): The package name of the set of dependencies to look up.\n Defaults to `native.package_name()` when unset.\n\n Returns:\n list: A list of labels to generated rust targets (str)\n \"\"\"\n\n if package_name == None:\n package_name = native.package_name()\n\n # Determine the relevant maps to use\n all_dependency_maps = []\n if normal:\n all_dependency_maps.append(_NORMAL_DEPENDENCIES)\n if normal_dev:\n all_dependency_maps.append(_NORMAL_DEV_DEPENDENCIES)\n if proc_macro:\n all_dependency_maps.append(_PROC_MACRO_DEPENDENCIES)\n if proc_macro_dev:\n all_dependency_maps.append(_PROC_MACRO_DEV_DEPENDENCIES)\n if build:\n all_dependency_maps.append(_BUILD_DEPENDENCIES)\n if build_proc_macro:\n all_dependency_maps.append(_BUILD_PROC_MACRO_DEPENDENCIES)\n\n # Default to always using normal dependencies\n if not all_dependency_maps:\n all_dependency_maps.append(_NORMAL_DEPENDENCIES)\n\n dependencies = _flatten_dependency_maps(all_dependency_maps).pop(package_name, None)\n\n if not dependencies:\n if dependencies == None:\n fail(\"Tried to get all_crate_deps for package \" + package_name + \" but that package had no Cargo.toml file\")\n else:\n return []\n\n crate_deps = list(dependencies.pop(_COMMON_CONDITION, {}).values())\n for condition, deps in dependencies.items():\n crate_deps += selects.with_or({\n tuple(_CONDITIONS[condition]): deps.values(),\n \"//conditions:default\": [],\n })\n\n return crate_deps\n\ndef aliases(\n normal = False,\n normal_dev = False,\n proc_macro = False,\n proc_macro_dev = False,\n build = False,\n build_proc_macro = False,\n package_name = None):\n \"\"\"Produces a map of Crate alias names to their original label\n\n If no dependency kinds are specified, `normal` and `proc_macro` are used by default.\n Setting any one flag will otherwise determine the contents of the returned dict.\n\n Args:\n normal (bool, optional): If True, normal dependencies are included in the\n output list.\n normal_dev (bool, optional): If True, normal dev dependencies will be\n included in the output list..\n proc_macro (bool, optional): If True, proc_macro dependencies are included\n in the output list.\n proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are\n included in the output list.\n build (bool, optional): If True, build dependencies are included\n in the output list.\n build_proc_macro (bool, optional): If True, build proc_macro dependencies are\n included in the output list.\n package_name (str, optional): The package name of the set of dependencies to look up.\n Defaults to `native.package_name()` when unset.\n\n Returns:\n dict: The aliases of all associated packages\n \"\"\"\n if package_name == None:\n package_name = native.package_name()\n\n # Determine the relevant maps to use\n all_aliases_maps = []\n if normal:\n all_aliases_maps.append(_NORMAL_ALIASES)\n if normal_dev:\n all_aliases_maps.append(_NORMAL_DEV_ALIASES)\n if proc_macro:\n all_aliases_maps.append(_PROC_MACRO_ALIASES)\n if proc_macro_dev:\n all_aliases_maps.append(_PROC_MACRO_DEV_ALIASES)\n if build:\n all_aliases_maps.append(_BUILD_ALIASES)\n if build_proc_macro:\n all_aliases_maps.append(_BUILD_PROC_MACRO_ALIASES)\n\n # Default to always using normal aliases\n if not all_aliases_maps:\n all_aliases_maps.append(_NORMAL_ALIASES)\n all_aliases_maps.append(_PROC_MACRO_ALIASES)\n\n aliases = _flatten_dependency_maps(all_aliases_maps).pop(package_name, None)\n\n if not aliases:\n return dict()\n\n common_items = aliases.pop(_COMMON_CONDITION, {}).items()\n\n # If there are only common items in the dictionary, immediately return them\n if not len(aliases.keys()) == 1:\n return dict(common_items)\n\n # Build a single select statement where each conditional has accounted for the\n # common set of aliases.\n crate_aliases = {\"//conditions:default\": dict(common_items)}\n for condition, deps in aliases.items():\n condition_triples = _CONDITIONS[condition]\n for triple in condition_triples:\n if triple in crate_aliases:\n crate_aliases[triple].update(deps)\n else:\n crate_aliases.update({triple: dict(deps.items() + common_items)})\n\n return select(crate_aliases)\n\n###############################################################################\n# WORKSPACE MEMBER DEPS AND ALIASES\n###############################################################################\n\n_NORMAL_DEPENDENCIES = {\n \"third_party/crates_io/crates_std\": {\n _COMMON_CONDITION: {\n \"anyhow\": Label(\"@crates_std//:anyhow-1.0.102\"),\n \"bitflags\": Label(\"@crates_std//:bitflags-2.11.1\"),\n \"byteorder\": Label(\"@crates_std//:byteorder-1.5.0\"),\n \"clap\": Label(\"@crates_std//:clap-4.6.1\"),\n \"cliclack\": Label(\"@crates_std//:cliclack-0.3.8\"),\n \"cortex-m\": Label(\"@crates_std//:cortex-m-0.7.7\"),\n \"cortex-m-rt\": Label(\"@crates_std//:cortex-m-rt-0.7.5\"),\n \"cortex-m-semihosting\": Label(\"@crates_std//:cortex-m-semihosting-0.5.0\"),\n \"embedded-io\": Label(\"@crates_std//:embedded-io-0.6.1\"),\n \"futures\": Label(\"@crates_std//:futures-0.3.32\"),\n \"hashlink\": Label(\"@crates_std//:hashlink-0.10.0\"),\n \"hex\": Label(\"@crates_std//:hex-0.4.3\"),\n \"intrusive-collections\": Label(\"@crates_std//:intrusive-collections-0.9.7\"),\n \"libc\": Label(\"@crates_std//:libc-0.2.186\"),\n \"minijinja\": Label(\"@crates_std//:minijinja-2.19.0\"),\n \"nix\": Label(\"@crates_std//:nix-0.29.0\"),\n \"nom\": Label(\"@crates_std//:nom-7.1.3\"),\n \"object\": Label(\"@crates_std//:object-0.36.7\"),\n \"panic-halt\": Label(\"@crates_std//:panic-halt-1.0.0\"),\n \"proc-macro2\": Label(\"@crates_std//:proc-macro2-1.0.106\"),\n \"prost\": Label(\"@crates_std//:prost-0.14.3\"),\n \"prost-types\": Label(\"@crates_std//:prost-types-0.14.3\"),\n \"protoc-gen-prost\": Label(\"@crates_std//:protoc-gen-prost-0.5.0\"),\n \"psm\": Label(\"@crates_std//:psm-0.1.31\"),\n \"quote\": Label(\"@crates_std//:quote-1.0.45\"),\n \"riscv\": Label(\"@crates_std//:riscv-0.12.1\"),\n \"riscv-rt\": Label(\"@crates_std//:riscv-rt-0.12.2\"),\n \"riscv-semihosting\": Label(\"@crates_std//:riscv-semihosting-0.1.3\"),\n \"rustc-demangle\": Label(\"@crates_std//:rustc-demangle-0.1.27\"),\n \"serde\": Label(\"@crates_std//:serde-1.0.228\"),\n \"serde_json\": Label(\"@crates_std//:serde_json-1.0.149\"),\n \"serde_json5\": Label(\"@crates_std//:serde_json5-0.2.1\"),\n \"syn\": Label(\"@crates_std//:syn-2.0.117\"),\n \"thiserror\": Label(\"@crates_std//:thiserror-2.0.18\"),\n \"tokio\": Label(\"@crates_std//:tokio-1.52.1\"),\n \"tokio-util\": Label(\"@crates_std//:tokio-util-0.7.18\"),\n \"toml\": Label(\"@crates_std//:toml-0.8.23\"),\n \"zerocopy\": Label(\"@crates_std//:zerocopy-0.8.48\"),\n \"zngur\": Label(\"@crates_std//:zngur-0.7.0\"),\n },\n },\n}\n\n\n_NORMAL_ALIASES = {\n \"third_party/crates_io/crates_std\": {\n _COMMON_CONDITION: {\n },\n },\n}\n\n\n_NORMAL_DEV_DEPENDENCIES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_NORMAL_DEV_ALIASES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_PROC_MACRO_DEPENDENCIES = {\n \"third_party/crates_io/crates_std\": {\n _COMMON_CONDITION: {\n \"bitfield-struct\": Label(\"@crates_std//:bitfield-struct-0.12.1\"),\n \"paste\": Label(\"@crates_std//:paste-1.0.15\"),\n },\n },\n}\n\n\n_PROC_MACRO_ALIASES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_PROC_MACRO_DEV_DEPENDENCIES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_PROC_MACRO_DEV_ALIASES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_BUILD_DEPENDENCIES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_BUILD_ALIASES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_BUILD_PROC_MACRO_DEPENDENCIES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_BUILD_PROC_MACRO_ALIASES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_CONDITIONS = {\n \"aarch64-apple-darwin\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n \"aarch64-linux-android\": [],\n \"aarch64-pc-windows-gnullvm\": [],\n \"aarch64-unknown-linux-gnu\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n \"arm64ec-pc-windows-msvc\": [],\n \"cfg(all(any(target_arch = \\\"x86_64\\\", target_arch = \\\"arm64ec\\\"), target_env = \\\"msvc\\\", not(windows_raw_dylib)))\": [],\n \"cfg(all(any(target_os = \\\"linux\\\", target_os = \\\"android\\\"), any(rustix_use_libc, miri, not(all(target_os = \\\"linux\\\", any(target_endian = \\\"little\\\", any(target_arch = \\\"s390x\\\", target_arch = \\\"powerpc\\\")), any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc\\\"), all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"s390x\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\")))))))\": [],\n \"cfg(all(any(target_os = \\\"linux\\\", target_os = \\\"android\\\"), not(any(all(target_os = \\\"linux\\\", target_env = \\\"\\\"), getrandom_backend = \\\"custom\\\", getrandom_backend = \\\"linux_raw\\\", getrandom_backend = \\\"rdrand\\\", getrandom_backend = \\\"rndr\\\"))))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(all(not(rustix_use_libc), not(miri), target_os = \\\"linux\\\", any(target_endian = \\\"little\\\", any(target_arch = \\\"s390x\\\", target_arch = \\\"powerpc\\\")), any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc\\\"), all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"s390x\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\"))))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \\\"linux\\\", any(target_endian = \\\"little\\\", any(target_arch = \\\"s390x\\\", target_arch = \\\"powerpc\\\")), any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc\\\"), all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"s390x\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\")))))))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-apple-darwin\"],\n \"cfg(all(target_arch = \\\"aarch64\\\", target_env = \\\"msvc\\\", not(windows_raw_dylib)))\": [],\n \"cfg(all(target_arch = \\\"aarch64\\\", target_os = \\\"linux\\\"))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n \"cfg(all(target_arch = \\\"aarch64\\\", target_vendor = \\\"apple\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n \"cfg(all(target_arch = \\\"loongarch64\\\", target_os = \\\"linux\\\"))\": [],\n \"cfg(all(target_arch = \\\"wasm32\\\", target_os = \\\"wasi\\\", target_env = \\\"p2\\\"))\": [],\n \"cfg(all(target_arch = \\\"wasm32\\\", target_os = \\\"wasi\\\", target_env = \\\"p3\\\"))\": [],\n \"cfg(all(target_arch = \\\"x86\\\", target_env = \\\"gnu\\\", not(target_abi = \\\"llvm\\\"), not(windows_raw_dylib)))\": [],\n \"cfg(all(target_arch = \\\"x86\\\", target_env = \\\"msvc\\\", not(windows_raw_dylib)))\": [],\n \"cfg(all(target_arch = \\\"x86_64\\\", target_env = \\\"gnu\\\", not(target_abi = \\\"llvm\\\"), not(windows_raw_dylib)))\": [\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(all(target_family = \\\"wasm\\\", target_os = \\\"unknown\\\"))\": [],\n \"cfg(all(target_os = \\\"uefi\\\", getrandom_backend = \\\"efi_rng\\\"))\": [],\n \"cfg(all(windows, not(target_arch = \\\"arm64ec\\\")))\": [],\n \"cfg(any())\": [],\n \"cfg(any(target_arch = \\\"aarch64\\\", target_arch = \\\"x86_64\\\", target_arch = \\\"x86\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(any(target_os = \\\"dragonfly\\\", target_os = \\\"freebsd\\\", target_os = \\\"hurd\\\", target_os = \\\"illumos\\\", target_os = \\\"cygwin\\\", all(target_os = \\\"horizon\\\", target_arch = \\\"arm\\\")))\": [],\n \"cfg(any(target_os = \\\"haiku\\\", target_os = \\\"redox\\\", target_os = \\\"nto\\\", target_os = \\\"aix\\\"))\": [],\n \"cfg(any(target_os = \\\"ios\\\", target_os = \\\"visionos\\\", target_os = \\\"watchos\\\", target_os = \\\"tvos\\\"))\": [],\n \"cfg(any(target_os = \\\"macos\\\", target_os = \\\"openbsd\\\", target_os = \\\"vita\\\", target_os = \\\"emscripten\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-apple-darwin\"],\n \"cfg(any(unix, target_os = \\\"hermit\\\", target_os = \\\"wasi\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(any(unix, target_os = \\\"wasi\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(target_os = \\\"hermit\\\")\": [],\n \"cfg(target_os = \\\"netbsd\\\")\": [],\n \"cfg(target_os = \\\"redox\\\")\": [],\n \"cfg(target_os = \\\"solaris\\\")\": [],\n \"cfg(target_os = \\\"vxworks\\\")\": [],\n \"cfg(target_os = \\\"wasi\\\")\": [],\n \"cfg(unix)\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(windows)\": [],\n \"i686-pc-windows-gnullvm\": [],\n \"x86_64-apple-darwin\": [\"@rules_rust//rust/platform:x86_64-apple-darwin\"],\n \"x86_64-pc-windows-gnullvm\": [],\n \"x86_64-unknown-linux-gnu\": [\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n}\n\n###############################################################################\n\ndef crate_repositories():\n \"\"\"A macro for defining repositories for all generated crates.\n\n Returns:\n A list of repos visible to the module through the module extension.\n \"\"\"\n maybe(\n http_archive,\n name = \"crates_std__adler2-2.0.1\",\n sha256 = \"320119579fcad9c21884f5c4861d16174d0e06250625266f50fe6898340abefa\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/adler2/2.0.1/download\"],\n strip_prefix = \"adler2-2.0.1\",\n build_file = Label(\"@crates_std//crates_std:BUILD.adler2-2.0.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__aho-corasick-1.1.4\",\n sha256 = \"ddd31a130427c27518df266943a5308ed92d4b226cc639f5a8f1002816174301\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/aho-corasick/1.1.4/download\"],\n strip_prefix = \"aho-corasick-1.1.4\",\n build_file = Label(\"@crates_std//crates_std:BUILD.aho-corasick-1.1.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__allocator-api2-0.2.21\",\n sha256 = \"683d7910e743518b0e34f1186f92494becacb047c7b6bf616c96772180fef923\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/allocator-api2/0.2.21/download\"],\n strip_prefix = \"allocator-api2-0.2.21\",\n build_file = Label(\"@crates_std//crates_std:BUILD.allocator-api2-0.2.21.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__anstream-1.0.0\",\n sha256 = \"824a212faf96e9acacdbd09febd34438f8f711fb84e09a8916013cd7815ca28d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstream/1.0.0/download\"],\n strip_prefix = \"anstream-1.0.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.anstream-1.0.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__anstyle-1.0.14\",\n sha256 = \"940b3a0ca603d1eade50a4846a2afffd5ef57a9feac2c0e2ec2e14f9ead76000\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle/1.0.14/download\"],\n strip_prefix = \"anstyle-1.0.14\",\n build_file = Label(\"@crates_std//crates_std:BUILD.anstyle-1.0.14.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__anstyle-parse-1.0.0\",\n sha256 = \"52ce7f38b242319f7cabaa6813055467063ecdc9d355bbb4ce0c68908cd8130e\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle-parse/1.0.0/download\"],\n strip_prefix = \"anstyle-parse-1.0.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.anstyle-parse-1.0.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__anstyle-query-1.1.5\",\n sha256 = \"40c48f72fd53cd289104fc64099abca73db4166ad86ea0b4341abe65af83dadc\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle-query/1.1.5/download\"],\n strip_prefix = \"anstyle-query-1.1.5\",\n build_file = Label(\"@crates_std//crates_std:BUILD.anstyle-query-1.1.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__anstyle-wincon-3.0.11\",\n sha256 = \"291e6a250ff86cd4a820112fb8898808a366d8f9f58ce16d1f538353ad55747d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle-wincon/3.0.11/download\"],\n strip_prefix = \"anstyle-wincon-3.0.11\",\n build_file = Label(\"@crates_std//crates_std:BUILD.anstyle-wincon-3.0.11.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__anyhow-1.0.102\",\n sha256 = \"7f202df86484c868dbad7eaa557ef785d5c66295e41b460ef922eca0723b842c\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anyhow/1.0.102/download\"],\n strip_prefix = \"anyhow-1.0.102\",\n build_file = Label(\"@crates_std//crates_std:BUILD.anyhow-1.0.102.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__ar_archive_writer-0.5.1\",\n sha256 = \"7eb93bbb63b9c227414f6eb3a0adfddca591a8ce1e9b60661bb08969b87e340b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/ar_archive_writer/0.5.1/download\"],\n strip_prefix = \"ar_archive_writer-0.5.1\",\n build_file = Label(\"@crates_std//crates_std:BUILD.ar_archive_writer-0.5.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__ariadne-0.3.0\",\n sha256 = \"72fe02fc62033df9ba41cba57ee19acf5e742511a140c7dbc3a873e19a19a1bd\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/ariadne/0.3.0/download\"],\n strip_prefix = \"ariadne-0.3.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.ariadne-0.3.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__autocfg-1.5.0\",\n sha256 = \"c08606f8c3cbf4ce6ec8e28fb0014a2c086708fe954eaa885384a6165172e7e8\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/autocfg/1.5.0/download\"],\n strip_prefix = \"autocfg-1.5.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.autocfg-1.5.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__bare-metal-0.2.5\",\n sha256 = \"5deb64efa5bd81e31fcd1938615a6d98c82eafcbcd787162b6f63b91d6bac5b3\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bare-metal/0.2.5/download\"],\n strip_prefix = \"bare-metal-0.2.5\",\n build_file = Label(\"@crates_std//crates_std:BUILD.bare-metal-0.2.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__bitfield-0.13.2\",\n sha256 = \"46afbd2983a5d5a7bd740ccb198caf5b82f45c40c09c0eed36052d91cb92e719\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bitfield/0.13.2/download\"],\n strip_prefix = \"bitfield-0.13.2\",\n build_file = Label(\"@crates_std//crates_std:BUILD.bitfield-0.13.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__bitfield-struct-0.12.1\",\n sha256 = \"8769c4854c5ada2852ddf6fd09d15cf43d4c2aaeccb4de6432f5402f08a6003b\",\n type = \"tar.gz\",\n urls = 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\"crates_std__winnow-0.7.15\",\n sha256 = \"df79d97927682d2fd8adb29682d1140b343be4ac0f08fd68b7765d9c059d3945\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/winnow/0.7.15/download\"],\n strip_prefix = \"winnow-0.7.15\",\n build_file = Label(\"@crates_std//crates_std:BUILD.winnow-0.7.15.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-bindgen-0.51.0\",\n sha256 = \"d7249219f66ced02969388cf2bb044a09756a083d0fab1e566056b04d9fbcaa5\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wit-bindgen/0.51.0/download\"],\n strip_prefix = \"wit-bindgen-0.51.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.wit-bindgen-0.51.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-bindgen-0.57.1\",\n sha256 = \"1ebf944e87a7c253233ad6766e082e3cd714b5d03812acc24c318f549614536e\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wit-bindgen/0.57.1/download\"],\n strip_prefix = \"wit-bindgen-0.57.1\",\n build_file = Label(\"@crates_std//crates_std:BUILD.wit-bindgen-0.57.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-bindgen-core-0.51.0\",\n sha256 = \"ea61de684c3ea68cb082b7a88508a8b27fcc8b797d738bfc99a82facf1d752dc\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wit-bindgen-core/0.51.0/download\"],\n strip_prefix = \"wit-bindgen-core-0.51.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.wit-bindgen-core-0.51.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-bindgen-rust-0.51.0\",\n sha256 = \"b7c566e0f4b284dd6561c786d9cb0142da491f46a9fbed79ea69cdad5db17f21\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wit-bindgen-rust/0.51.0/download\"],\n strip_prefix = \"wit-bindgen-rust-0.51.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.wit-bindgen-rust-0.51.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-bindgen-rust-macro-0.51.0\",\n sha256 = \"0c0f9bfd77e6a48eccf51359e3ae77140a7f50b1e2ebfe62422d8afdaffab17a\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wit-bindgen-rust-macro/0.51.0/download\"],\n strip_prefix = \"wit-bindgen-rust-macro-0.51.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.wit-bindgen-rust-macro-0.51.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-component-0.244.0\",\n sha256 = \"9d66ea20e9553b30172b5e831994e35fbde2d165325bec84fc43dbf6f4eb9cb2\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wit-component/0.244.0/download\"],\n strip_prefix = \"wit-component-0.244.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.wit-component-0.244.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-parser-0.244.0\",\n sha256 = \"ecc8ac4bc1dc3381b7f59c34f00b67e18f910c2c0f50015669dde7def656a736\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wit-parser/0.244.0/download\"],\n strip_prefix = \"wit-parser-0.244.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.wit-parser-0.244.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__yansi-0.5.1\",\n sha256 = \"09041cd90cf85f7f8b2df60c646f853b7f535ce68f85244eb6731cf89fa498ec\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/yansi/0.5.1/download\"],\n strip_prefix = \"yansi-0.5.1\",\n build_file = Label(\"@crates_std//crates_std:BUILD.yansi-0.5.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zerocopy-0.8.48\",\n sha256 = \"eed437bf9d6692032087e337407a86f04cd8d6a16a37199ed57949d415bd68e9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zerocopy/0.8.48/download\"],\n strip_prefix = \"zerocopy-0.8.48\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zerocopy-0.8.48.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zerocopy-derive-0.8.48\",\n sha256 = \"70e3cd084b1788766f53af483dd21f93881ff30d7320490ec3ef7526d203bad4\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zerocopy-derive/0.8.48/download\"],\n strip_prefix = \"zerocopy-derive-0.8.48\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zerocopy-derive-0.8.48.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zeroize-1.8.2\",\n sha256 = \"b97154e67e32c85465826e8bcc1c59429aaaf107c1e4a9e53c8d8ccd5eff88d0\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zeroize/1.8.2/download\"],\n strip_prefix = \"zeroize-1.8.2\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zeroize-1.8.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zeroize_derive-1.4.3\",\n sha256 = \"85a5b4158499876c763cb03bc4e49185d3cccbabb15b33c627f7884f43db852e\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zeroize_derive/1.4.3/download\"],\n strip_prefix = \"zeroize_derive-1.4.3\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zeroize_derive-1.4.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zmij-1.0.21\",\n sha256 = \"b8848ee67ecc8aedbaf3e4122217aff892639231befc6a1b58d29fff4c2cabaa\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zmij/1.0.21/download\"],\n strip_prefix = \"zmij-1.0.21\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zmij-1.0.21.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zngur-0.7.0\",\n sha256 = \"4149b4d31c320567b4ff83ede3fd75d8bbca8269a3cde7ad91f13496d563c5c8\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zngur/0.7.0/download\"],\n strip_prefix = \"zngur-0.7.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zngur-0.7.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zngur-def-0.7.0\",\n sha256 = \"a82030ab38c023d00e39d0d7175c7fad4f3e7607a463313b6b73f2cccd3d84f5\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zngur-def/0.7.0/download\"],\n strip_prefix = \"zngur-def-0.7.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zngur-def-0.7.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zngur-generator-0.7.0\",\n sha256 = \"90cb11d26d305fbeceb0f84dd276bb18e37f07edea1c61238a738f3084f3c629\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zngur-generator/0.7.0/download\"],\n strip_prefix = \"zngur-generator-0.7.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zngur-generator-0.7.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zngur-parser-0.7.0\",\n sha256 = \"e186484d4f21737fcb00cfc3f96fdf5e5609b6f8f0d6df824f4e3dce893a59a3\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zngur-parser/0.7.0/download\"],\n strip_prefix = \"zngur-parser-0.7.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zngur-parser-0.7.0.bazel\"),\n )\n\n return [\n struct(repo=\"crates_std__anyhow-1.0.102\", is_dev_dep = False),\n struct(repo=\"crates_std__bitfield-struct-0.12.1\", is_dev_dep = False),\n struct(repo=\"crates_std__bitflags-2.11.1\", is_dev_dep = False),\n struct(repo=\"crates_std__byteorder-1.5.0\", is_dev_dep = False),\n struct(repo=\"crates_std__clap-4.6.1\", is_dev_dep = False),\n struct(repo=\"crates_std__cliclack-0.3.8\", is_dev_dep = False),\n struct(repo=\"crates_std__cortex-m-0.7.7\", is_dev_dep = False),\n struct(repo=\"crates_std__cortex-m-rt-0.7.5\", is_dev_dep = False),\n struct(repo=\"crates_std__cortex-m-semihosting-0.5.0\", is_dev_dep = False),\n struct(repo=\"crates_std__embedded-io-0.6.1\", is_dev_dep = False),\n struct(repo=\"crates_std__futures-0.3.32\", is_dev_dep = False),\n struct(repo=\"crates_std__hashlink-0.10.0\", is_dev_dep = False),\n struct(repo=\"crates_std__hex-0.4.3\", is_dev_dep = False),\n struct(repo=\"crates_std__intrusive-collections-0.9.7\", is_dev_dep = False),\n struct(repo=\"crates_std__libc-0.2.186\", is_dev_dep = False),\n struct(repo=\"crates_std__minijinja-2.19.0\", is_dev_dep = False),\n struct(repo=\"crates_std__nix-0.29.0\", is_dev_dep = False),\n struct(repo=\"crates_std__nom-7.1.3\", is_dev_dep = False),\n struct(repo=\"crates_std__object-0.36.7\", is_dev_dep = False),\n struct(repo=\"crates_std__panic-halt-1.0.0\", is_dev_dep = False),\n struct(repo=\"crates_std__paste-1.0.15\", is_dev_dep = False),\n struct(repo=\"crates_std__proc-macro2-1.0.106\", is_dev_dep = False),\n struct(repo=\"crates_std__prost-0.14.3\", is_dev_dep = False),\n struct(repo=\"crates_std__prost-types-0.14.3\", is_dev_dep = False),\n struct(repo=\"crates_std__protoc-gen-prost-0.5.0\", is_dev_dep = False),\n struct(repo=\"crates_std__psm-0.1.31\", is_dev_dep = False),\n struct(repo=\"crates_std__quote-1.0.45\", is_dev_dep = False),\n struct(repo=\"crates_std__riscv-0.12.1\", is_dev_dep = False),\n struct(repo=\"crates_std__riscv-rt-0.12.2\", is_dev_dep = False),\n struct(repo=\"crates_std__riscv-semihosting-0.1.3\", is_dev_dep = False),\n struct(repo=\"crates_std__rustc-demangle-0.1.27\", is_dev_dep = False),\n struct(repo=\"crates_std__serde-1.0.228\", is_dev_dep = False),\n struct(repo=\"crates_std__serde_json-1.0.149\", is_dev_dep = False),\n struct(repo=\"crates_std__serde_json5-0.2.1\", is_dev_dep = False),\n struct(repo=\"crates_std__syn-2.0.117\", is_dev_dep = False),\n struct(repo=\"crates_std__thiserror-2.0.18\", is_dev_dep = False),\n struct(repo=\"crates_std__tokio-1.52.1\", is_dev_dep = False),\n struct(repo=\"crates_std__tokio-util-0.7.18\", is_dev_dep = False),\n struct(repo=\"crates_std__toml-0.8.23\", is_dev_dep = False),\n struct(repo=\"crates_std__zerocopy-0.8.48\", is_dev_dep = False),\n struct(repo=\"crates_std__zngur-0.7.0\", is_dev_dep = False),\n ]\n" + "defs.bzl": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\"\"\"\n# `crates_repository` API\n\n- [aliases](#aliases)\n- [crate_deps](#crate_deps)\n- [all_crate_deps](#all_crate_deps)\n- [crate_repositories](#crate_repositories)\n\n\"\"\"\n\nload(\"@bazel_tools//tools/build_defs/repo:git.bzl\", \"git_repository\")\nload(\"@bazel_tools//tools/build_defs/repo:http.bzl\", \"http_archive\")\nload(\"@bazel_tools//tools/build_defs/repo:utils.bzl\", \"maybe\")\nload(\"@bazel_skylib//lib:selects.bzl\", \"selects\")\nload(\"@rules_rust//crate_universe/private:local_crate_mirror.bzl\", \"local_crate_mirror\")\n\n###############################################################################\n# MACROS API\n###############################################################################\n\n# An identifier that represent common dependencies (unconditional).\n_COMMON_CONDITION = \"\"\n\ndef _flatten_dependency_maps(all_dependency_maps):\n \"\"\"Flatten a list of dependency maps into one dictionary.\n\n Dependency maps have the following structure:\n\n ```python\n DEPENDENCIES_MAP = {\n # The first key in the map is a Bazel package\n # name of the workspace this file is defined in.\n \"workspace_member_package\": {\n\n # Not all dependencies are supported for all platforms.\n # the condition key is the condition required to be true\n # on the host platform.\n \"condition\": {\n\n # An alias to a crate target. # The label of the crate target the\n # Aliases are only crate names. # package name refers to.\n \"package_name\": \"@full//:label\",\n }\n }\n }\n ```\n\n Args:\n all_dependency_maps (list): A list of dicts as described above\n\n Returns:\n dict: A dictionary as described above\n \"\"\"\n dependencies = {}\n\n for workspace_deps_map in all_dependency_maps:\n for pkg_name, conditional_deps_map in workspace_deps_map.items():\n if pkg_name not in dependencies:\n non_frozen_map = dict()\n for key, values in conditional_deps_map.items():\n non_frozen_map.update({key: dict(values.items())})\n dependencies.setdefault(pkg_name, non_frozen_map)\n continue\n\n for condition, deps_map in conditional_deps_map.items():\n # If the condition has not been recorded, do so and continue\n if condition not in dependencies[pkg_name]:\n dependencies[pkg_name].setdefault(condition, dict(deps_map.items()))\n continue\n\n # Alert on any miss-matched dependencies\n inconsistent_entries = []\n for crate_name, crate_label in deps_map.items():\n existing = dependencies[pkg_name][condition].get(crate_name)\n if existing and existing != crate_label:\n inconsistent_entries.append((crate_name, existing, crate_label))\n dependencies[pkg_name][condition].update({crate_name: crate_label})\n\n return dependencies\n\ndef crate_deps(deps, package_name = None):\n \"\"\"Finds the fully qualified label of the requested crates for the package where this macro is called.\n\n Args:\n deps (list): The desired list of crate targets.\n package_name (str, optional): The package name of the set of dependencies to look up.\n Defaults to `native.package_name()`.\n\n Returns:\n list: A list of labels to generated rust targets (str)\n \"\"\"\n\n if not deps:\n return []\n\n if package_name == None:\n package_name = native.package_name()\n\n # Join both sets of dependencies\n dependencies = _flatten_dependency_maps([\n _NORMAL_DEPENDENCIES,\n _NORMAL_DEV_DEPENDENCIES,\n _PROC_MACRO_DEPENDENCIES,\n _PROC_MACRO_DEV_DEPENDENCIES,\n _BUILD_DEPENDENCIES,\n _BUILD_PROC_MACRO_DEPENDENCIES,\n ]).pop(package_name, {})\n\n # Combine all conditional packages so we can easily index over a flat list\n # TODO: Perhaps this should actually return select statements and maintain\n # the conditionals of the dependencies\n flat_deps = {}\n for deps_set in dependencies.values():\n for crate_name, crate_label in deps_set.items():\n flat_deps.update({crate_name: crate_label})\n\n missing_crates = []\n crate_targets = []\n for crate_target in deps:\n if crate_target not in flat_deps:\n missing_crates.append(crate_target)\n else:\n crate_targets.append(flat_deps[crate_target])\n\n if missing_crates:\n fail(\"Could not find crates `{}` among dependencies of `{}`. Available dependencies were `{}`\".format(\n missing_crates,\n package_name,\n dependencies,\n ))\n\n return crate_targets\n\ndef all_crate_deps(\n normal = False, \n normal_dev = False, \n proc_macro = False, \n proc_macro_dev = False,\n build = False,\n build_proc_macro = False,\n package_name = None):\n \"\"\"Finds the fully qualified label of all requested direct crate dependencies \\\n for the package where this macro is called.\n\n If no parameters are set, all normal dependencies are returned. Setting any one flag will\n otherwise impact the contents of the returned list.\n\n Args:\n normal (bool, optional): If True, normal dependencies are included in the\n output list.\n normal_dev (bool, optional): If True, normal dev dependencies will be\n included in the output list.\n proc_macro (bool, optional): If True, proc_macro dependencies are included\n in the output list.\n proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are\n included in the output list.\n build (bool, optional): If True, build dependencies are included\n in the output list.\n build_proc_macro (bool, optional): If True, build proc_macro dependencies are\n included in the output list.\n package_name (str, optional): The package name of the set of dependencies to look up.\n Defaults to `native.package_name()` when unset.\n\n Returns:\n list: A list of labels to generated rust targets (str)\n \"\"\"\n\n if package_name == None:\n package_name = native.package_name()\n\n # Determine the relevant maps to use\n all_dependency_maps = []\n if normal:\n all_dependency_maps.append(_NORMAL_DEPENDENCIES)\n if normal_dev:\n all_dependency_maps.append(_NORMAL_DEV_DEPENDENCIES)\n if proc_macro:\n all_dependency_maps.append(_PROC_MACRO_DEPENDENCIES)\n if proc_macro_dev:\n all_dependency_maps.append(_PROC_MACRO_DEV_DEPENDENCIES)\n if build:\n all_dependency_maps.append(_BUILD_DEPENDENCIES)\n if build_proc_macro:\n all_dependency_maps.append(_BUILD_PROC_MACRO_DEPENDENCIES)\n\n # Default to always using normal dependencies\n if not all_dependency_maps:\n all_dependency_maps.append(_NORMAL_DEPENDENCIES)\n\n dependencies = _flatten_dependency_maps(all_dependency_maps).pop(package_name, None)\n\n if not dependencies:\n if dependencies == None:\n fail(\"Tried to get all_crate_deps for package \" + package_name + \" but that package had no Cargo.toml file\")\n else:\n return []\n\n crate_deps = list(dependencies.pop(_COMMON_CONDITION, {}).values())\n for condition, deps in dependencies.items():\n crate_deps += selects.with_or({\n tuple(_CONDITIONS[condition]): deps.values(),\n \"//conditions:default\": [],\n })\n\n return crate_deps\n\ndef aliases(\n normal = False,\n normal_dev = False,\n proc_macro = False,\n proc_macro_dev = False,\n build = False,\n build_proc_macro = False,\n package_name = None):\n \"\"\"Produces a map of Crate alias names to their original label\n\n If no dependency kinds are specified, `normal` and `proc_macro` are used by default.\n Setting any one flag will otherwise determine the contents of the returned dict.\n\n Args:\n normal (bool, optional): If True, normal dependencies are included in the\n output list.\n normal_dev (bool, optional): If True, normal dev dependencies will be\n included in the output list..\n proc_macro (bool, optional): If True, proc_macro dependencies are included\n in the output list.\n proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are\n included in the output list.\n build (bool, optional): If True, build dependencies are included\n in the output list.\n build_proc_macro (bool, optional): If True, build proc_macro dependencies are\n included in the output list.\n package_name (str, optional): The package name of the set of dependencies to look up.\n Defaults to `native.package_name()` when unset.\n\n Returns:\n dict: The aliases of all associated packages\n \"\"\"\n if package_name == None:\n package_name = native.package_name()\n\n # Determine the relevant maps to use\n all_aliases_maps = []\n if normal:\n all_aliases_maps.append(_NORMAL_ALIASES)\n if normal_dev:\n all_aliases_maps.append(_NORMAL_DEV_ALIASES)\n if proc_macro:\n all_aliases_maps.append(_PROC_MACRO_ALIASES)\n if proc_macro_dev:\n all_aliases_maps.append(_PROC_MACRO_DEV_ALIASES)\n if build:\n all_aliases_maps.append(_BUILD_ALIASES)\n if build_proc_macro:\n all_aliases_maps.append(_BUILD_PROC_MACRO_ALIASES)\n\n # Default to always using normal aliases\n if not all_aliases_maps:\n all_aliases_maps.append(_NORMAL_ALIASES)\n all_aliases_maps.append(_PROC_MACRO_ALIASES)\n\n aliases = _flatten_dependency_maps(all_aliases_maps).pop(package_name, None)\n\n if not aliases:\n return dict()\n\n common_items = aliases.pop(_COMMON_CONDITION, {}).items()\n\n # If there are only common items in the dictionary, immediately return them\n if not len(aliases.keys()) == 1:\n return dict(common_items)\n\n # Build a single select statement where each conditional has accounted for the\n # common set of aliases.\n crate_aliases = {\"//conditions:default\": dict(common_items)}\n for condition, deps in aliases.items():\n condition_triples = _CONDITIONS[condition]\n for triple in condition_triples:\n if triple in crate_aliases:\n crate_aliases[triple].update(deps)\n else:\n crate_aliases.update({triple: dict(deps.items() + common_items)})\n\n return select(crate_aliases)\n\n###############################################################################\n# WORKSPACE MEMBER DEPS AND ALIASES\n###############################################################################\n\n_NORMAL_DEPENDENCIES = {\n \"third_party/crates_io/crates_std\": {\n _COMMON_CONDITION: {\n \"anyhow\": Label(\"@crates_std//:anyhow-1.0.102\"),\n \"bitflags\": Label(\"@crates_std//:bitflags-2.13.0\"),\n \"byteorder\": Label(\"@crates_std//:byteorder-1.5.0\"),\n \"clap\": Label(\"@crates_std//:clap-4.6.1\"),\n \"cliclack\": Label(\"@crates_std//:cliclack-0.3.8\"),\n \"cortex-m\": Label(\"@crates_std//:cortex-m-0.7.7\"),\n \"cortex-m-rt\": Label(\"@crates_std//:cortex-m-rt-0.7.5\"),\n \"cortex-m-semihosting\": Label(\"@crates_std//:cortex-m-semihosting-0.5.0\"),\n \"embedded-io\": Label(\"@crates_std//:embedded-io-0.6.1\"),\n \"futures\": Label(\"@crates_std//:futures-0.3.32\"),\n \"hashlink\": Label(\"@crates_std//:hashlink-0.10.0\"),\n \"hex\": Label(\"@crates_std//:hex-0.4.3\"),\n \"intrusive-collections\": Label(\"@crates_std//:intrusive-collections-0.9.7\"),\n \"libc\": Label(\"@crates_std//:libc-0.2.186\"),\n \"minijinja\": Label(\"@crates_std//:minijinja-2.20.0\"),\n \"nix\": Label(\"@crates_std//:nix-0.29.0\"),\n \"nom\": Label(\"@crates_std//:nom-7.1.3\"),\n \"object\": Label(\"@crates_std//:object-0.36.7\"),\n \"panic-halt\": Label(\"@crates_std//:panic-halt-1.0.0\"),\n \"proc-macro2\": Label(\"@crates_std//:proc-macro2-1.0.106\"),\n \"prost\": Label(\"@crates_std//:prost-0.14.3\"),\n \"prost-reflect\": Label(\"@crates_std//:prost-reflect-0.16.4\"),\n \"prost-types\": Label(\"@crates_std//:prost-types-0.14.3\"),\n \"protoc-gen-prost\": Label(\"@crates_std//:protoc-gen-prost-0.5.0\"),\n \"psm\": Label(\"@crates_std//:psm-0.1.31\"),\n \"quote\": Label(\"@crates_std//:quote-1.0.45\"),\n \"riscv\": Label(\"@crates_std//:riscv-0.12.1\"),\n \"riscv-rt\": Label(\"@crates_std//:riscv-rt-0.12.2\"),\n \"riscv-semihosting\": Label(\"@crates_std//:riscv-semihosting-0.1.3\"),\n \"rustc-demangle\": Label(\"@crates_std//:rustc-demangle-0.1.27\"),\n \"serde\": Label(\"@crates_std//:serde-1.0.228\"),\n \"serde_json\": Label(\"@crates_std//:serde_json-1.0.150\"),\n \"serde_json5\": Label(\"@crates_std//:serde_json5-0.2.1\"),\n \"syn\": Label(\"@crates_std//:syn-2.0.117\"),\n \"thiserror\": Label(\"@crates_std//:thiserror-2.0.18\"),\n \"tokio\": Label(\"@crates_std//:tokio-1.52.3\"),\n \"tokio-util\": Label(\"@crates_std//:tokio-util-0.7.18\"),\n \"toml\": Label(\"@crates_std//:toml-0.8.23\"),\n \"zerocopy\": Label(\"@crates_std//:zerocopy-0.8.50\"),\n \"zngur\": Label(\"@crates_std//:zngur-0.10.0\"),\n \"zngur-lib\": Label(\"@crates_std//:zngur-lib-0.10.0\"),\n },\n },\n}\n\n\n_NORMAL_ALIASES = {\n \"third_party/crates_io/crates_std\": {\n _COMMON_CONDITION: {\n },\n },\n}\n\n\n_NORMAL_DEV_DEPENDENCIES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_NORMAL_DEV_ALIASES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_PROC_MACRO_DEPENDENCIES = {\n \"third_party/crates_io/crates_std\": {\n _COMMON_CONDITION: {\n \"bitfield-struct\": Label(\"@crates_std//:bitfield-struct-0.12.1\"),\n \"paste\": Label(\"@crates_std//:paste-1.0.15\"),\n },\n },\n}\n\n\n_PROC_MACRO_ALIASES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_PROC_MACRO_DEV_DEPENDENCIES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_PROC_MACRO_DEV_ALIASES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_BUILD_DEPENDENCIES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_BUILD_ALIASES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_BUILD_PROC_MACRO_DEPENDENCIES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_BUILD_PROC_MACRO_ALIASES = {\n \"third_party/crates_io/crates_std\": {\n },\n}\n\n\n_CONDITIONS = {\n \"aarch64-apple-darwin\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n \"aarch64-linux-android\": [],\n \"aarch64-pc-windows-gnullvm\": [],\n \"aarch64-unknown-linux-gnu\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n \"arm64ec-pc-windows-msvc\": [],\n \"cfg(all(any(target_arch = \\\"x86_64\\\", target_arch = \\\"arm64ec\\\"), target_env = \\\"msvc\\\", not(windows_raw_dylib)))\": [],\n \"cfg(all(any(target_os = \\\"linux\\\", target_os = \\\"android\\\"), any(rustix_use_libc, miri, not(all(target_os = \\\"linux\\\", any(target_endian = \\\"little\\\", any(target_arch = \\\"s390x\\\", target_arch = \\\"powerpc\\\")), any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc\\\"), all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"s390x\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\")))))))\": [],\n \"cfg(all(any(target_os = \\\"linux\\\", target_os = \\\"android\\\"), not(any(all(target_os = \\\"linux\\\", target_env = \\\"\\\"), getrandom_backend = \\\"custom\\\", getrandom_backend = \\\"linux_raw\\\", getrandom_backend = \\\"rdrand\\\", getrandom_backend = \\\"rndr\\\"))))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(all(not(rustix_use_libc), not(miri), target_os = \\\"linux\\\", any(target_endian = \\\"little\\\", any(target_arch = \\\"s390x\\\", target_arch = \\\"powerpc\\\")), any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc\\\"), all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"s390x\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\"))))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \\\"linux\\\", any(target_endian = \\\"little\\\", any(target_arch = \\\"s390x\\\", target_arch = \\\"powerpc\\\")), any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc\\\"), all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"s390x\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\")))))))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-apple-darwin\"],\n \"cfg(all(target_arch = \\\"aarch64\\\", target_env = \\\"msvc\\\", not(windows_raw_dylib)))\": [],\n \"cfg(all(target_arch = \\\"aarch64\\\", target_os = \\\"linux\\\"))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n \"cfg(all(target_arch = \\\"aarch64\\\", target_vendor = \\\"apple\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n \"cfg(all(target_arch = \\\"loongarch64\\\", target_os = \\\"linux\\\"))\": [],\n \"cfg(all(target_arch = \\\"wasm32\\\", target_os = \\\"wasi\\\", target_env = \\\"p2\\\"))\": [],\n \"cfg(all(target_arch = \\\"wasm32\\\", target_os = \\\"wasi\\\", target_env = \\\"p3\\\"))\": [],\n \"cfg(all(target_arch = \\\"x86\\\", target_env = \\\"gnu\\\", not(target_abi = \\\"llvm\\\"), not(windows_raw_dylib)))\": [],\n \"cfg(all(target_arch = \\\"x86\\\", target_env = \\\"msvc\\\", not(windows_raw_dylib)))\": [],\n \"cfg(all(target_arch = \\\"x86_64\\\", target_env = \\\"gnu\\\", not(target_abi = \\\"llvm\\\"), not(windows_raw_dylib)))\": [\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(all(target_family = \\\"wasm\\\", target_os = \\\"unknown\\\"))\": [],\n \"cfg(all(target_os = \\\"uefi\\\", getrandom_backend = \\\"efi_rng\\\"))\": [],\n \"cfg(all(windows, not(target_arch = \\\"arm64ec\\\")))\": [],\n \"cfg(any())\": [],\n \"cfg(any(target_arch = \\\"aarch64\\\", target_arch = \\\"x86_64\\\", target_arch = \\\"x86\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(any(target_os = \\\"dragonfly\\\", target_os = \\\"freebsd\\\", target_os = \\\"hurd\\\", target_os = \\\"illumos\\\", target_os = \\\"cygwin\\\", all(target_os = \\\"horizon\\\", target_arch = \\\"arm\\\")))\": [],\n \"cfg(any(target_os = \\\"haiku\\\", target_os = \\\"redox\\\", target_os = \\\"nto\\\", target_os = \\\"aix\\\"))\": [],\n \"cfg(any(target_os = \\\"ios\\\", target_os = \\\"visionos\\\", target_os = \\\"watchos\\\", target_os = \\\"tvos\\\"))\": [],\n \"cfg(any(target_os = \\\"macos\\\", target_os = \\\"openbsd\\\", target_os = \\\"vita\\\", target_os = \\\"emscripten\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-apple-darwin\"],\n \"cfg(any(unix, target_os = \\\"hermit\\\", target_os = \\\"wasi\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(any(unix, target_os = \\\"wasi\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(target_os = \\\"hermit\\\")\": [],\n \"cfg(target_os = \\\"netbsd\\\")\": [],\n \"cfg(target_os = \\\"redox\\\")\": [],\n \"cfg(target_os = \\\"solaris\\\")\": [],\n \"cfg(target_os = \\\"vxworks\\\")\": [],\n \"cfg(target_os = \\\"wasi\\\")\": [],\n \"cfg(unix)\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-apple-darwin\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n \"cfg(windows)\": [],\n \"i686-pc-windows-gnullvm\": [],\n \"x86_64-apple-darwin\": [\"@rules_rust//rust/platform:x86_64-apple-darwin\"],\n \"x86_64-pc-windows-gnullvm\": [],\n \"x86_64-unknown-linux-gnu\": [\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n}\n\n###############################################################################\n\ndef crate_repositories():\n \"\"\"A macro for defining repositories for all generated crates.\n\n Returns:\n A list of repos visible to the module through the module extension.\n \"\"\"\n maybe(\n http_archive,\n name = \"crates_std__adler2-2.0.1\",\n sha256 = \"320119579fcad9c21884f5c4861d16174d0e06250625266f50fe6898340abefa\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/adler2/2.0.1/download\"],\n strip_prefix = \"adler2-2.0.1\",\n build_file = Label(\"@crates_std//crates_std:BUILD.adler2-2.0.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__aho-corasick-1.1.4\",\n sha256 = \"ddd31a130427c27518df266943a5308ed92d4b226cc639f5a8f1002816174301\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/aho-corasick/1.1.4/download\"],\n strip_prefix = \"aho-corasick-1.1.4\",\n build_file = Label(\"@crates_std//crates_std:BUILD.aho-corasick-1.1.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__allocator-api2-0.2.21\",\n sha256 = \"683d7910e743518b0e34f1186f92494becacb047c7b6bf616c96772180fef923\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/allocator-api2/0.2.21/download\"],\n strip_prefix = \"allocator-api2-0.2.21\",\n build_file = Label(\"@crates_std//crates_std:BUILD.allocator-api2-0.2.21.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__anstream-1.0.0\",\n sha256 = \"824a212faf96e9acacdbd09febd34438f8f711fb84e09a8916013cd7815ca28d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstream/1.0.0/download\"],\n strip_prefix = \"anstream-1.0.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.anstream-1.0.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__anstyle-1.0.14\",\n sha256 = \"940b3a0ca603d1eade50a4846a2afffd5ef57a9feac2c0e2ec2e14f9ead76000\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle/1.0.14/download\"],\n strip_prefix = \"anstyle-1.0.14\",\n build_file = Label(\"@crates_std//crates_std:BUILD.anstyle-1.0.14.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__anstyle-parse-1.0.0\",\n sha256 = \"52ce7f38b242319f7cabaa6813055467063ecdc9d355bbb4ce0c68908cd8130e\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle-parse/1.0.0/download\"],\n strip_prefix = \"anstyle-parse-1.0.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.anstyle-parse-1.0.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__anstyle-query-1.1.5\",\n sha256 = \"40c48f72fd53cd289104fc64099abca73db4166ad86ea0b4341abe65af83dadc\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle-query/1.1.5/download\"],\n strip_prefix = \"anstyle-query-1.1.5\",\n build_file = Label(\"@crates_std//crates_std:BUILD.anstyle-query-1.1.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__anstyle-wincon-3.0.11\",\n sha256 = \"291e6a250ff86cd4a820112fb8898808a366d8f9f58ce16d1f538353ad55747d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anstyle-wincon/3.0.11/download\"],\n strip_prefix = \"anstyle-wincon-3.0.11\",\n build_file = Label(\"@crates_std//crates_std:BUILD.anstyle-wincon-3.0.11.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__anyhow-1.0.102\",\n sha256 = \"7f202df86484c868dbad7eaa557ef785d5c66295e41b460ef922eca0723b842c\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/anyhow/1.0.102/download\"],\n strip_prefix = \"anyhow-1.0.102\",\n build_file = Label(\"@crates_std//crates_std:BUILD.anyhow-1.0.102.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__ar_archive_writer-0.5.1\",\n sha256 = \"7eb93bbb63b9c227414f6eb3a0adfddca591a8ce1e9b60661bb08969b87e340b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/ar_archive_writer/0.5.1/download\"],\n strip_prefix = \"ar_archive_writer-0.5.1\",\n build_file = Label(\"@crates_std//crates_std:BUILD.ar_archive_writer-0.5.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__ariadne-0.3.0\",\n sha256 = \"72fe02fc62033df9ba41cba57ee19acf5e742511a140c7dbc3a873e19a19a1bd\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/ariadne/0.3.0/download\"],\n strip_prefix = \"ariadne-0.3.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.ariadne-0.3.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__askama-0.12.1\",\n sha256 = \"b79091df18a97caea757e28cd2d5fda49c6cd4bd01ddffd7ff01ace0c0ad2c28\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/askama/0.12.1/download\"],\n strip_prefix = \"askama-0.12.1\",\n build_file = Label(\"@crates_std//crates_std:BUILD.askama-0.12.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__askama_derive-0.12.5\",\n sha256 = \"19fe8d6cb13c4714962c072ea496f3392015f0989b1a2847bb4b2d9effd71d83\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/askama_derive/0.12.5/download\"],\n strip_prefix = \"askama_derive-0.12.5\",\n build_file = Label(\"@crates_std//crates_std:BUILD.askama_derive-0.12.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__askama_escape-0.10.3\",\n sha256 = \"619743e34b5ba4e9703bba34deac3427c72507c7159f5fd030aea8cac0cfe341\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/askama_escape/0.10.3/download\"],\n strip_prefix = \"askama_escape-0.10.3\",\n build_file = Label(\"@crates_std//crates_std:BUILD.askama_escape-0.10.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__askama_parser-0.2.1\",\n sha256 = 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Label(\"@crates_std//crates_std:BUILD.bare-metal-0.2.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__basic-toml-0.1.10\",\n sha256 = \"ba62675e8242a4c4e806d12f11d136e626e6c8361d6b829310732241652a178a\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/basic-toml/0.1.10/download\"],\n strip_prefix = \"basic-toml-0.1.10\",\n build_file = Label(\"@crates_std//crates_std:BUILD.basic-toml-0.1.10.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__bitfield-0.13.2\",\n sha256 = \"46afbd2983a5d5a7bd740ccb198caf5b82f45c40c09c0eed36052d91cb92e719\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bitfield/0.13.2/download\"],\n strip_prefix = \"bitfield-0.13.2\",\n build_file = Label(\"@crates_std//crates_std:BUILD.bitfield-0.13.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__bitfield-struct-0.12.1\",\n sha256 = \"8769c4854c5ada2852ddf6fd09d15cf43d4c2aaeccb4de6432f5402f08a6003b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bitfield-struct/0.12.1/download\"],\n strip_prefix = \"bitfield-struct-0.12.1\",\n build_file = Label(\"@crates_std//crates_std:BUILD.bitfield-struct-0.12.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__bitflags-2.13.0\",\n sha256 = \"b4388bee8683e3d04af747c73422af53102d2bd24d9eadb6cbc100baef4b43f8\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/bitflags/2.13.0/download\"],\n strip_prefix = \"bitflags-2.13.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.bitflags-2.13.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__block-buffer-0.10.4\",\n sha256 = \"3078c7629b62d3f0439517fa394996acacc5cbc91c5a20d8c658e77abd503a71\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/block-buffer/0.10.4/download\"],\n strip_prefix = \"block-buffer-0.10.4\",\n build_file = Label(\"@crates_std//crates_std:BUILD.block-buffer-0.10.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = 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Label(\"@crates_std//crates_std:BUILD.bytes-1.11.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__cc-1.2.63\",\n sha256 = \"556e016178bb5662a08681bbe0f00f8e17631781a4dfc8c45e466e4b185ec27f\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cc/1.2.63/download\"],\n strip_prefix = \"cc-1.2.63\",\n build_file = Label(\"@crates_std//crates_std:BUILD.cc-1.2.63.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__cfg-if-1.0.4\",\n sha256 = \"9330f8b2ff13f34540b44e946ef35111825727b38d33286ef986142615121801\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cfg-if/1.0.4/download\"],\n strip_prefix = \"cfg-if-1.0.4\",\n build_file = Label(\"@crates_std//crates_std:BUILD.cfg-if-1.0.4.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__cfg_aliases-0.2.1\",\n sha256 = \"613afe47fcd5fac7ccf1db93babcb082c5994d996f20b8b159f2ad1658eb5724\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cfg_aliases/0.2.1/download\"],\n strip_prefix = \"cfg_aliases-0.2.1\",\n build_file = Label(\"@crates_std//crates_std:BUILD.cfg_aliases-0.2.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__chumsky-1.0.0-alpha.8\",\n sha256 = \"0e82d74e6c83060ec269fe9e0d408d6de4a1645d525f9a0bbbb841ba4efd91ac\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/chumsky/1.0.0-alpha.8/download\"],\n strip_prefix = \"chumsky-1.0.0-alpha.8\",\n build_file = Label(\"@crates_std//crates_std:BUILD.chumsky-1.0.0-alpha.8.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__clap-4.6.1\",\n sha256 = \"1ddb117e43bbf7dacf0a4190fef4d345b9bad68dfc649cb349e7d17d28428e51\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/clap/4.6.1/download\"],\n strip_prefix = \"clap-4.6.1\",\n build_file = Label(\"@crates_std//crates_std:BUILD.clap-4.6.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__clap_builder-4.6.0\",\n sha256 = \"714a53001bf66416adb0e2ef5ac857140e7dc3a0c48fb28b2f10762fc4b5069f\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/clap_builder/4.6.0/download\"],\n strip_prefix = \"clap_builder-4.6.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.clap_builder-4.6.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__clap_derive-4.6.1\",\n sha256 = \"f2ce8604710f6733aa641a2b3731eaa1e8b3d9973d5e3565da11800813f997a9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/clap_derive/4.6.1/download\"],\n strip_prefix = \"clap_derive-4.6.1\",\n build_file = Label(\"@crates_std//crates_std:BUILD.clap_derive-4.6.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__clap_lex-1.1.0\",\n sha256 = \"c8d4a3bb8b1e0c1050499d1815f5ab16d04f0959b233085fb31653fbfc9d98f9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/clap_lex/1.1.0/download\"],\n strip_prefix = \"clap_lex-1.1.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.clap_lex-1.1.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__cliclack-0.3.8\",\n sha256 = \"aa510b739c618c679375ea9c5af44ce9f591289546e874ad5910e7ce7df79844\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cliclack/0.3.8/download\"],\n strip_prefix = \"cliclack-0.3.8\",\n build_file = Label(\"@crates_std//crates_std:BUILD.cliclack-0.3.8.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__colorchoice-1.0.5\",\n sha256 = \"1d07550c9036bf2ae0c684c4297d503f838287c83c53686d05370d0e139ae570\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/colorchoice/1.0.5/download\"],\n strip_prefix = \"colorchoice-1.0.5\",\n build_file = Label(\"@crates_std//crates_std:BUILD.colorchoice-1.0.5.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__console-0.15.11\",\n sha256 = \"054ccb5b10f9f2cbf51eb355ca1d05c2d279ce1804688d0db74b4733a5aeafd8\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/console/0.15.11/download\"],\n strip_prefix = \"console-0.15.11\",\n build_file = Label(\"@crates_std//crates_std:BUILD.console-0.15.11.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__console-0.16.3\",\n sha256 = \"d64e8af5551369d19cf50138de61f1c42074ab970f74e99be916646777f8fc87\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/console/0.16.3/download\"],\n strip_prefix = \"console-0.16.3\",\n build_file = Label(\"@crates_std//crates_std:BUILD.console-0.16.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__cortex-m-0.7.7\",\n sha256 = \"8ec610d8f49840a5b376c69663b6369e71f4b34484b9b2eb29fb918d92516cb9\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/cortex-m/0.7.7/download\"],\n strip_prefix = \"cortex-m-0.7.7\",\n build_file = Label(\"@crates_std//crates_std:BUILD.cortex-m-0.7.7.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__cortex-m-rt-0.7.5\",\n sha256 = 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Label(\"@crates_std//crates_std:BUILD.windows-link-0.2.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__windows-sys-0.59.0\",\n sha256 = \"1e38bc4d79ed67fd075bcc251a1c39b32a1776bbe92e5bef1f0bf1f8c531853b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/windows-sys/0.59.0/download\"],\n strip_prefix = \"windows-sys-0.59.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.windows-sys-0.59.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__windows-sys-0.61.2\",\n sha256 = \"ae137229bcbd6cdf0f7b80a31df61766145077ddf49416a728b02cb3921ff3fc\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/windows-sys/0.61.2/download\"],\n strip_prefix = \"windows-sys-0.61.2\",\n build_file = Label(\"@crates_std//crates_std:BUILD.windows-sys-0.61.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__windows-targets-0.52.6\",\n sha256 = \"9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973\",\n type = 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Label(\"@crates_std//crates_std:BUILD.windows_aarch64_msvc-0.52.6.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__windows_i686_gnu-0.52.6\",\n sha256 = \"8e9b5ad5ab802e97eb8e295ac6720e509ee4c243f69d781394014ebfe8bbfa0b\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/windows_i686_gnu/0.52.6/download\"],\n strip_prefix = \"windows_i686_gnu-0.52.6\",\n build_file = Label(\"@crates_std//crates_std:BUILD.windows_i686_gnu-0.52.6.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__windows_i686_gnullvm-0.52.6\",\n sha256 = \"0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/windows_i686_gnullvm/0.52.6/download\"],\n strip_prefix = \"windows_i686_gnullvm-0.52.6\",\n build_file = Label(\"@crates_std//crates_std:BUILD.windows_i686_gnullvm-0.52.6.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__windows_i686_msvc-0.52.6\",\n sha256 = \"240948bc05c5e7c6dabba28bf89d89ffce3e303022809e73deaefe4f6ec56c66\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/windows_i686_msvc/0.52.6/download\"],\n strip_prefix = \"windows_i686_msvc-0.52.6\",\n build_file = Label(\"@crates_std//crates_std:BUILD.windows_i686_msvc-0.52.6.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__windows_x86_64_gnu-0.52.6\",\n sha256 = \"147a5c80aabfbf0c7d901cb5895d1de30ef2907eb21fbbab29ca94c5b08b1a78\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/windows_x86_64_gnu/0.52.6/download\"],\n strip_prefix = \"windows_x86_64_gnu-0.52.6\",\n build_file = Label(\"@crates_std//crates_std:BUILD.windows_x86_64_gnu-0.52.6.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__windows_x86_64_gnullvm-0.52.6\",\n sha256 = \"24d5b23dc417412679681396f2b49f3de8c1473deb516bd34410872eff51ed0d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/windows_x86_64_gnullvm/0.52.6/download\"],\n strip_prefix = \"windows_x86_64_gnullvm-0.52.6\",\n build_file = Label(\"@crates_std//crates_std:BUILD.windows_x86_64_gnullvm-0.52.6.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__windows_x86_64_msvc-0.52.6\",\n sha256 = \"589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/windows_x86_64_msvc/0.52.6/download\"],\n strip_prefix = \"windows_x86_64_msvc-0.52.6\",\n build_file = Label(\"@crates_std//crates_std:BUILD.windows_x86_64_msvc-0.52.6.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__winnow-0.7.15\",\n sha256 = \"df79d97927682d2fd8adb29682d1140b343be4ac0f08fd68b7765d9c059d3945\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/winnow/0.7.15/download\"],\n strip_prefix = \"winnow-0.7.15\",\n build_file = Label(\"@crates_std//crates_std:BUILD.winnow-0.7.15.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-bindgen-0.51.0\",\n sha256 = \"d7249219f66ced02969388cf2bb044a09756a083d0fab1e566056b04d9fbcaa5\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wit-bindgen/0.51.0/download\"],\n strip_prefix = \"wit-bindgen-0.51.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.wit-bindgen-0.51.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-bindgen-0.57.1\",\n sha256 = \"1ebf944e87a7c253233ad6766e082e3cd714b5d03812acc24c318f549614536e\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wit-bindgen/0.57.1/download\"],\n strip_prefix = \"wit-bindgen-0.57.1\",\n build_file = Label(\"@crates_std//crates_std:BUILD.wit-bindgen-0.57.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-bindgen-core-0.51.0\",\n sha256 = \"ea61de684c3ea68cb082b7a88508a8b27fcc8b797d738bfc99a82facf1d752dc\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wit-bindgen-core/0.51.0/download\"],\n strip_prefix = \"wit-bindgen-core-0.51.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.wit-bindgen-core-0.51.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-bindgen-rust-0.51.0\",\n sha256 = \"b7c566e0f4b284dd6561c786d9cb0142da491f46a9fbed79ea69cdad5db17f21\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wit-bindgen-rust/0.51.0/download\"],\n strip_prefix = \"wit-bindgen-rust-0.51.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.wit-bindgen-rust-0.51.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-bindgen-rust-macro-0.51.0\",\n sha256 = \"0c0f9bfd77e6a48eccf51359e3ae77140a7f50b1e2ebfe62422d8afdaffab17a\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/wit-bindgen-rust-macro/0.51.0/download\"],\n strip_prefix = \"wit-bindgen-rust-macro-0.51.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.wit-bindgen-rust-macro-0.51.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__wit-component-0.244.0\",\n sha256 = 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Label(\"@crates_std//crates_std:BUILD.yansi-0.5.1.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zerocopy-0.8.50\",\n sha256 = \"3b065d4f0e55f82fae73202e189638116a87c55ab6b8e6c2721e13dd9d854ad1\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zerocopy/0.8.50/download\"],\n strip_prefix = \"zerocopy-0.8.50\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zerocopy-0.8.50.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zerocopy-derive-0.8.50\",\n sha256 = \"0b631b19d36a892ab55420c92dbc83ccd79274f25be714855d3074aa71cab639\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zerocopy-derive/0.8.50/download\"],\n strip_prefix = \"zerocopy-derive-0.8.50\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zerocopy-derive-0.8.50.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zeroize-1.8.2\",\n sha256 = \"b97154e67e32c85465826e8bcc1c59429aaaf107c1e4a9e53c8d8ccd5eff88d0\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zeroize/1.8.2/download\"],\n strip_prefix = \"zeroize-1.8.2\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zeroize-1.8.2.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zeroize_derive-1.4.3\",\n sha256 = \"85a5b4158499876c763cb03bc4e49185d3cccbabb15b33c627f7884f43db852e\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zeroize_derive/1.4.3/download\"],\n strip_prefix = \"zeroize_derive-1.4.3\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zeroize_derive-1.4.3.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zmij-1.0.21\",\n sha256 = \"b8848ee67ecc8aedbaf3e4122217aff892639231befc6a1b58d29fff4c2cabaa\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zmij/1.0.21/download\"],\n strip_prefix = \"zmij-1.0.21\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zmij-1.0.21.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zngur-0.10.0\",\n sha256 = \"7fc912d12934b4d04aabc52c14db6fc88ae8aa5a47902f27e8759c2de254723f\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zngur/0.10.0/download\"],\n strip_prefix = \"zngur-0.10.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zngur-0.10.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zngur-def-0.10.0\",\n sha256 = \"8f27e49a62db537cea43a6c122ded7eda99c4ac0ca1d7cfd74f2bf6a6c88712d\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zngur-def/0.10.0/download\"],\n strip_prefix = \"zngur-def-0.10.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zngur-def-0.10.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zngur-generator-0.10.0\",\n sha256 = \"5ffad8c6994c477023aba7613bdf17c470003bbd191846d3096e84ffecf86d4c\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zngur-generator/0.10.0/download\"],\n strip_prefix = \"zngur-generator-0.10.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zngur-generator-0.10.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zngur-lib-0.10.0\",\n sha256 = \"274b03b81aaacc390756142ab5ffceb29a1c54817af1dfb265666a31b4cfb116\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zngur-lib/0.10.0/download\"],\n strip_prefix = \"zngur-lib-0.10.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zngur-lib-0.10.0.bazel\"),\n )\n\n maybe(\n http_archive,\n name = \"crates_std__zngur-parser-0.10.0\",\n sha256 = \"8d66c1b85ca6eab9576df5de31758cb1f9046b4ce47b25f45dabcb0fc7ef8789\",\n type = \"tar.gz\",\n urls = [\"https://static.crates.io/crates/zngur-parser/0.10.0/download\"],\n strip_prefix = \"zngur-parser-0.10.0\",\n build_file = Label(\"@crates_std//crates_std:BUILD.zngur-parser-0.10.0.bazel\"),\n )\n\n return [\n struct(repo=\"crates_std__anyhow-1.0.102\", is_dev_dep = False),\n struct(repo=\"crates_std__bitfield-struct-0.12.1\", is_dev_dep = False),\n struct(repo=\"crates_std__bitflags-2.13.0\", is_dev_dep = False),\n struct(repo=\"crates_std__byteorder-1.5.0\", is_dev_dep = False),\n struct(repo=\"crates_std__clap-4.6.1\", is_dev_dep = False),\n struct(repo=\"crates_std__cliclack-0.3.8\", is_dev_dep = False),\n struct(repo=\"crates_std__cortex-m-0.7.7\", is_dev_dep = False),\n struct(repo=\"crates_std__cortex-m-rt-0.7.5\", is_dev_dep = False),\n struct(repo=\"crates_std__cortex-m-semihosting-0.5.0\", is_dev_dep = False),\n struct(repo=\"crates_std__embedded-io-0.6.1\", is_dev_dep = False),\n struct(repo=\"crates_std__futures-0.3.32\", is_dev_dep = False),\n struct(repo=\"crates_std__hashlink-0.10.0\", is_dev_dep = False),\n struct(repo=\"crates_std__hex-0.4.3\", is_dev_dep = False),\n struct(repo=\"crates_std__intrusive-collections-0.9.7\", is_dev_dep = False),\n struct(repo=\"crates_std__libc-0.2.186\", is_dev_dep = False),\n struct(repo=\"crates_std__minijinja-2.20.0\", is_dev_dep = False),\n struct(repo=\"crates_std__nix-0.29.0\", is_dev_dep = False),\n struct(repo=\"crates_std__nom-7.1.3\", is_dev_dep = False),\n struct(repo=\"crates_std__object-0.36.7\", is_dev_dep = False),\n struct(repo=\"crates_std__panic-halt-1.0.0\", is_dev_dep = False),\n struct(repo=\"crates_std__paste-1.0.15\", is_dev_dep = False),\n struct(repo=\"crates_std__proc-macro2-1.0.106\", is_dev_dep = False),\n struct(repo=\"crates_std__prost-0.14.3\", is_dev_dep = False),\n struct(repo=\"crates_std__prost-reflect-0.16.4\", is_dev_dep = False),\n struct(repo=\"crates_std__prost-types-0.14.3\", is_dev_dep = False),\n struct(repo=\"crates_std__protoc-gen-prost-0.5.0\", is_dev_dep = False),\n struct(repo=\"crates_std__psm-0.1.31\", is_dev_dep = False),\n struct(repo=\"crates_std__quote-1.0.45\", is_dev_dep = False),\n struct(repo=\"crates_std__riscv-0.12.1\", is_dev_dep = False),\n struct(repo=\"crates_std__riscv-rt-0.12.2\", is_dev_dep = False),\n struct(repo=\"crates_std__riscv-semihosting-0.1.3\", is_dev_dep = False),\n struct(repo=\"crates_std__rustc-demangle-0.1.27\", is_dev_dep = False),\n struct(repo=\"crates_std__serde-1.0.228\", is_dev_dep = False),\n struct(repo=\"crates_std__serde_json-1.0.150\", is_dev_dep = False),\n struct(repo=\"crates_std__serde_json5-0.2.1\", is_dev_dep = False),\n struct(repo=\"crates_std__syn-2.0.117\", is_dev_dep = False),\n struct(repo=\"crates_std__thiserror-2.0.18\", is_dev_dep = False),\n struct(repo=\"crates_std__tokio-1.52.3\", is_dev_dep = False),\n struct(repo=\"crates_std__tokio-util-0.7.18\", is_dev_dep = False),\n struct(repo=\"crates_std__toml-0.8.23\", is_dev_dep = False),\n struct(repo=\"crates_std__zerocopy-0.8.50\", is_dev_dep = False),\n struct(repo=\"crates_std__zngur-0.10.0\", is_dev_dep = False),\n struct(repo=\"crates_std__zngur-lib-0.10.0\", is_dev_dep = False),\n ]\n" } } }, @@ -7095,7 +7131,7 @@ "https://static.crates.io/crates/aho-corasick/1.1.4/download" ], "strip_prefix": "aho-corasick-1.1.4", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"aho_corasick\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=aho-corasick\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.1.4\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"aho_corasick\",\n deps = [\n \"@crates_std__memchr-2.8.1//:memchr\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"perf-literal\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=aho-corasick\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.1.4\",\n)\n" } }, "crates_std__allocator-api2-0.2.21": { @@ -7242,20 +7278,84 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"ariadne\",\n deps = [\n \"@crates_std__unicode-width-0.1.14//:unicode_width\",\n \"@crates_std__yansi-0.5.1//:yansi\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=ariadne\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.3.0\",\n)\n" } }, - "crates_std__autocfg-1.5.0": { + "crates_std__askama-0.12.1": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "c08606f8c3cbf4ce6ec8e28fb0014a2c086708fe954eaa885384a6165172e7e8", + "sha256": "b79091df18a97caea757e28cd2d5fda49c6cd4bd01ddffd7ff01ace0c0ad2c28", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/autocfg/1.5.0/download" + "https://static.crates.io/crates/askama/0.12.1/download" ], - "strip_prefix": "autocfg-1.5.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"autocfg\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2015\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=autocfg\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.5.0\",\n)\n" + "strip_prefix": "askama-0.12.1", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"askama\",\n deps = [\n \"@crates_std__askama_escape-0.10.3//:askama_escape\",\n \"@crates_std__humansize-2.1.3//:humansize\",\n \"@crates_std__num-traits-0.2.19//:num_traits\",\n \"@crates_std__percent-encoding-2.3.2//:percent_encoding\",\n ],\n proc_macro_deps = [\n \"@crates_std__askama_derive-0.12.5//:askama_derive\",\n ],\n aliases = {\n \"@crates_std__humansize-2.1.3//:humansize\": \"dep_humansize\",\n \"@crates_std__num-traits-0.2.19//:num_traits\": \"dep_num_traits\",\n },\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"config\",\n \"default\",\n \"dep_humansize\",\n \"dep_num_traits\",\n \"humansize\",\n \"num-traits\",\n \"percent-encoding\",\n \"urlencode\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=askama\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.12.1\",\n)\n" + } + }, + "crates_std__askama_derive-0.12.5": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "19fe8d6cb13c4714962c072ea496f3392015f0989b1a2847bb4b2d9effd71d83", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/askama_derive/0.12.5/download" + ], + "strip_prefix": "askama_derive-0.12.5", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"askama_derive\",\n deps = [\n \"@crates_std__askama_parser-0.2.1//:askama_parser\",\n \"@crates_std__basic-toml-0.1.10//:basic_toml\",\n \"@crates_std__mime-0.3.17//:mime\",\n \"@crates_std__mime_guess-2.0.5//:mime_guess\",\n \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n \"@crates_std__quote-1.0.45//:quote\",\n \"@crates_std__serde-1.0.228//:serde\",\n \"@crates_std__syn-2.0.117//:syn\",\n ],\n aliases = {\n \"@crates_std__askama_parser-0.2.1//:askama_parser\": \"parser\",\n },\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"basic-toml\",\n \"config\",\n \"humansize\",\n \"num-traits\",\n \"serde\",\n \"urlencode\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=askama_derive\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.12.5\",\n)\n" + } + }, + "crates_std__askama_escape-0.10.3": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "619743e34b5ba4e9703bba34deac3427c72507c7159f5fd030aea8cac0cfe341", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/askama_escape/0.10.3/download" + ], + "strip_prefix": "askama_escape-0.10.3", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"askama_escape\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=askama_escape\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.10.3\",\n)\n" + } + }, + "crates_std__askama_parser-0.2.1": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "acb1161c6b64d1c3d83108213c2a2533a342ac225aabd0bda218278c2ddb00c0", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/askama_parser/0.2.1/download" + ], + "strip_prefix": "askama_parser-0.2.1", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"askama_parser\",\n deps = [\n \"@crates_std__nom-7.1.3//:nom\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=askama_parser\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.1\",\n)\n" + } + }, + "crates_std__autocfg-1.5.1": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "f2032f911046de80f0a198e0901378627c33f59ea0ac00e363d481118bd70a53", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/autocfg/1.5.1/download" + ], + "strip_prefix": "autocfg-1.5.1", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"autocfg\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2015\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=autocfg\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.5.1\",\n)\n" } }, "crates_std__bare-metal-0.2.5": { @@ -7274,6 +7374,22 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"bare_metal\",\n deps = [\n \"@crates_std__bare-metal-0.2.5//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"const-fn\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2015\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=bare-metal\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.5\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"const-fn\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__rustc_version-0.2.3//:rustc_version\",\n ],\n edition = \"2015\",\n pkg_name = \"bare-metal\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=bare-metal\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.2.5\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, + "crates_std__basic-toml-0.1.10": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "ba62675e8242a4c4e806d12f11d136e626e6c8361d6b829310732241652a178a", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/basic-toml/0.1.10/download" + ], + "strip_prefix": "basic-toml-0.1.10", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"basic_toml\",\n deps = [\n \"@crates_std__serde-1.0.228//:serde\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=basic-toml\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.1.10\",\n)\n" + } + }, "crates_std__bitfield-0.13.2": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { @@ -7306,20 +7422,20 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"bitfield_struct\",\n deps = [\n \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n \"@crates_std__quote-1.0.45//:quote\",\n \"@crates_std__syn-2.0.117//:syn\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=bitfield-struct\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.12.1\",\n)\n" } }, - "crates_std__bitflags-2.11.1": { + "crates_std__bitflags-2.13.0": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "c4512299f36f043ab09a583e57bceb5a5aab7a73db1805848e8fef3c9e8c78b3", + "sha256": "b4388bee8683e3d04af747c73422af53102d2bd24d9eadb6cbc100baef4b43f8", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/bitflags/2.11.1/download" + "https://static.crates.io/crates/bitflags/2.13.0/download" ], - "strip_prefix": "bitflags-2.11.1", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"bitflags\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=bitflags\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.11.1\",\n)\n" + "strip_prefix": "bitflags-2.13.0", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"bitflags\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=bitflags\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.13.0\",\n)\n" } }, "crates_std__block-buffer-0.10.4": { @@ -7338,20 +7454,20 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"block_buffer\",\n deps = [\n \"@crates_std__generic-array-0.14.7//:generic_array\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=block-buffer\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.10.4\",\n)\n" } }, - "crates_std__bumpalo-3.20.2": { + "crates_std__bumpalo-3.20.3": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "5d20789868f4b01b2f2caec9f5c4e0213b41e3e5702a50157d699ae31ced2fcb", + "sha256": "72f5acc6cb2ba439de613abc23857ec3d78374d8ed5ac84e9d11336e87da8649", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/bumpalo/3.20.2/download" + "https://static.crates.io/crates/bumpalo/3.20.3/download" ], - "strip_prefix": "bumpalo-3.20.2", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"bumpalo\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=bumpalo\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"3.20.2\",\n)\n" + "strip_prefix": "bumpalo-3.20.3", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"bumpalo\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=bumpalo\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"3.20.3\",\n)\n" } }, "crates_std__byteorder-1.5.0": { @@ -7386,20 +7502,20 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"bytes\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=bytes\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.11.1\",\n)\n" } }, - "crates_std__cc-1.2.61": { + "crates_std__cc-1.2.63": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "d16d90359e986641506914ba71350897565610e87ce0ad9e6f28569db3dd5c6d", + "sha256": "556e016178bb5662a08681bbe0f00f8e17631781a4dfc8c45e466e4b185ec27f", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/cc/1.2.61/download" + "https://static.crates.io/crates/cc/1.2.63/download" ], - "strip_prefix": "cc-1.2.61", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"cc\",\n deps = [\n \"@crates_std__find-msvc-tools-0.1.9//:find_msvc_tools\",\n \"@crates_std__shlex-1.3.0//:shlex\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=cc\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.2.61\",\n)\n" + "strip_prefix": "cc-1.2.63", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"cc\",\n deps = [\n \"@crates_std__find-msvc-tools-0.1.9//:find_msvc_tools\",\n \"@crates_std__shlex-2.0.1//:shlex\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=cc\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.2.63\",\n)\n" } }, "crates_std__cfg-if-1.0.4": { @@ -7447,7 +7563,7 @@ "https://static.crates.io/crates/chumsky/1.0.0-alpha.8/download" ], "strip_prefix": "chumsky-1.0.0-alpha.8", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"chumsky\",\n deps = [\n \"@crates_std__chumsky-1.0.0-alpha.8//:build_script_build\",\n \"@crates_std__hashbrown-0.15.5//:hashbrown\",\n \"@crates_std__stacker-0.1.24//:stacker\",\n \"@crates_std__unicode-ident-1.0.24//:unicode_ident\",\n \"@crates_std__unicode-segmentation-1.13.2//:unicode_segmentation\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"stacker\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=chumsky\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.0.0-alpha.8\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"stacker\",\n \"std\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"chumsky\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=chumsky\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"1.0.0-alpha.8\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"chumsky\",\n deps = [\n \"@crates_std__chumsky-1.0.0-alpha.8//:build_script_build\",\n \"@crates_std__hashbrown-0.15.5//:hashbrown\",\n \"@crates_std__stacker-0.1.24//:stacker\",\n \"@crates_std__unicode-ident-1.0.24//:unicode_ident\",\n \"@crates_std__unicode-segmentation-1.13.3//:unicode_segmentation\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"stacker\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=chumsky\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.0.0-alpha.8\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"stacker\",\n \"std\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"chumsky\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=chumsky\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"1.0.0-alpha.8\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "crates_std__clap-4.6.1": { @@ -7703,7 +7819,7 @@ "https://static.crates.io/crates/crypto-common/0.1.7/download" ], "strip_prefix": "crypto-common-0.1.7", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"crypto_common\",\n deps = [\n \"@crates_std__generic-array-0.14.7//:generic_array\",\n \"@crates_std__typenum-1.20.0//:typenum\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=crypto-common\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.1.7\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"crypto_common\",\n deps = [\n \"@crates_std__generic-array-0.14.7//:generic_array\",\n \"@crates_std__typenum-1.20.1//:typenum\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=crypto-common\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.1.7\",\n)\n" } }, "crates_std__digest-0.10.7": { @@ -7719,23 +7835,23 @@ "https://static.crates.io/crates/digest/0.10.7/download" ], "strip_prefix": "digest-0.10.7", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"digest\",\n deps = [\n \"@crates_std__block-buffer-0.10.4//:block_buffer\",\n \"@crates_std__crypto-common-0.1.7//:crypto_common\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"block-buffer\",\n \"core-api\",\n \"default\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=digest\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.10.7\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"digest\",\n deps = [\n \"@crates_std__block-buffer-0.10.4//:block_buffer\",\n \"@crates_std__crypto-common-0.1.7//:crypto_common\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"block-buffer\",\n \"core-api\",\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=digest\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.10.7\",\n)\n" } }, - "crates_std__either-1.15.0": { + "crates_std__either-1.16.0": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "48c757948c5ede0e46177b7add2e67155f70e33c07fea8284df6576da70b3719", + "sha256": "91622ff5e7162018101f2fea40d6ebf4a78bbe5a49736a2020649edf9693679e", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/either/1.15.0/download" + "https://static.crates.io/crates/either/1.16.0/download" ], - "strip_prefix": "either-1.15.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"either\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"std\",\n \"use_std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=either\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.15.0\",\n)\n" + "strip_prefix": "either-1.16.0", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"either\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"std\",\n \"use_std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=either\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.16.0\",\n)\n" } }, "crates_std__embedded-hal-0.2.7": { @@ -7898,6 +8014,22 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"flate2\",\n deps = [\n \"@crates_std__crc32fast-1.5.0//:crc32fast\",\n \"@crates_std__miniz_oxide-0.8.9//:miniz_oxide\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"any_impl\",\n \"default\",\n \"miniz_oxide\",\n \"rust_backend\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=flate2\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.1.9\",\n)\n" } }, + "crates_std__fnv-1.0.7": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "3f9eec918d3f24069decb9af1554cad7c880e2da24a9afd88aca000531ab82c1", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/fnv/1.0.7/download" + ], + "strip_prefix": "fnv-1.0.7", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"fnv\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_root = \"lib.rs\",\n edition = \"2015\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=fnv\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.0.7\",\n)\n" + } + }, "crates_std__foldhash-0.1.5": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { @@ -8055,7 +8187,7 @@ "https://static.crates.io/crates/futures-util/0.3.32/download" ], "strip_prefix": "futures-util-0.3.32", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"futures_util\",\n deps = [\n \"@crates_std__futures-channel-0.3.32//:futures_channel\",\n \"@crates_std__futures-core-0.3.32//:futures_core\",\n \"@crates_std__futures-io-0.3.32//:futures_io\",\n \"@crates_std__futures-sink-0.3.32//:futures_sink\",\n \"@crates_std__futures-task-0.3.32//:futures_task\",\n \"@crates_std__memchr-2.8.0//:memchr\",\n \"@crates_std__pin-project-lite-0.2.17//:pin_project_lite\",\n \"@crates_std__slab-0.4.12//:slab\",\n ],\n proc_macro_deps = [\n \"@crates_std__futures-macro-0.3.32//:futures_macro\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"async-await\",\n \"async-await-macro\",\n \"channel\",\n \"futures-channel\",\n \"futures-io\",\n \"futures-macro\",\n \"futures-sink\",\n \"io\",\n \"memchr\",\n \"sink\",\n \"slab\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=futures-util\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.3.32\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"futures_util\",\n deps = [\n \"@crates_std__futures-channel-0.3.32//:futures_channel\",\n \"@crates_std__futures-core-0.3.32//:futures_core\",\n \"@crates_std__futures-io-0.3.32//:futures_io\",\n \"@crates_std__futures-sink-0.3.32//:futures_sink\",\n \"@crates_std__futures-task-0.3.32//:futures_task\",\n \"@crates_std__memchr-2.8.1//:memchr\",\n \"@crates_std__pin-project-lite-0.2.17//:pin_project_lite\",\n \"@crates_std__slab-0.4.12//:slab\",\n ],\n proc_macro_deps = [\n \"@crates_std__futures-macro-0.3.32//:futures_macro\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"async-await\",\n \"async-await-macro\",\n \"channel\",\n \"futures-channel\",\n \"futures-io\",\n \"futures-macro\",\n \"futures-sink\",\n \"io\",\n \"memchr\",\n \"sink\",\n \"slab\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=futures-util\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.3.32\",\n)\n" } }, "crates_std__generic-array-0.14.7": { @@ -8071,7 +8203,7 @@ "https://static.crates.io/crates/generic-array/0.14.7/download" ], "strip_prefix": "generic-array-0.14.7", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"generic_array\",\n deps = [\n \"@crates_std__generic-array-0.14.7//:build_script_build\",\n \"@crates_std__typenum-1.20.0//:typenum\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"more_lengths\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2015\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=generic-array\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.14.7\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"more_lengths\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__version_check-0.9.5//:version_check\",\n ],\n edition = \"2015\",\n pkg_name = \"generic-array\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=generic-array\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.14.7\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"generic_array\",\n deps = [\n \"@crates_std__generic-array-0.14.7//:build_script_build\",\n \"@crates_std__typenum-1.20.1//:typenum\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"more_lengths\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2015\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=generic-array\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.14.7\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"more_lengths\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__version_check-0.9.5//:version_check\",\n ],\n edition = \"2015\",\n pkg_name = \"generic-array\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=generic-array\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.14.7\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "crates_std__getrandom-0.4.2": { @@ -8106,20 +8238,20 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"hashbrown\",\n deps = [\n \"@crates_std__allocator-api2-0.2.21//:allocator_api2\",\n \"@crates_std__equivalent-1.0.2//:equivalent\",\n \"@crates_std__foldhash-0.1.5//:foldhash\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"allocator-api2\",\n \"default\",\n \"default-hasher\",\n \"equivalent\",\n \"inline-more\",\n \"raw-entry\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=hashbrown\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.15.5\",\n)\n" } }, - "crates_std__hashbrown-0.17.0": { + "crates_std__hashbrown-0.17.1": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "4f467dd6dccf739c208452f8014c75c18bb8301b050ad1cfb27153803edb0f51", + "sha256": "ed5909b6e89a2db4456e54cd5f673791d7eca6732202bbf2a9cc504fe2f9b84a", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/hashbrown/0.17.0/download" + "https://static.crates.io/crates/hashbrown/0.17.1/download" ], - "strip_prefix": "hashbrown-0.17.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"hashbrown\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=hashbrown\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.17.0\",\n)\n" + "strip_prefix": "hashbrown-0.17.1", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"hashbrown\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=hashbrown\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.17.1\",\n)\n" } }, "crates_std__hashlink-0.10.0": { @@ -8170,6 +8302,22 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"hex\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=hex\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.4.3\",\n)\n" } }, + "crates_std__humansize-2.1.3": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "6cb51c9a029ddc91b07a787f1d86b53ccfa49b0e86688c946ebe8d3555685dd7", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/humansize/2.1.3/download" + ], + "strip_prefix": "humansize-2.1.3", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"humansize\",\n deps = [\n \"@crates_std__libm-0.2.16//:libm\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=humansize\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.1.3\",\n)\n" + } + }, "crates_std__id-arena-2.3.0": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { @@ -8199,7 +8347,7 @@ "https://static.crates.io/crates/indexmap/2.14.0/download" ], "strip_prefix": "indexmap-2.14.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"indexmap\",\n deps = [\n \"@crates_std__equivalent-1.0.2//:equivalent\",\n \"@crates_std__hashbrown-0.17.0//:hashbrown\",\n \"@crates_std__serde_core-1.0.228//:serde_core\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"serde\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=indexmap\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.14.0\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"indexmap\",\n deps = [\n \"@crates_std__equivalent-1.0.2//:equivalent\",\n \"@crates_std__hashbrown-0.17.1//:hashbrown\",\n \"@crates_std__serde_core-1.0.228//:serde_core\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"serde\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=indexmap\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.14.0\",\n)\n" } }, "crates_std__indicatif-0.18.4": { @@ -8263,7 +8411,7 @@ "https://static.crates.io/crates/itertools/0.11.0/download" ], "strip_prefix": "itertools-0.11.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"itertools\",\n deps = [\n \"@crates_std__either-1.15.0//:either\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"use_alloc\",\n \"use_std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=itertools\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.11.0\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"itertools\",\n deps = [\n \"@crates_std__either-1.16.0//:either\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"use_alloc\",\n \"use_std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=itertools\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.11.0\",\n)\n" } }, "crates_std__itertools-0.14.0": { @@ -8279,7 +8427,7 @@ "https://static.crates.io/crates/itertools/0.14.0/download" ], "strip_prefix": "itertools-0.14.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"itertools\",\n deps = [\n \"@crates_std__either-1.15.0//:either\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"use_alloc\",\n \"use_std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=itertools\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.14.0\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"itertools\",\n deps = [\n \"@crates_std__either-1.16.0//:either\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"use_alloc\",\n \"use_std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=itertools\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.14.0\",\n)\n" } }, "crates_std__itoa-1.0.18": { @@ -8298,20 +8446,20 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"itoa\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=itoa\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.0.18\",\n)\n" } }, - "crates_std__js-sys-0.3.97": { + "crates_std__js-sys-0.3.99": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "a1840c94c045fbcf8ba2812c95db44499f7c64910a912551aaaa541decebcacf", + "sha256": "142bc4740e452c1e57ade0cbc129f139c9093e354346f0872ef985f4f5cf5f11", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/js-sys/0.3.97/download" + "https://static.crates.io/crates/js-sys/0.3.99/download" ], - "strip_prefix": "js-sys-0.3.97", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"js_sys\",\n deps = [\n \"@crates_std__cfg-if-1.0.4//:cfg_if\",\n \"@crates_std__once_cell-1.21.4//:once_cell\",\n \"@crates_std__wasm-bindgen-0.2.120//:wasm_bindgen\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=js-sys\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.3.97\",\n)\n" + "strip_prefix": "js-sys-0.3.99", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"js_sys\",\n deps = [\n \"@crates_std__cfg-if-1.0.4//:cfg_if\",\n \"@crates_std__once_cell-1.21.4//:once_cell\",\n \"@crates_std__wasm-bindgen-0.2.122//:wasm_bindgen\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=js-sys\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.3.99\",\n)\n" } }, "crates_std__leb128fmt-0.1.0": { @@ -8346,6 +8494,22 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"libc\",\n deps = [\n \"@crates_std__libc-0.2.186//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"extra_traits\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=libc\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.186\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"extra_traits\",\n \"std\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"libc\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=libc\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.2.186\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, + "crates_std__libm-0.2.16": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "b6d2cec3eae94f9f509c767b45932f1ada8350c4bdb85af2fcab4a3c14807981", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/libm/0.2.16/download" + ], + "strip_prefix": "libm-0.2.16", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"libm\",\n deps = [\n \"@crates_std__libm-0.2.16//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"arch\",\n \"default\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=libm\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.16\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"arch\",\n \"default\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"libm\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=libm\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.2.16\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + } + }, "crates_std__linux-raw-sys-0.12.1": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { @@ -8378,36 +8542,84 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"lock_api\",\n deps = [\n \"@crates_std__scopeguard-1.2.0//:scopeguard\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"atomic_usize\",\n \"default\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=lock_api\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.4.14\",\n)\n" } }, - "crates_std__log-0.4.29": { + "crates_std__log-0.4.32": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "5e5032e24019045c762d3c0f28f5b6b8bbf38563a65908389bf7978758920897", + "sha256": "953f07c43838f8e6f9758cab68bf5bed85465e7587ebe0b823f1bcd81978ad3a", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/log/0.4.29/download" + "https://static.crates.io/crates/log/0.4.32/download" ], - "strip_prefix": "log-0.4.29", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"log\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=log\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.4.29\",\n)\n" + "strip_prefix": "log-0.4.32", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"log\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=log\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.4.32\",\n)\n" } }, - "crates_std__memchr-2.8.0": { + "crates_std__logos-0.16.1": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "f8ca58f447f06ed17d5fc4043ce1b10dd205e060fb3ce5b979b8ed8e59ff3f79", + "sha256": "eb2c55a318a87600ea870ff8c2012148b44bf18b74fad48d0f835c38c7d07c5f", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/memchr/2.8.0/download" + "https://static.crates.io/crates/logos/0.16.1/download" ], - "strip_prefix": "memchr-2.8.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"memchr\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=memchr\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.8.0\",\n)\n" + "strip_prefix": "logos-0.16.1", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"logos\",\n proc_macro_deps = [\n \"@crates_std__logos-derive-0.16.1//:logos_derive\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"export_derive\",\n \"logos-derive\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=logos\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.16.1\",\n)\n" + } + }, + "crates_std__logos-codegen-0.16.1": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "58b3ffaa284e1350d017a57d04ada118c4583cf260c8fb01e0fe28a2e9cf8970", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/logos-codegen/0.16.1/download" + ], + "strip_prefix": "logos-codegen-0.16.1", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"logos_codegen\",\n deps = [\n \"@crates_std__fnv-1.0.7//:fnv\",\n \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n \"@crates_std__quote-1.0.45//:quote\",\n \"@crates_std__regex-automata-0.4.14//:regex_automata\",\n \"@crates_std__regex-syntax-0.8.10//:regex_syntax\",\n \"@crates_std__syn-2.0.117//:syn\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=logos-codegen\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.16.1\",\n)\n" + } + }, + "crates_std__logos-derive-0.16.1": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "52d3a9855747c17eaf4383823f135220716ab49bea5fbea7dd42cc9a92f8aa31", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/logos-derive/0.16.1/download" + ], + "strip_prefix": "logos-derive-0.16.1", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"logos_derive\",\n deps = [\n \"@crates_std__logos-codegen-0.16.1//:logos_codegen\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=logos-derive\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.16.1\",\n)\n" + } + }, + "crates_std__memchr-2.8.1": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "6b947ae49db0d222b1dbc6b113ce7248a3fc3a6ca21b696717bfc000ba4484d8", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/memchr/2.8.1/download" + ], + "strip_prefix": "memchr-2.8.1", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"memchr\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=memchr\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.8.1\",\n)\n" } }, "crates_std__memo-map-0.3.3": { @@ -8439,23 +8651,55 @@ "https://static.crates.io/crates/memoffset/0.9.1/download" ], "strip_prefix": "memoffset-0.9.1", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"memoffset\",\n deps = [\n \"@crates_std__memoffset-0.9.1//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2015\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=memoffset\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.9.1\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__autocfg-1.5.0//:autocfg\",\n ],\n edition = \"2015\",\n pkg_name = \"memoffset\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=memoffset\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.9.1\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"memoffset\",\n deps = [\n \"@crates_std__memoffset-0.9.1//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2015\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=memoffset\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.9.1\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__autocfg-1.5.1//:autocfg\",\n ],\n edition = \"2015\",\n pkg_name = \"memoffset\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=memoffset\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.9.1\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, - "crates_std__minijinja-2.19.0": { + "crates_std__mime-0.3.17": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "805bfd7352166bae857ee569628b52bcd85a1cecf7810861ebceb1686b72b75d", + "sha256": "6877bb514081ee2a7ff5ef9de3281f14a4dd4bceac4c09388074a6b5df8a139a", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/minijinja/2.19.0/download" + "https://static.crates.io/crates/mime/0.3.17/download" ], - "strip_prefix": "minijinja-2.19.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"minijinja\",\n deps = [\n \"@crates_std__memo-map-0.3.3//:memo_map\",\n \"@crates_std__serde-1.0.228//:serde\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"adjacent_loop_items\",\n \"builtins\",\n \"debug\",\n \"default\",\n \"deserialization\",\n \"loader\",\n \"macros\",\n \"multi_template\",\n \"serde\",\n \"std_collections\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=minijinja\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.19.0\",\n)\n" + "strip_prefix": "mime-0.3.17", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"mime\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2015\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=mime\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.3.17\",\n)\n" + } + }, + "crates_std__mime_guess-2.0.5": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "f7c44f8e672c00fe5308fa235f821cb4198414e1c77935c1ab6948d3fd78550e", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/mime_guess/2.0.5/download" + ], + "strip_prefix": "mime_guess-2.0.5", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"mime_guess\",\n deps = [\n \"@crates_std__mime-0.3.17//:mime\",\n \"@crates_std__mime_guess-2.0.5//:build_script_build\",\n \"@crates_std__unicase-2.9.0//:unicase\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"rev-mappings\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2015\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=mime_guess\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.0.5\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"rev-mappings\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__unicase-2.9.0//:unicase\",\n ],\n edition = \"2015\",\n pkg_name = \"mime_guess\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=mime_guess\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"2.0.5\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + } + }, + "crates_std__minijinja-2.20.0": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "2929e494b2280e1e18959bb2e121da03347ae896896fdfaceaab43c88a02803f", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/minijinja/2.20.0/download" + ], + "strip_prefix": "minijinja-2.20.0", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"minijinja\",\n deps = [\n \"@crates_std__memo-map-0.3.3//:memo_map\",\n \"@crates_std__serde-1.0.228//:serde\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"adjacent_loop_items\",\n \"builtins\",\n \"debug\",\n \"default\",\n \"deserialization\",\n \"loader\",\n \"macros\",\n \"multi_template\",\n \"serde\",\n \"std_collections\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=minijinja\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.20.0\",\n)\n" } }, "crates_std__minimal-lexical-0.2.1": { @@ -8490,20 +8734,20 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"miniz_oxide\",\n deps = [\n \"@crates_std__adler2-2.0.1//:adler2\",\n \"@crates_std__simd-adler32-0.3.9//:simd_adler32\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"simd\",\n \"simd-adler32\",\n \"with-alloc\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=miniz_oxide\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.8.9\",\n)\n" } }, - "crates_std__mio-1.2.0": { + "crates_std__mio-1.2.1": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "50b7e5b27aa02a74bac8c3f23f448f8d87ff11f92d3aac1a6ed369ee08cc56c1", + "sha256": "02bd0af71c67b473010cbbc60715ee815645a4dc942899111f494b4b737d6fda", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/mio/1.2.0/download" + "https://static.crates.io/crates/mio/1.2.1/download" ], - "strip_prefix": "mio-1.2.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"mio\",\n deps = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"hermit\", target_os = \"wasi\"))\n ],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"hermit\", target_os = \"wasi\"))\n ],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"hermit\", target_os = \"wasi\"))\n ],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"hermit\", target_os = \"wasi\"))\n ],\n \"//conditions:default\": [],\n }),\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"net\",\n \"os-ext\",\n \"os-poll\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=mio\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.2.0\",\n)\n" + "strip_prefix": "mio-1.2.1", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"mio\",\n deps = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"hermit\", target_os = \"wasi\"))\n ],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"hermit\", target_os = \"wasi\"))\n ],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"hermit\", target_os = \"wasi\"))\n ],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"hermit\", target_os = \"wasi\"))\n ],\n \"//conditions:default\": [],\n }),\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"net\",\n \"os-ext\",\n \"os-poll\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=mio\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.2.1\",\n)\n" } }, "crates_std__multimap-0.10.1": { @@ -8567,7 +8811,7 @@ "https://static.crates.io/crates/nix/0.29.0/download" ], "strip_prefix": "nix-0.29.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"nix\",\n deps = [\n \"@crates_std__bitflags-2.11.1//:bitflags\",\n \"@crates_std__cfg-if-1.0.4//:cfg_if\",\n \"@crates_std__libc-0.2.186//:libc\",\n \"@crates_std__nix-0.29.0//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"fs\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=nix\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.29.0\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"fs\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__cfg_aliases-0.2.1//:cfg_aliases\",\n ],\n edition = \"2021\",\n pkg_name = \"nix\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=nix\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.29.0\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"nix\",\n deps = [\n \"@crates_std__bitflags-2.13.0//:bitflags\",\n \"@crates_std__cfg-if-1.0.4//:cfg_if\",\n \"@crates_std__libc-0.2.186//:libc\",\n \"@crates_std__nix-0.29.0//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"fs\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=nix\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.29.0\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"fs\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__cfg_aliases-0.2.1//:cfg_aliases\",\n ],\n edition = \"2021\",\n pkg_name = \"nix\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=nix\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.29.0\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "crates_std__nom-7.1.3": { @@ -8583,7 +8827,23 @@ "https://static.crates.io/crates/nom/7.1.3/download" ], "strip_prefix": "nom-7.1.3", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"nom\",\n deps = [\n \"@crates_std__memchr-2.8.0//:memchr\",\n \"@crates_std__minimal-lexical-0.2.1//:minimal_lexical\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=nom\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"7.1.3\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"nom\",\n deps = [\n \"@crates_std__memchr-2.8.1//:memchr\",\n \"@crates_std__minimal-lexical-0.2.1//:minimal_lexical\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=nom\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"7.1.3\",\n)\n" + } + }, + "crates_std__num-traits-0.2.19": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "071dfc062690e90b734c0b2273ce72ad0ffa95f0c74596bc250dcfd960262841", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/num-traits/0.2.19/download" + ], + "strip_prefix": "num-traits-0.2.19", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"num_traits\",\n deps = [\n \"@crates_std__num-traits-0.2.19//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=num-traits\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.19\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__autocfg-1.5.1//:autocfg\",\n ],\n edition = \"2021\",\n pkg_name = \"num-traits\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=num-traits\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.2.19\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "crates_std__object-0.36.7": { @@ -8599,7 +8859,7 @@ "https://static.crates.io/crates/object/0.36.7/download" ], "strip_prefix": "object-0.36.7", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"object\",\n deps = [\n \"@crates_std__crc32fast-1.5.0//:crc32fast\",\n \"@crates_std__flate2-1.1.9//:flate2\",\n \"@crates_std__hashbrown-0.15.5//:hashbrown\",\n \"@crates_std__indexmap-2.14.0//:indexmap\",\n \"@crates_std__memchr-2.8.0//:memchr\",\n \"@crates_std__object-0.36.7//:build_script_build\",\n \"@crates_std__ruzstd-0.7.3//:ruzstd\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"archive\",\n \"build\",\n \"build_core\",\n \"coff\",\n \"compression\",\n \"default\",\n \"elf\",\n \"macho\",\n \"pe\",\n \"read\",\n \"read_core\",\n \"std\",\n \"unaligned\",\n \"write\",\n \"write_core\",\n \"write_std\",\n \"xcoff\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=object\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.36.7\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"archive\",\n \"build\",\n \"build_core\",\n \"coff\",\n \"compression\",\n \"default\",\n \"elf\",\n \"macho\",\n \"pe\",\n \"read\",\n \"read_core\",\n \"std\",\n \"unaligned\",\n \"write\",\n \"write_core\",\n \"write_std\",\n \"xcoff\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2018\",\n pkg_name = \"object\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=object\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.36.7\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"object\",\n deps = [\n \"@crates_std__crc32fast-1.5.0//:crc32fast\",\n \"@crates_std__flate2-1.1.9//:flate2\",\n \"@crates_std__hashbrown-0.15.5//:hashbrown\",\n \"@crates_std__indexmap-2.14.0//:indexmap\",\n \"@crates_std__memchr-2.8.1//:memchr\",\n \"@crates_std__object-0.36.7//:build_script_build\",\n \"@crates_std__ruzstd-0.7.3//:ruzstd\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"archive\",\n \"build\",\n \"build_core\",\n \"coff\",\n \"compression\",\n \"default\",\n \"elf\",\n \"macho\",\n \"pe\",\n \"read\",\n \"read_core\",\n \"std\",\n \"unaligned\",\n \"write\",\n \"write_core\",\n \"write_std\",\n \"xcoff\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=object\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.36.7\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"archive\",\n \"build\",\n \"build_core\",\n \"coff\",\n \"compression\",\n \"default\",\n \"elf\",\n \"macho\",\n \"pe\",\n \"read\",\n \"read_core\",\n \"std\",\n \"unaligned\",\n \"write\",\n \"write_core\",\n \"write_std\",\n \"xcoff\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2018\",\n pkg_name = \"object\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=object\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.36.7\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "crates_std__object-0.37.3": { @@ -8615,7 +8875,7 @@ "https://static.crates.io/crates/object/0.37.3/download" ], "strip_prefix": "object-0.37.3", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"object\",\n deps = [\n \"@crates_std__memchr-2.8.0//:memchr\",\n \"@crates_std__object-0.37.3//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"archive\",\n \"coff\",\n \"elf\",\n \"macho\",\n \"pe\",\n \"read\",\n \"read_core\",\n \"std\",\n \"unaligned\",\n \"xcoff\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=object\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.37.3\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"archive\",\n \"coff\",\n \"elf\",\n \"macho\",\n \"pe\",\n \"read\",\n \"read_core\",\n \"std\",\n \"unaligned\",\n \"xcoff\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2018\",\n pkg_name = \"object\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=object\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.37.3\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"object\",\n deps = [\n \"@crates_std__memchr-2.8.1//:memchr\",\n \"@crates_std__object-0.37.3//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"archive\",\n \"coff\",\n \"elf\",\n \"macho\",\n \"pe\",\n \"read\",\n \"read_core\",\n \"std\",\n \"unaligned\",\n \"xcoff\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=object\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.37.3\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"archive\",\n \"coff\",\n \"elf\",\n \"macho\",\n \"pe\",\n \"read\",\n \"read_core\",\n \"std\",\n \"unaligned\",\n \"xcoff\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2018\",\n pkg_name = \"object\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=object\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.37.3\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "crates_std__once_cell-1.21.4": { @@ -8714,6 +8974,22 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"paste\",\n deps = [\n \"@crates_std__paste-1.0.15//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=paste\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.0.15\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2018\",\n pkg_name = \"paste\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=paste\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"1.0.15\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, + "crates_std__percent-encoding-2.3.2": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "9b4f627cb1b25917193a259e49bdad08f671f8d9708acfd5fe0a8c1455d87220", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/percent-encoding/2.3.2/download" + ], + "strip_prefix": "percent-encoding-2.3.2", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"percent_encoding\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=percent-encoding\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.3.2\",\n)\n" + } + }, "crates_std__pest-2.8.6": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { @@ -8727,7 +9003,7 @@ "https://static.crates.io/crates/pest/2.8.6/download" ], "strip_prefix": "pest-2.8.6", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"pest\",\n deps = [\n \"@crates_std__memchr-2.8.0//:memchr\",\n \"@crates_std__ucd-trie-0.1.7//:ucd_trie\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"memchr\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=pest\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.8.6\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"pest\",\n deps = [\n \"@crates_std__memchr-2.8.1//:memchr\",\n \"@crates_std__ucd-trie-0.1.7//:ucd_trie\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"memchr\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=pest\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.8.6\",\n)\n" } }, "crates_std__pest_derive-2.8.6": { @@ -8887,7 +9163,7 @@ "https://static.crates.io/crates/prost-build/0.14.3/download" ], "strip_prefix": "prost-build-0.14.3", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"prost_build\",\n deps = [\n \"@crates_std__heck-0.5.0//:heck\",\n \"@crates_std__itertools-0.14.0//:itertools\",\n \"@crates_std__log-0.4.29//:log\",\n \"@crates_std__multimap-0.10.1//:multimap\",\n \"@crates_std__petgraph-0.8.3//:petgraph\",\n \"@crates_std__prost-0.14.3//:prost\",\n \"@crates_std__prost-types-0.14.3//:prost_types\",\n \"@crates_std__regex-1.12.3//:regex\",\n \"@crates_std__tempfile-3.27.0//:tempfile\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=prost-build\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.14.3\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"prost_build\",\n deps = [\n \"@crates_std__heck-0.5.0//:heck\",\n \"@crates_std__itertools-0.14.0//:itertools\",\n \"@crates_std__log-0.4.32//:log\",\n \"@crates_std__multimap-0.10.1//:multimap\",\n \"@crates_std__petgraph-0.8.3//:petgraph\",\n \"@crates_std__prost-0.14.3//:prost\",\n \"@crates_std__prost-types-0.14.3//:prost_types\",\n \"@crates_std__regex-1.12.3//:regex\",\n \"@crates_std__tempfile-3.27.0//:tempfile\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=prost-build\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.14.3\",\n)\n" } }, "crates_std__prost-derive-0.14.3": { @@ -8906,6 +9182,22 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"prost_derive\",\n deps = [\n \"@crates_std__anyhow-1.0.102//:anyhow\",\n \"@crates_std__itertools-0.14.0//:itertools\",\n \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n \"@crates_std__quote-1.0.45//:quote\",\n \"@crates_std__syn-2.0.117//:syn\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=prost-derive\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.14.3\",\n)\n" } }, + "crates_std__prost-reflect-0.16.4": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "590aa145fee8f7a26b5a6055365e7c5e89a5c1caae9869de76ec0ee73181a2f9", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/prost-reflect/0.16.4/download" + ], + "strip_prefix": "prost-reflect-0.16.4", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"prost_reflect\",\n deps = [\n \"@crates_std__logos-0.16.1//:logos\",\n \"@crates_std__prost-0.14.3//:prost\",\n \"@crates_std__prost-types-0.14.3//:prost_types\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"text-format\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=prost-reflect\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.16.4\",\n)\n" + } + }, "crates_std__prost-types-0.14.3": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { @@ -8951,7 +9243,7 @@ "https://static.crates.io/crates/psm/0.1.31/download" ], "strip_prefix": "psm-0.1.31", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"psm\",\n deps = [\n \"@crates_std__psm-0.1.31//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=psm\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.1.31\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__ar_archive_writer-0.5.1//:ar_archive_writer\",\n \"@crates_std__cc-1.2.61//:cc\",\n ],\n edition = \"2021\",\n pkg_name = \"psm\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=psm\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.1.31\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"psm\",\n deps = [\n \"@crates_std__psm-0.1.31//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=psm\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.1.31\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__ar_archive_writer-0.5.1//:ar_archive_writer\",\n \"@crates_std__cc-1.2.63//:cc\",\n ],\n edition = \"2021\",\n pkg_name = \"psm\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=psm\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.1.31\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "crates_std__quote-1.0.45": { @@ -8999,7 +9291,7 @@ "https://static.crates.io/crates/redox_syscall/0.5.18/download" ], "strip_prefix": "redox_syscall-0.5.18", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"syscall\",\n deps = [\n \"@crates_std__bitflags-2.11.1//:bitflags\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=redox_syscall\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.5.18\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"syscall\",\n deps = [\n \"@crates_std__bitflags-2.13.0//:bitflags\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=redox_syscall\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.5.18\",\n)\n" } }, "crates_std__regex-1.12.3": { @@ -9047,7 +9339,7 @@ "https://static.crates.io/crates/regex-automata/0.4.14/download" ], "strip_prefix": "regex-automata-0.4.14", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"regex_automata\",\n deps = [\n \"@crates_std__regex-syntax-0.8.10//:regex_syntax\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"meta\",\n \"nfa-pikevm\",\n \"nfa-thompson\",\n \"std\",\n \"syntax\",\n \"unicode-bool\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=regex-automata\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.4.14\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"regex_automata\",\n deps = [\n \"@crates_std__aho-corasick-1.1.4//:aho_corasick\",\n \"@crates_std__memchr-2.8.1//:memchr\",\n \"@crates_std__regex-syntax-0.8.10//:regex_syntax\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"default\",\n \"dfa\",\n \"dfa-build\",\n \"dfa-onepass\",\n \"dfa-search\",\n \"hybrid\",\n \"meta\",\n \"nfa\",\n \"nfa-backtrack\",\n \"nfa-pikevm\",\n \"nfa-thompson\",\n \"perf\",\n \"perf-inline\",\n \"perf-literal\",\n \"perf-literal-multisubstring\",\n \"perf-literal-substring\",\n \"std\",\n \"syntax\",\n \"unicode\",\n \"unicode-age\",\n \"unicode-bool\",\n \"unicode-case\",\n \"unicode-gencat\",\n \"unicode-perl\",\n \"unicode-script\",\n \"unicode-segment\",\n \"unicode-word-boundary\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=regex-automata\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.4.14\",\n)\n" } }, "crates_std__regex-syntax-0.7.5": { @@ -9079,7 +9371,7 @@ "https://static.crates.io/crates/regex-syntax/0.8.10/download" ], "strip_prefix": "regex-syntax-0.8.10", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"regex_syntax\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"std\",\n \"unicode-bool\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=regex-syntax\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.8.10\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"regex_syntax\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n \"unicode\",\n \"unicode-age\",\n \"unicode-bool\",\n \"unicode-case\",\n \"unicode-gencat\",\n \"unicode-perl\",\n \"unicode-script\",\n \"unicode-segment\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=regex-syntax\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.8.10\",\n)\n" } }, "crates_std__riscv-0.11.1": { @@ -9271,7 +9563,7 @@ "https://static.crates.io/crates/rustix/1.1.4/download" ], "strip_prefix": "rustix-1.1.4", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"rustix\",\n deps = [\n \"@crates_std__bitflags-2.11.1//:bitflags\",\n \"@crates_std__rustix-1.1.4//:build_script_build\",\n ] + select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n \"@crates_std__errno-0.3.14//:errno\", # aarch64-apple-darwin, cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n \"@crates_std__libc-0.2.186//:libc\", # aarch64-apple-darwin, cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n ],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n \"@crates_std__linux-raw-sys-0.12.1//:linux_raw_sys\", # cfg(all(not(rustix_use_libc), not(miri), target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))\n ],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [\n \"@crates_std__errno-0.3.14//:errno\", # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))))), x86_64-apple-darwin\n \"@crates_std__libc-0.2.186//:libc\", # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))))), x86_64-apple-darwin\n ],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n \"@crates_std__linux-raw-sys-0.12.1//:linux_raw_sys\", # cfg(all(not(rustix_use_libc), not(miri), target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))\n ],\n \"//conditions:default\": [],\n }),\n aliases = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": {\n \"@crates_std__errno-0.3.14//:errno\": \"libc_errno\", # aarch64-apple-darwin, cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n },\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": {\n \"@crates_std__errno-0.3.14//:errno\": \"libc_errno\", # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))))), x86_64-apple-darwin\n },\n \"//conditions:default\": {},\n }),\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"default\",\n \"fs\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=rustix\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.1.4\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"default\",\n \"fs\",\n \"std\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"rustix\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=rustix\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"1.1.4\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"rustix\",\n deps = [\n \"@crates_std__bitflags-2.13.0//:bitflags\",\n \"@crates_std__rustix-1.1.4//:build_script_build\",\n ] + select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n \"@crates_std__errno-0.3.14//:errno\", # aarch64-apple-darwin, cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n \"@crates_std__libc-0.2.186//:libc\", # aarch64-apple-darwin, cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n ],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n \"@crates_std__linux-raw-sys-0.12.1//:linux_raw_sys\", # cfg(all(not(rustix_use_libc), not(miri), target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))\n ],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [\n \"@crates_std__errno-0.3.14//:errno\", # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))))), x86_64-apple-darwin\n \"@crates_std__libc-0.2.186//:libc\", # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))))), x86_64-apple-darwin\n ],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n \"@crates_std__linux-raw-sys-0.12.1//:linux_raw_sys\", # cfg(all(not(rustix_use_libc), not(miri), target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))\n ],\n \"//conditions:default\": [],\n }),\n aliases = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": {\n \"@crates_std__errno-0.3.14//:errno\": \"libc_errno\", # aarch64-apple-darwin, cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n },\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": {\n \"@crates_std__errno-0.3.14//:errno\": \"libc_errno\", # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", any(target_endian = \"little\", any(target_arch = \"s390x\", target_arch = \"powerpc\")), any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc\"), all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"s390x\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))))), x86_64-apple-darwin\n },\n \"//conditions:default\": {},\n }),\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"default\",\n \"fs\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=rustix\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.1.4\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"alloc\",\n \"default\",\n \"fs\",\n \"std\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"rustix\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=rustix\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"1.1.4\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "crates_std__rustversion-1.0.22": { @@ -9418,20 +9710,20 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"serde_derive\",\n deps = [\n \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n \"@crates_std__quote-1.0.45//:quote\",\n \"@crates_std__syn-2.0.117//:syn\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=serde_derive\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.0.228\",\n)\n" } }, - "crates_std__serde_json-1.0.149": { + "crates_std__serde_json-1.0.150": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "83fc039473c5595ace860d8c4fafa220ff474b3fc6bfdb4293327f1a37e94d86", + "sha256": "e8014e44b4736ed0538adeecded0fce2a272f22dc9578a7eb6b2d9993c74cfb9", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/serde_json/1.0.149/download" + "https://static.crates.io/crates/serde_json/1.0.150/download" ], - "strip_prefix": "serde_json-1.0.149", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"serde_json\",\n deps = [\n \"@crates_std__itoa-1.0.18//:itoa\",\n \"@crates_std__memchr-2.8.0//:memchr\",\n \"@crates_std__serde_core-1.0.228//:serde_core\",\n \"@crates_std__serde_json-1.0.149//:build_script_build\",\n \"@crates_std__zmij-1.0.21//:zmij\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=serde_json\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.0.149\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"serde_json\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=serde_json\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"1.0.149\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "strip_prefix": "serde_json-1.0.150", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"serde_json\",\n deps = [\n \"@crates_std__itoa-1.0.18//:itoa\",\n \"@crates_std__memchr-2.8.1//:memchr\",\n \"@crates_std__serde_core-1.0.228//:serde_core\",\n \"@crates_std__serde_json-1.0.150//:build_script_build\",\n \"@crates_std__zmij-1.0.21//:zmij\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=serde_json\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.0.150\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"serde_json\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=serde_json\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"1.0.150\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "crates_std__serde_json5-0.2.1": { @@ -9479,23 +9771,23 @@ "https://static.crates.io/crates/sha2/0.10.9/download" ], "strip_prefix": "sha2-0.10.9", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"sha2\",\n deps = [\n \"@crates_std__cfg-if-1.0.4//:cfg_if\",\n \"@crates_std__digest-0.10.7//:digest\",\n ] + select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n \"@crates_std__cpufeatures-0.2.17//:cpufeatures\", # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n ],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n \"@crates_std__cpufeatures-0.2.17//:cpufeatures\", # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n ],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [\n \"@crates_std__cpufeatures-0.2.17//:cpufeatures\", # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n ],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n \"@crates_std__cpufeatures-0.2.17//:cpufeatures\", # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n ],\n \"//conditions:default\": [],\n }),\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=sha2\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.10.9\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"sha2\",\n deps = [\n \"@crates_std__cfg-if-1.0.4//:cfg_if\",\n \"@crates_std__digest-0.10.7//:digest\",\n ] + select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n \"@crates_std__cpufeatures-0.2.17//:cpufeatures\", # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n ],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n \"@crates_std__cpufeatures-0.2.17//:cpufeatures\", # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n ],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [\n \"@crates_std__cpufeatures-0.2.17//:cpufeatures\", # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n ],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n \"@crates_std__cpufeatures-0.2.17//:cpufeatures\", # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n ],\n \"//conditions:default\": [],\n }),\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=sha2\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.10.9\",\n)\n" } }, - "crates_std__shlex-1.3.0": { + "crates_std__shlex-2.0.1": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "0fda2ff0d084019ba4d7c6f371c95d8fd75ce3524c3cb8fb653a3023f6323e64", + "sha256": "f8fadd59c855ef2080decdef8ff161eb6661b86933c9d82e5ba29dc602a55aba", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/shlex/1.3.0/download" + "https://static.crates.io/crates/shlex/2.0.1/download" ], - "strip_prefix": "shlex-1.3.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"shlex\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2015\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=shlex\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.3.0\",\n)\n" + "strip_prefix": "shlex-2.0.1", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"shlex\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"default\",\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=shlex\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.0.1\",\n)\n" } }, "crates_std__signal-hook-registry-1.4.8": { @@ -9578,20 +9870,20 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"smawk\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=smawk\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.3.2\",\n)\n" } }, - "crates_std__socket2-0.6.3": { + "crates_std__socket2-0.6.4": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "3a766e1110788c36f4fa1c2b71b387a7815aa65f88ce0229841826633d93723e", + "sha256": "52d1cfed4120b4d927bf7c0f86d2087a4a7d6027c906d9f9d525a80573b9be51", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/socket2/0.6.3/download" + "https://static.crates.io/crates/socket2/0.6.4/download" ], - "strip_prefix": "socket2-0.6.3", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"socket2\",\n deps = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"wasi\"))\n ],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"wasi\"))\n ],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"wasi\"))\n ],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"wasi\"))\n ],\n \"//conditions:default\": [],\n }),\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"all\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=socket2\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.6.3\",\n)\n" + "strip_prefix": "socket2-0.6.4", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"socket2\",\n deps = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"wasi\"))\n ],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"wasi\"))\n ],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"wasi\"))\n ],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n \"@crates_std__libc-0.2.186//:libc\", # cfg(any(unix, target_os = \"wasi\"))\n ],\n \"//conditions:default\": [],\n }),\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"all\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=socket2\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.6.4\",\n)\n" } }, "crates_std__stacker-0.1.24": { @@ -9607,7 +9899,7 @@ "https://static.crates.io/crates/stacker/0.1.24/download" ], "strip_prefix": "stacker-0.1.24", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"stacker\",\n deps = [\n \"@crates_std__cfg-if-1.0.4//:cfg_if\",\n \"@crates_std__libc-0.2.186//:libc\",\n \"@crates_std__psm-0.1.31//:psm\",\n \"@crates_std__stacker-0.1.24//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=stacker\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.1.24\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__cc-1.2.61//:cc\",\n ],\n edition = \"2021\",\n pkg_name = \"stacker\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=stacker\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.1.24\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"stacker\",\n deps = [\n \"@crates_std__cfg-if-1.0.4//:cfg_if\",\n \"@crates_std__libc-0.2.186//:libc\",\n \"@crates_std__psm-0.1.31//:psm\",\n \"@crates_std__stacker-0.1.24//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=stacker\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.1.24\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n deps = [\n \"@crates_std__cc-1.2.63//:cc\",\n ],\n edition = \"2021\",\n pkg_name = \"stacker\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=stacker\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.1.24\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "crates_std__static_assertions-1.1.0": { @@ -9722,20 +10014,20 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"thiserror_impl\",\n deps = [\n \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n \"@crates_std__quote-1.0.45//:quote\",\n \"@crates_std__syn-2.0.117//:syn\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=thiserror-impl\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.0.18\",\n)\n" } }, - "crates_std__tokio-1.52.1": { + "crates_std__tokio-1.52.3": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "b67dee974fe86fd92cc45b7a95fdd2f99a36a6d7b0d431a231178d3d670bbcc6", + "sha256": "8fc7f01b389ac15039e4dc9531aa973a135d7a4135281b12d7c1bc79fd57fffe", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/tokio/1.52.1/download" + "https://static.crates.io/crates/tokio/1.52.3/download" ], - "strip_prefix": "tokio-1.52.1", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"tokio\",\n deps = [\n \"@crates_std__bytes-1.11.1//:bytes\",\n \"@crates_std__libc-0.2.186//:libc\",\n \"@crates_std__mio-1.2.0//:mio\",\n \"@crates_std__parking_lot-0.12.5//:parking_lot\",\n \"@crates_std__pin-project-lite-0.2.17//:pin_project_lite\",\n \"@crates_std__signal-hook-registry-1.4.8//:signal_hook_registry\",\n \"@crates_std__socket2-0.6.3//:socket2\",\n ],\n proc_macro_deps = [\n \"@crates_std__tokio-macros-2.7.0//:tokio_macros\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"bytes\",\n \"default\",\n \"fs\",\n \"full\",\n \"io-std\",\n \"io-util\",\n \"libc\",\n \"macros\",\n \"mio\",\n \"net\",\n \"parking_lot\",\n \"process\",\n \"rt\",\n \"rt-multi-thread\",\n \"signal\",\n \"signal-hook-registry\",\n \"socket2\",\n \"sync\",\n \"time\",\n \"tokio-macros\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=tokio\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.52.1\",\n)\n" + "strip_prefix": "tokio-1.52.3", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"tokio\",\n deps = [\n \"@crates_std__bytes-1.11.1//:bytes\",\n \"@crates_std__libc-0.2.186//:libc\",\n \"@crates_std__mio-1.2.1//:mio\",\n \"@crates_std__parking_lot-0.12.5//:parking_lot\",\n \"@crates_std__pin-project-lite-0.2.17//:pin_project_lite\",\n \"@crates_std__signal-hook-registry-1.4.8//:signal_hook_registry\",\n \"@crates_std__socket2-0.6.4//:socket2\",\n ],\n proc_macro_deps = [\n \"@crates_std__tokio-macros-2.7.0//:tokio_macros\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"bytes\",\n \"default\",\n \"fs\",\n \"full\",\n \"io-std\",\n \"io-util\",\n \"libc\",\n \"macros\",\n \"mio\",\n \"net\",\n \"parking_lot\",\n \"process\",\n \"rt\",\n \"rt-multi-thread\",\n \"signal\",\n \"signal-hook-registry\",\n \"socket2\",\n \"sync\",\n \"time\",\n \"tokio-macros\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=tokio\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.52.3\",\n)\n" } }, "crates_std__tokio-macros-2.7.0": { @@ -9767,7 +10059,7 @@ "https://static.crates.io/crates/tokio-util/0.7.18/download" ], "strip_prefix": "tokio-util-0.7.18", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"tokio_util\",\n deps = [\n \"@crates_std__bytes-1.11.1//:bytes\",\n \"@crates_std__futures-core-0.3.32//:futures_core\",\n \"@crates_std__futures-io-0.3.32//:futures_io\",\n \"@crates_std__futures-sink-0.3.32//:futures_sink\",\n \"@crates_std__pin-project-lite-0.2.17//:pin_project_lite\",\n \"@crates_std__tokio-1.52.1//:tokio\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"compat\",\n \"default\",\n \"futures-io\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=tokio-util\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.7.18\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"tokio_util\",\n deps = [\n \"@crates_std__bytes-1.11.1//:bytes\",\n \"@crates_std__futures-core-0.3.32//:futures_core\",\n \"@crates_std__futures-io-0.3.32//:futures_io\",\n \"@crates_std__futures-sink-0.3.32//:futures_sink\",\n \"@crates_std__pin-project-lite-0.2.17//:pin_project_lite\",\n \"@crates_std__tokio-1.52.3//:tokio\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"compat\",\n \"default\",\n \"futures-io\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=tokio-util\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.7.18\",\n)\n" } }, "crates_std__toml-0.8.23": { @@ -9850,20 +10142,20 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"twox_hash\",\n deps = [\n \"@crates_std__cfg-if-1.0.4//:cfg_if\",\n \"@crates_std__static_assertions-1.1.0//:static_assertions\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=twox-hash\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.6.3\",\n)\n" } }, - "crates_std__typenum-1.20.0": { + "crates_std__typenum-1.20.1": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "40ce102ab67701b8526c123c1bab5cbe42d7040ccfd0f64af1a385808d2f43de", + "sha256": "b6f5e870be6c3b371b77fe0ee0bafb859fa4964b4404c27de1d380043c4dda20", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/typenum/1.20.0/download" + "https://static.crates.io/crates/typenum/1.20.1/download" ], - "strip_prefix": "typenum-1.20.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"typenum\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=typenum\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.20.0\",\n)\n" + "strip_prefix": "typenum-1.20.1", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"typenum\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=typenum\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.20.1\",\n)\n" } }, "crates_std__ucd-trie-0.1.7": { @@ -9882,6 +10174,22 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"ucd_trie\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"std\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=ucd-trie\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.1.7\",\n)\n" } }, + "crates_std__unicase-2.9.0": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "dbc4bc3a9f746d862c45cb89d705aa10f187bb96c76001afab07a0d35ce60142", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/unicase/2.9.0/download" + ], + "strip_prefix": "unicase-2.9.0", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"unicase\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=unicase\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"2.9.0\",\n)\n" + } + }, "crates_std__unicode-ident-1.0.24": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { @@ -9914,20 +10222,20 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"unicode_linebreak\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=unicode-linebreak\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.1.5\",\n)\n" } }, - "crates_std__unicode-segmentation-1.13.2": { + "crates_std__unicode-segmentation-1.13.3": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "9629274872b2bfaf8d66f5f15725007f635594914870f65218920345aa11aa8c", + "sha256": "c6f5d3c3b1bf09027a88a6bc961fc00497d651009560b5463668dc81b0fa87a8", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/unicode-segmentation/1.13.2/download" + "https://static.crates.io/crates/unicode-segmentation/1.13.3/download" ], - "strip_prefix": "unicode-segmentation-1.13.2", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"unicode_segmentation\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=unicode-segmentation\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.13.2\",\n)\n" + "strip_prefix": "unicode-segmentation-1.13.3", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"unicode_segmentation\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2018\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=unicode-segmentation\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.13.3\",\n)\n" } }, "crates_std__unicode-width-0.1.14": { @@ -10122,68 +10430,68 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wasip3\",\n deps = [\n \"@crates_std__wit-bindgen-0.51.0//:wit_bindgen\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasip3\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.4.0+wasi-0.3.0-rc-2026-01-06\",\n)\n" } }, - "crates_std__wasm-bindgen-0.2.120": { + "crates_std__wasm-bindgen-0.2.122": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "df52b6d9b87e0c74c9edfa1eb2d9bf85e5d63515474513aa50fa181b3c4f5db1", + "sha256": "3ed04576f974d2b2fba0f38c51dbc5518011e38c36bf1143164be765528fd409", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/wasm-bindgen/0.2.120/download" + "https://static.crates.io/crates/wasm-bindgen/0.2.122/download" ], - "strip_prefix": "wasm-bindgen-0.2.120", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wasm_bindgen\",\n deps = [\n \"@crates_std__cfg-if-1.0.4//:cfg_if\",\n \"@crates_std__once_cell-1.21.4//:once_cell\",\n \"@crates_std__wasm-bindgen-0.2.120//:build_script_build\",\n \"@crates_std__wasm-bindgen-shared-0.2.120//:wasm_bindgen_shared\",\n ],\n proc_macro_deps = [\n \"@crates_std__wasm-bindgen-macro-0.2.120//:wasm_bindgen_macro\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasm-bindgen\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.120\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n aliases = {\n \"@crates_std__rustversion-1.0.22//:rustversion\": \"rustversion_compat\",\n },\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n link_deps = [\n \"@crates_std__wasm-bindgen-shared-0.2.120//:wasm_bindgen_shared\",\n ],\n edition = \"2021\",\n pkg_name = \"wasm-bindgen\",\n proc_macro_deps = [\n \"@crates_std__rustversion-1.0.22//:rustversion\",\n ],\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasm-bindgen\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.2.120\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "strip_prefix": "wasm-bindgen-0.2.122", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wasm_bindgen\",\n deps = [\n \"@crates_std__cfg-if-1.0.4//:cfg_if\",\n \"@crates_std__once_cell-1.21.4//:once_cell\",\n \"@crates_std__wasm-bindgen-0.2.122//:build_script_build\",\n \"@crates_std__wasm-bindgen-shared-0.2.122//:wasm_bindgen_shared\",\n ],\n proc_macro_deps = [\n \"@crates_std__wasm-bindgen-macro-0.2.122//:wasm_bindgen_macro\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasm-bindgen\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.122\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n aliases = {\n \"@crates_std__rustversion-1.0.22//:rustversion\": \"rustversion_compat\",\n },\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n link_deps = [\n \"@crates_std__wasm-bindgen-shared-0.2.122//:wasm_bindgen_shared\",\n ],\n edition = \"2021\",\n pkg_name = \"wasm-bindgen\",\n proc_macro_deps = [\n \"@crates_std__rustversion-1.0.22//:rustversion\",\n ],\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasm-bindgen\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.2.122\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, - "crates_std__wasm-bindgen-macro-0.2.120": { + "crates_std__wasm-bindgen-macro-0.2.122": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "78b1041f495fb322e64aca85f5756b2172e35cd459376e67f2a6c9dffcedb103", + "sha256": "916151b09da36bd82f6615cbf3a419e2f0ba23a03c6160e8e92eb6bd4aa1dec6", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/wasm-bindgen-macro/0.2.120/download" + "https://static.crates.io/crates/wasm-bindgen-macro/0.2.122/download" ], - "strip_prefix": "wasm-bindgen-macro-0.2.120", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"wasm_bindgen_macro\",\n deps = [\n \"@crates_std__quote-1.0.45//:quote\",\n \"@crates_std__wasm-bindgen-macro-support-0.2.120//:wasm_bindgen_macro_support\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasm-bindgen-macro\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.120\",\n)\n" + "strip_prefix": "wasm-bindgen-macro-0.2.122", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"wasm_bindgen_macro\",\n deps = [\n \"@crates_std__quote-1.0.45//:quote\",\n \"@crates_std__wasm-bindgen-macro-support-0.2.122//:wasm_bindgen_macro_support\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasm-bindgen-macro\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.122\",\n)\n" } }, - "crates_std__wasm-bindgen-macro-support-0.2.120": { + "crates_std__wasm-bindgen-macro-support-0.2.122": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "9dcd0ff20416988a18ac686d4d4d0f6aae9ebf08a389ff5d29012b05af2a1b41", + "sha256": "299047362ccbfce148b67ab7e73349f77748e00c8296f9542adfad2ad82c5c5e", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/wasm-bindgen-macro-support/0.2.120/download" + "https://static.crates.io/crates/wasm-bindgen-macro-support/0.2.122/download" ], - "strip_prefix": "wasm-bindgen-macro-support-0.2.120", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wasm_bindgen_macro_support\",\n deps = [\n \"@crates_std__bumpalo-3.20.2//:bumpalo\",\n \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n \"@crates_std__quote-1.0.45//:quote\",\n \"@crates_std__syn-2.0.117//:syn\",\n \"@crates_std__wasm-bindgen-shared-0.2.120//:wasm_bindgen_shared\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasm-bindgen-macro-support\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.120\",\n)\n" + "strip_prefix": "wasm-bindgen-macro-support-0.2.122", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wasm_bindgen_macro_support\",\n deps = [\n \"@crates_std__bumpalo-3.20.3//:bumpalo\",\n \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n \"@crates_std__quote-1.0.45//:quote\",\n \"@crates_std__syn-2.0.117//:syn\",\n \"@crates_std__wasm-bindgen-shared-0.2.122//:wasm_bindgen_shared\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasm-bindgen-macro-support\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.122\",\n)\n" } }, - "crates_std__wasm-bindgen-shared-0.2.120": { + "crates_std__wasm-bindgen-shared-0.2.122": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "49757b3c82ebf16c57d69365a142940b384176c24df52a087fb748e2085359ea", + "sha256": "9a929b2c61f11ba3e9bc35b50c1f25cb38e0e892c0c231ae2b8cf78d5dad4437", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/wasm-bindgen-shared/0.2.120/download" + "https://static.crates.io/crates/wasm-bindgen-shared/0.2.122/download" ], - "strip_prefix": "wasm-bindgen-shared-0.2.120", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wasm_bindgen_shared\",\n deps = [\n \"@crates_std__unicode-ident-1.0.24//:unicode_ident\",\n \"@crates_std__wasm-bindgen-shared-0.2.120//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasm-bindgen-shared\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.120\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n links = \"wasm_bindgen\",\n pkg_name = \"wasm-bindgen-shared\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasm-bindgen-shared\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.2.120\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "strip_prefix": "wasm-bindgen-shared-0.2.122", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wasm_bindgen_shared\",\n deps = [\n \"@crates_std__unicode-ident-1.0.24//:unicode_ident\",\n \"@crates_std__wasm-bindgen-shared-0.2.122//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasm-bindgen-shared\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.2.122\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n links = \"wasm_bindgen\",\n pkg_name = \"wasm-bindgen-shared\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasm-bindgen-shared\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.2.122\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, "crates_std__wasm-encoder-0.244.0": { @@ -10231,7 +10539,7 @@ "https://static.crates.io/crates/wasmparser/0.244.0/download" ], "strip_prefix": "wasmparser-0.244.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wasmparser\",\n deps = [\n \"@crates_std__bitflags-2.11.1//:bitflags\",\n \"@crates_std__hashbrown-0.15.5//:hashbrown\",\n \"@crates_std__indexmap-2.14.0//:indexmap\",\n \"@crates_std__semver-1.0.28//:semver\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"component-model\",\n \"features\",\n \"hash-collections\",\n \"simd\",\n \"std\",\n \"validate\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasmparser\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.244.0\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wasmparser\",\n deps = [\n \"@crates_std__bitflags-2.13.0//:bitflags\",\n \"@crates_std__hashbrown-0.15.5//:hashbrown\",\n \"@crates_std__indexmap-2.14.0//:indexmap\",\n \"@crates_std__semver-1.0.28//:semver\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"component-model\",\n \"features\",\n \"hash-collections\",\n \"simd\",\n \"std\",\n \"validate\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wasmparser\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.244.0\",\n)\n" } }, "crates_std__web-time-1.1.0": { @@ -10551,7 +10859,7 @@ "https://static.crates.io/crates/wit-component/0.244.0/download" ], "strip_prefix": "wit-component-0.244.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wit_component\",\n deps = [\n \"@crates_std__anyhow-1.0.102//:anyhow\",\n \"@crates_std__bitflags-2.11.1//:bitflags\",\n \"@crates_std__indexmap-2.14.0//:indexmap\",\n \"@crates_std__log-0.4.29//:log\",\n \"@crates_std__serde-1.0.228//:serde\",\n \"@crates_std__serde_json-1.0.149//:serde_json\",\n \"@crates_std__wasm-encoder-0.244.0//:wasm_encoder\",\n \"@crates_std__wasm-metadata-0.244.0//:wasm_metadata\",\n \"@crates_std__wasmparser-0.244.0//:wasmparser\",\n \"@crates_std__wit-parser-0.244.0//:wit_parser\",\n ],\n proc_macro_deps = [\n \"@crates_std__serde_derive-1.0.228//:serde_derive\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wit-component\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.244.0\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wit_component\",\n deps = [\n \"@crates_std__anyhow-1.0.102//:anyhow\",\n \"@crates_std__bitflags-2.13.0//:bitflags\",\n \"@crates_std__indexmap-2.14.0//:indexmap\",\n \"@crates_std__log-0.4.32//:log\",\n \"@crates_std__serde-1.0.228//:serde\",\n \"@crates_std__serde_json-1.0.150//:serde_json\",\n \"@crates_std__wasm-encoder-0.244.0//:wasm_encoder\",\n \"@crates_std__wasm-metadata-0.244.0//:wasm_metadata\",\n \"@crates_std__wasmparser-0.244.0//:wasmparser\",\n \"@crates_std__wit-parser-0.244.0//:wit_parser\",\n ],\n proc_macro_deps = [\n \"@crates_std__serde_derive-1.0.228//:serde_derive\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wit-component\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.244.0\",\n)\n" } }, "crates_std__wit-parser-0.244.0": { @@ -10567,7 +10875,7 @@ "https://static.crates.io/crates/wit-parser/0.244.0/download" ], "strip_prefix": "wit-parser-0.244.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wit_parser\",\n deps = [\n \"@crates_std__anyhow-1.0.102//:anyhow\",\n \"@crates_std__id-arena-2.3.0//:id_arena\",\n \"@crates_std__indexmap-2.14.0//:indexmap\",\n \"@crates_std__log-0.4.29//:log\",\n \"@crates_std__semver-1.0.28//:semver\",\n \"@crates_std__serde-1.0.228//:serde\",\n \"@crates_std__serde_json-1.0.149//:serde_json\",\n \"@crates_std__unicode-xid-0.2.6//:unicode_xid\",\n \"@crates_std__wasmparser-0.244.0//:wasmparser\",\n ],\n proc_macro_deps = [\n \"@crates_std__serde_derive-1.0.228//:serde_derive\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"decoding\",\n \"default\",\n \"serde\",\n \"serde_json\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wit-parser\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.244.0\",\n)\n" + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"wit_parser\",\n deps = [\n \"@crates_std__anyhow-1.0.102//:anyhow\",\n \"@crates_std__id-arena-2.3.0//:id_arena\",\n \"@crates_std__indexmap-2.14.0//:indexmap\",\n \"@crates_std__log-0.4.32//:log\",\n \"@crates_std__semver-1.0.28//:semver\",\n \"@crates_std__serde-1.0.228//:serde\",\n \"@crates_std__serde_json-1.0.150//:serde_json\",\n \"@crates_std__unicode-xid-0.2.6//:unicode_xid\",\n \"@crates_std__wasmparser-0.244.0//:wasmparser\",\n ],\n proc_macro_deps = [\n \"@crates_std__serde_derive-1.0.228//:serde_derive\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"decoding\",\n \"default\",\n \"serde\",\n \"serde_json\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=wit-parser\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.244.0\",\n)\n" } }, "crates_std__yansi-0.5.1": { @@ -10586,36 +10894,36 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"yansi\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2015\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=yansi\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.5.1\",\n)\n" } }, - "crates_std__zerocopy-0.8.48": { + "crates_std__zerocopy-0.8.50": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "eed437bf9d6692032087e337407a86f04cd8d6a16a37199ed57949d415bd68e9", + "sha256": "3b065d4f0e55f82fae73202e189638116a87c55ab6b8e6c2721e13dd9d854ad1", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/zerocopy/0.8.48/download" + "https://static.crates.io/crates/zerocopy/0.8.50/download" ], - "strip_prefix": "zerocopy-0.8.48", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"zerocopy\",\n deps = [\n \"@crates_std__zerocopy-0.8.48//:build_script_build\",\n ],\n proc_macro_deps = [\n \"@crates_std__zerocopy-derive-0.8.48//:zerocopy_derive\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"derive\",\n \"zerocopy-derive\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zerocopy\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.8.48\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"derive\",\n \"zerocopy-derive\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"zerocopy\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zerocopy\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.8.48\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" + "strip_prefix": "zerocopy-0.8.50", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"zerocopy\",\n deps = [\n \"@crates_std__zerocopy-0.8.50//:build_script_build\",\n ],\n proc_macro_deps = [\n \"@crates_std__zerocopy-derive-0.8.50//:zerocopy_derive\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"derive\",\n \"zerocopy-derive\",\n ],\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zerocopy\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.8.50\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_features = [\n \"derive\",\n \"zerocopy-derive\",\n ],\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"zerocopy\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zerocopy\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"0.8.50\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, - "crates_std__zerocopy-derive-0.8.48": { + "crates_std__zerocopy-derive-0.8.50": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "70e3cd084b1788766f53af483dd21f93881ff30d7320490ec3ef7526d203bad4", + "sha256": "0b631b19d36a892ab55420c92dbc83ccd79274f25be714855d3074aa71cab639", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/zerocopy-derive/0.8.48/download" + "https://static.crates.io/crates/zerocopy-derive/0.8.50/download" ], - "strip_prefix": "zerocopy-derive-0.8.48", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"zerocopy_derive\",\n deps = [\n \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n \"@crates_std__quote-1.0.45//:quote\",\n \"@crates_std__syn-2.0.117//:syn\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zerocopy-derive\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.8.48\",\n)\n" + "strip_prefix": "zerocopy-derive-0.8.50", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n name = \"zerocopy_derive\",\n deps = [\n \"@crates_std__proc-macro2-1.0.106//:proc_macro2\",\n \"@crates_std__quote-1.0.45//:quote\",\n \"@crates_std__syn-2.0.117//:syn\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zerocopy-derive\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.8.50\",\n)\n" } }, "crates_std__zeroize-1.8.2": { @@ -10666,68 +10974,84 @@ "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\n \"@rules_rust//cargo:defs.bzl\",\n \"cargo_build_script\",\n \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"zmij\",\n deps = [\n \"@crates_std__zmij-1.0.21//:build_script_build\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2021\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zmij\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"1.0.21\",\n)\n\ncargo_build_script(\n name = \"_bs\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \"**/*.rs\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_name = \"build_script_build\",\n crate_root = \"build.rs\",\n data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n edition = \"2021\",\n pkg_name = \"zmij\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zmij\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n version = \"1.0.21\",\n visibility = [\"//visibility:private\"],\n)\n\nalias(\n name = \"build_script_build\",\n actual = \":_bs\",\n tags = [\"manual\"],\n)\n" } }, - "crates_std__zngur-0.7.0": { + "crates_std__zngur-0.10.0": { + "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", + "attributes": { + "patch_args": [], + "patch_tool": "", + "patches": [], + "remote_patch_strip": 1, + "sha256": "7fc912d12934b4d04aabc52c14db6fc88ae8aa5a47902f27e8759c2de254723f", + "type": "tar.gz", + "urls": [ + "https://static.crates.io/crates/zngur/0.10.0/download" + ], + "strip_prefix": "zngur-0.10.0", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"zngur\",\n deps = [\n \"@crates_std__zngur-generator-0.10.0//:zngur_generator\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zngur\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.10.0\",\n)\n" + } + }, + "crates_std__zngur-def-0.10.0": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "4149b4d31c320567b4ff83ede3fd75d8bbca8269a3cde7ad91f13496d563c5c8", + "sha256": "8f27e49a62db537cea43a6c122ded7eda99c4ac0ca1d7cfd74f2bf6a6c88712d", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/zngur/0.7.0/download" + "https://static.crates.io/crates/zngur-def/0.10.0/download" ], - "strip_prefix": "zngur-0.7.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"zngur\",\n deps = [\n \"@crates_std__zngur-generator-0.7.0//:zngur_generator\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zngur\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.7.0\",\n)\n" + "strip_prefix": "zngur-def-0.10.0", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"zngur_def\",\n deps = [\n \"@crates_std__indexmap-2.14.0//:indexmap\",\n \"@crates_std__itertools-0.11.0//:itertools\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zngur-def\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.10.0\",\n)\n" } }, - "crates_std__zngur-def-0.7.0": { + "crates_std__zngur-generator-0.10.0": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "a82030ab38c023d00e39d0d7175c7fad4f3e7607a463313b6b73f2cccd3d84f5", + "sha256": "5ffad8c6994c477023aba7613bdf17c470003bbd191846d3096e84ffecf86d4c", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/zngur-def/0.7.0/download" + "https://static.crates.io/crates/zngur-generator/0.10.0/download" ], - "strip_prefix": "zngur-def-0.7.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"zngur_def\",\n deps = [\n \"@crates_std__itertools-0.11.0//:itertools\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zngur-def\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.7.0\",\n)\n" + "strip_prefix": "zngur-generator-0.10.0", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"zngur_generator\",\n deps = [\n \"@crates_std__askama-0.12.1//:askama\",\n \"@crates_std__hex-0.4.3//:hex\",\n \"@crates_std__indexmap-2.14.0//:indexmap\",\n \"@crates_std__itertools-0.11.0//:itertools\",\n \"@crates_std__sha2-0.10.9//:sha2\",\n \"@crates_std__zngur-def-0.10.0//:zngur_def\",\n \"@crates_std__zngur-parser-0.10.0//:zngur_parser\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zngur-generator\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.10.0\",\n)\n" } }, - "crates_std__zngur-generator-0.7.0": { + "crates_std__zngur-lib-0.10.0": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "90cb11d26d305fbeceb0f84dd276bb18e37f07edea1c61238a738f3084f3c629", + "sha256": "274b03b81aaacc390756142ab5ffceb29a1c54817af1dfb265666a31b4cfb116", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/zngur-generator/0.7.0/download" + "https://static.crates.io/crates/zngur-lib/0.10.0/download" ], - "strip_prefix": "zngur-generator-0.7.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"zngur_generator\",\n deps = [\n \"@crates_std__itertools-0.11.0//:itertools\",\n \"@crates_std__zngur-def-0.7.0//:zngur_def\",\n \"@crates_std__zngur-parser-0.7.0//:zngur_parser\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zngur-generator\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.7.0\",\n)\n" + "strip_prefix": "zngur-lib-0.10.0", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"zngur_lib\",\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zngur-lib\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.10.0\",\n)\n" } }, - "crates_std__zngur-parser-0.7.0": { + "crates_std__zngur-parser-0.10.0": { "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive", "attributes": { "patch_args": [], "patch_tool": "", "patches": [], "remote_patch_strip": 1, - "sha256": "e186484d4f21737fcb00cfc3f96fdf5e5609b6f8f0d6df824f4e3dce893a59a3", + "sha256": "8d66c1b85ca6eab9576df5de31758cb1f9046b4ce47b25f45dabcb0fc7ef8789", "type": "tar.gz", "urls": [ - "https://static.crates.io/crates/zngur-parser/0.7.0/download" + "https://static.crates.io/crates/zngur-parser/0.10.0/download" ], - "strip_prefix": "zngur-parser-0.7.0", - "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"zngur_parser\",\n deps = [\n \"@crates_std__ariadne-0.3.0//:ariadne\",\n \"@crates_std__chumsky-1.0.0-alpha.8//:chumsky\",\n \"@crates_std__itertools-0.11.0//:itertools\",\n \"@crates_std__zngur-def-0.7.0//:zngur_def\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zngur-parser\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.7.0\",\n)\n" + "strip_prefix": "zngur-parser-0.10.0", + "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n# bazel mod show_repo 'pigweed'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n name = \"cargo_toml_env_vars\",\n src = \"Cargo.toml\",\n)\n\nrust_library(\n name = \"zngur_parser\",\n deps = [\n \"@crates_std__ariadne-0.3.0//:ariadne\",\n \"@crates_std__chumsky-1.0.0-alpha.8//:chumsky\",\n \"@crates_std__itertools-0.11.0//:itertools\",\n \"@crates_std__zngur-def-0.10.0//:zngur_def\",\n ],\n compile_data = glob(\n allow_empty = True,\n include = [\"**\"],\n exclude = [\n \"**/* *\",\n \".tmp_git_root/**/*\",\n \"BUILD\",\n \"BUILD.bazel\",\n \"WORKSPACE\",\n \"WORKSPACE.bazel\",\n ],\n ),\n crate_root = \"src/lib.rs\",\n edition = \"2024\",\n rustc_env_files = [\n \":cargo_toml_env_vars\",\n ],\n rustc_flags = [\n \"--cap-lints=allow\",\n ],\n srcs = glob(\n allow_empty = True,\n include = [\"**/*.rs\"],\n ),\n tags = [\n \"cargo-bazel\",\n \"crate-name=zngur-parser\",\n \"manual\",\n \"noclippy\",\n \"norustfmt\",\n ],\n target_compatible_with = select({\n \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n \"@rules_rust//rust/platform:x86_64-apple-darwin\": [],\n \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n \"//conditions:default\": [\"@platforms//:incompatible\"],\n }),\n version = \"0.10.0\",\n)\n" } }, "rust_caliptra_crates": { diff --git a/hal/blocking/flash/BUILD.bazel b/hal/blocking/flash/BUILD.bazel new file mode 100644 index 00000000..6962a9c3 --- /dev/null +++ b/hal/blocking/flash/BUILD.bazel @@ -0,0 +1,42 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@rules_rust//rust:defs.bzl", "rust_library", "rust_test") + +rust_library( + name = "driver", + srcs = [ + "driver.rs", + ], + crate_name = "hal_flash_driver", + edition = "2024", + visibility = ["//visibility:public"], + deps = [ + "//util/types", + "@rust_crates//:zerocopy", + ], +) + +rust_library( + name = "flash", + srcs = [ + "flash.rs", + ], + crate_name = "hal_flash", + edition = "2024", + visibility = ["//visibility:public"], + deps = [ + ":driver", + "//util/io", + "//util/types", + ], +) + +rust_test( + name = "flash_test", + crate = ":flash", + rustc_flags = [ + "-C", + "debug-assertions", + ], +) diff --git a/hal/blocking/flash/README.md b/hal/blocking/flash/README.md new file mode 100644 index 00000000..55823ea9 --- /dev/null +++ b/hal/blocking/flash/README.md @@ -0,0 +1,55 @@ +# Blocking Flash HAL + +This HAL provides abstractions for interacting with flash memory. It defines traits for low-level drivers and high-level synchronous interfaces, along with a helper implementation to bridge them. + +## Key Abstractions + +### `FlashAddress` + +A transparent wrapper around a 32-bit offset (`u32`) representing a location in flash memory. It supports basic arithmetic operations (`Add`, `AddAssign`, `BitAnd`, `BitAndAssign`) to facilitate address calculations. + +Platform-specific extension traits (like `EarlgreyFlashAddress` in `earlgrey_util`) may use the offset bits to encode additional information (e.g., distinguishing between DATA and INFO partitions using the MSB). + +### `FlashDriver` Trait + +Defines the low-level interface for flash hardware. It is designed to support both synchronous and asynchronous hardware controllers using a start-poll-complete execution model for erase and program operations: + +1. **Start**: Initiated via `start_erase` or `start_program`. +2. **Poll**: Check completion status via `is_busy`, or wait for a hardware interrupt. +3. **Complete**: Finalize the operation and retrieve any execution errors via `complete_op`. + +Read operations (`read`) are synchronous for simplicity. + +Drivers also define hardware-specific constraints as constants: +* `ERASABLE_SIZES_BITMAP`: A bitmap where bit `i` is set if erasing blocks of size `2^i` is supported. +* `PROGRAM_WINDOW_SIZE`: The maximum size of a single write, and the boundary alignment constraint for writes. +* `MAX_READ_SIZE`: The maximum size of a single read. +* `READ_ALIGNMENT` / `PROGRAM_ALIGNMENT`: Address and size alignment requirements. + +### `Flash` Trait + +Provides a simplified, synchronous, blocking interface suitable for application use. It abstracts away the low-level start-poll-complete flow and hardware constraints (alignment, windows). + +### `BlockingFlash` + +A concrete implementation of the `Flash` trait that wraps a `FlashDriver` and a `Blocking` mechanism. It implements the blocking behavior and handles driver constraints automatically: + +```mermaid +graph TD + App[Application] -- "Flash::program()" --> BF[BlockingFlash] + BF -- "1. start_program()" --> Driver[FlashDriver] + BF -- "2. wait_for_notification()" --> Blocking[Blocking impl] + Blocking -- "wakes up (IRQ/Poll)" --> BF + BF -- "3. complete_op()" --> Driver +``` + +#### Read Alignment Handling + +If a read request is not aligned to `TDriver::READ_ALIGNMENT`, `BlockingFlash::read` will: +1. Read the aligned block containing the unaligned start address into a temporary buffer. +2. Copy the requested bytes from the temporary buffer. +3. Read the remaining data in aligned chunks directly into the destination buffer. + +#### Program Window Handling + +Hardware flash controllers often cannot program data that crosses a write window boundary (typically 64 bytes). `BlockingFlash::program` automatically detects these boundaries and splits a large or unaligned write into multiple smaller writes that fit within the program windows. diff --git a/hal/blocking/flash/driver.rs b/hal/blocking/flash/driver.rs new file mode 100644 index 00000000..378152bf --- /dev/null +++ b/hal/blocking/flash/driver.rs @@ -0,0 +1,159 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Low-level flash driver interface. + +#![no_std] + +use core::num::NonZero; + +use util_types::PowerOf2Usize; +use zerocopy::{FromBytes, Immutable, IntoBytes, KnownLayout}; + +/// Low-level flash driver interface. +/// +/// This trait defines the interface for interacting with flash hardware at a low level. +/// It supports an asynchronous-style execution model using a start-poll-complete pattern: +/// 1. Start the operation (`start_erase`, `start_program`). +/// 2. Poll status (`is_busy`) or wait for interrupt. +/// 3. Finalize and check errors (`complete_op`). +/// +/// Read operations (`read`) are assumed to be synchronous and blocking for simplicity. +pub trait FlashDriver { + /// The error type returned by driver operations. + type Error; + + /// The default page size in bytes. + const PAGE_SIZE: usize; + + /// The maximum size of a single program operation (write window). + /// Program operations cannot span across boundaries aligned to this size. + const PROGRAM_WINDOW_SIZE: usize; + + /// The maximum size of a single read operation. + const MAX_READ_SIZE: usize; + + /// The alignment required for read operations (addresses and lengths). + const READ_ALIGNMENT: usize; + + /// The alignment required for program operations (addresses and lengths). + const PROGRAM_ALIGNMENT: usize; + + /// Returns the total size of the flash in bytes. + fn size(&self) -> NonZero; + + /// Returns a bitmap of supported erase block sizes. + /// + /// Each bit `i` represents a supported erase block size of `2^i` bytes. + /// For example, if bit 11 is set, then 2048-byte erases are supported. + fn erasable_sizes_bitmap(&mut self) -> Result; + + /// Reads data from flash synchronously. + /// + /// # Arguments + /// * `start_addr`: The address to start reading from. Must be aligned to `READ_ALIGNMENT`. + /// * `buf`: The buffer to read data into. Must have size <= `MAX_READ_SIZE` and be aligned to `READ_ALIGNMENT`. + fn read(&mut self, start_addr: FlashAddress, buf: &mut [u8]) -> Result<(), Self::Error>; + + /// Starts an erase operation asynchronously. + /// + /// The operation is not guaranteed to be complete until `complete_op` is called + /// and returns `Ok`. + /// + /// # Arguments + /// * `start_addr`: The start address of the block to erase. Must be aligned to the block size. + /// * `size`: The size of the block to erase. Must have its corresponding bit set in `ERASABLE_SIZES_BITMAP`. + fn start_erase( + &mut self, + start_addr: FlashAddress, + size: PowerOf2Usize, + ) -> Result<(), Self::Error>; + + /// Starts a program operation asynchronously. + /// + /// The operation is not guaranteed to be complete until `complete_op` is called + /// and returns `Ok`. + /// + /// The programmed region must not cross a `PROGRAM_WINDOW_SIZE` boundary. + /// + /// # Arguments + /// * `start_address`: The address to start programming at. Must be aligned to `PROGRAM_ALIGNMENT`. + /// * `data`: The data to program. Must have size <= `PROGRAM_WINDOW_SIZE` and be aligned to `PROGRAM_ALIGNMENT`. + fn start_program( + &mut self, + start_address: FlashAddress, + data: &[u8], + ) -> Result<(), Self::Error>; + + /// Returns whether the driver is currently busy with an operation. + fn is_busy(&mut self) -> bool; + + /// Completes a pending erase or program operation and returns the result. + /// + /// This should be called after `is_busy` returns false to check for errors and + /// reset the driver state. + fn complete_op(&mut self) -> Result<(), Self::Error>; +} + +/// Represents an address in flash memory. +/// +/// A flash address consists of an offset within the flash address space. +#[derive(Default, Clone, Copy, PartialEq, Eq, IntoBytes, Immutable, FromBytes, KnownLayout)] +#[repr(transparent)] +pub struct FlashAddress { + offset: u32, +} + +impl core::fmt::Display for FlashAddress { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "0x{:08x}", self.offset) + } +} + +impl core::fmt::Debug for FlashAddress { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Display::fmt(self, f) + } +} + +impl FlashAddress { + /// Creates a new `FlashAddress`. + pub const fn new(offset: u32) -> Self { + Self { offset } + } + + /// Returns the offset. + pub fn offset(&self) -> u32 { + self.offset + } +} + +impl core::ops::Add for FlashAddress { + type Output = Self; + fn add(self, other: usize) -> Self { + Self { + offset: self.offset + other as u32, + } + } +} + +impl core::ops::AddAssign for FlashAddress { + fn add_assign(&mut self, other: usize) { + self.offset += other as u32; + } +} + +impl core::ops::BitAnd for FlashAddress { + type Output = Self; + fn bitand(self, other: usize) -> Self { + Self { + offset: self.offset & other as u32, + } + } +} + +impl core::ops::BitAndAssign for FlashAddress { + fn bitand_assign(&mut self, other: usize) { + self.offset &= other as u32; + } +} diff --git a/hal/blocking/flash/flash.rs b/hal/blocking/flash/flash.rs new file mode 100644 index 00000000..072e83c7 --- /dev/null +++ b/hal/blocking/flash/flash.rs @@ -0,0 +1,430 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! High-level blocking flash interface. + +#![cfg_attr(not(test), no_std)] + +use core::{cmp::min, num::NonZero}; +pub use hal_flash_driver::FlashAddress; +use hal_flash_driver::FlashDriver; +use util_io::RandomRead; +use util_types::{Blocking, PowerOf2Usize}; + +/// High-level flash interface. +/// +/// This trait provides a simplified, synchronous, blocking interface for flash operations. +/// It abstracts away the asynchronous execution model and hardware alignment/window +/// constraints of the underlying driver. +pub trait Flash { + /// The error type returned by flash operations. + type Error; + + /// Returns the geometry of the flash. + /// + /// # Returns + /// A tuple containing: + /// 1. The total size of the flash in bytes. + /// 2. The default/smallest page size (erase block size) in bytes. + /// 3. A bitmap of all supported erase block sizes. + fn geometry(&mut self) -> Result<(NonZero, PowerOf2Usize, u32), Self::Error>; + + /// Reads data from flash into the provided buffer. + /// + /// This method handles unaligned read addresses by performing partial reads + /// into a temporary buffer if necessary. + /// + /// # Arguments + /// * `start_addr`: The address to start reading from. + /// * `buf`: The buffer to read data into. + fn read(&mut self, start_addr: FlashAddress, buf: &mut [u8]) -> Result<(), Self::Error>; + + /// Erases a block of flash. + /// + /// This is a blocking operation that waits for the hardware erase to complete. + /// + /// # Arguments + /// * `start_addr`: The start address of the block to erase. Must be aligned to `size`. + /// * `size`: The size of the block to erase. Must be one of the supported sizes in `geometry().2`. + fn erase(&mut self, start_addr: FlashAddress, size: PowerOf2Usize) -> Result<(), Self::Error>; + + /// Programs data into flash. + /// + /// This is a blocking operation that waits for the hardware program to complete. + /// It automatically handles programming data that spans across hardware program + /// window boundaries by splitting it into multiple aligned writes. + /// + /// # Arguments + /// * `start_addr`: The address to start programming at. + /// * `data`: The data to program. + fn program(&mut self, start_addr: FlashAddress, data: &[u8]) -> Result<(), Self::Error>; + + /// Returns a `RandomRead` implementation for this flash. + fn random_reader(&mut self) -> impl RandomRead + where + Self: Sized, + { + FlashRandomReader(self) + } +} + +impl Flash for &mut F { + type Error = F::Error; + #[inline(always)] + fn geometry(&mut self) -> Result<(NonZero, PowerOf2Usize, u32), Self::Error> { + (**self).geometry() + } + #[inline(always)] + fn read(&mut self, start_addr: FlashAddress, buf: &mut [u8]) -> Result<(), Self::Error> { + (**self).read(start_addr, buf) + } + #[inline(always)] + fn program(&mut self, start_addr: FlashAddress, data: &[u8]) -> Result<(), Self::Error> { + (**self).program(start_addr, data) + } + #[inline(always)] + fn erase(&mut self, start_addr: FlashAddress, size: PowerOf2Usize) -> Result<(), Self::Error> { + (**self).erase(start_addr, size) + } +} + +/// A trait that can be used to constrain the page-size of the flash. +/// +/// If you just need to read the page size at runtime, use `Flash::geometry()` instead. +pub trait FlashPageSize { + /// The size of a flash page in bytes. + const PAGE_SIZE: usize; +} + +/// A blocking flash implementation that wraps a `FlashDriver`. +/// +/// This struct implements the high-level `Flash` trait by wrapping a low-level +/// `FlashDriver` and using a `Blocking` mechanism (e.g., waiting for an interrupt +/// or polling) to block the calling thread until asynchronous driver operations +/// complete. +/// +/// It also handles address alignment for reads and program window constraints for writes. +pub struct BlockingFlash { + /// The underlying flash driver. + pub driver: TDriver, + /// The blocking mechanism used to wait for operations. + pub blocking: TBlocking, +} + +impl FlashPageSize + for BlockingFlash +{ + /// The default page size. + const PAGE_SIZE: usize = TDriver::PAGE_SIZE; +} + +impl Flash for BlockingFlash { + type Error = TDriver::Error; + fn geometry(&mut self) -> Result<(NonZero, PowerOf2Usize, u32), Self::Error> { + let bitmap = self.driver.erasable_sizes_bitmap()?; + let page_size = PowerOf2Usize::new(1 << (bitmap.trailing_zeros())).unwrap(); + Ok((self.driver.size(), page_size, bitmap)) + } + /// Reads data from flash. + /// + /// Handles unaligned `start_addr` by reading the aligned block containing it + /// into a temporary buffer first, copying the relevant bytes, and then reading + /// the remaining data in aligned chunks. + fn read(&mut self, start_addr: FlashAddress, mut buf: &mut [u8]) -> Result<(), Self::Error> { + let mut addr = start_addr; + let align_skip_len = (addr.offset() & (TDriver::READ_ALIGNMENT as u32 - 1)) as usize; + if (align_skip_len) != 0 { + // Read prefix up to alignment boundary + assert!(TDriver::READ_ALIGNMENT <= 16); + let mut tmp = [0_u8; 16]; + let prefix_count = min(TDriver::READ_ALIGNMENT - align_skip_len, buf.len()); + self.driver + .read(addr & !(TDriver::READ_ALIGNMENT - 1), &mut tmp)?; + buf[..prefix_count].copy_from_slice(&tmp[align_skip_len..][..prefix_count]); + buf = &mut buf[prefix_count..]; + addr += prefix_count; + } + // Read remaining aligned chunks + for buf_chunk in buf.chunks_mut(TDriver::MAX_READ_SIZE) { + self.driver.read(addr, buf_chunk)?; + addr += buf_chunk.len(); + } + Ok(()) + } + /// Erases a block of flash. + /// + /// Starts the asynchronous erase operation and blocks the thread using `self.blocking` + /// until the operation completes. + fn erase(&mut self, start_addr: FlashAddress, size: PowerOf2Usize) -> Result<(), Self::Error> { + self.driver.start_erase(start_addr, size)?; + self.blocking.wait_for_notification(); + self.driver.complete_op() + } + /// Programs data into flash. + /// + /// Splits the data into chunks that fit within the hardware's `PROGRAM_WINDOW_SIZE` + /// and do not cross window boundaries. Each chunk is programmed asynchronously, + /// and the thread blocks until it completes before starting the next chunk. + fn program(&mut self, start_addr: FlashAddress, mut data: &[u8]) -> Result<(), Self::Error> { + assert!( + TDriver::PROGRAM_WINDOW_SIZE.count_ones() == 1, + "TDriver::PROGRAM_WINDOW_SIZE must be a power of 2" + ); + let window_mask = TDriver::PROGRAM_WINDOW_SIZE - 1; + let mut addr = start_addr; + while !data.is_empty() { + // Calculate bytes remaining in the current program window + let chunk = &data[..min( + data.len(), + TDriver::PROGRAM_WINDOW_SIZE - ((addr.offset() & window_mask as u32) as usize), + )]; + self.driver.start_program(addr, chunk)?; + self.blocking.wait_for_notification(); + self.driver.complete_op()?; + data = &data[chunk.len()..]; + addr += chunk.len(); + } + Ok(()) + } +} + +struct FlashRandomReader<'a, F: Flash>(&'a mut F); +impl RandomRead for FlashRandomReader<'_, F> { + type Error = F::Error; + fn read(&mut self, start_addr: usize, buf: &mut [u8]) -> Result<(), Self::Error> { + self.0.read(FlashAddress::new(start_addr as u32), buf) + } + fn size(&mut self) -> Result { + Ok(self.0.geometry()?.0.get()) + } +} + +#[cfg(test)] +mod test { + use super::*; + + pub struct FakeBlocking(); + impl Blocking for FakeBlocking { + fn wait_for_notification(&self) {} + } + + #[derive(Debug, Clone, Copy)] + pub struct FakeDriverError; + #[derive(Clone)] + pub struct FakeFlashDriver { + pub data: Vec, + pub check_err_result: Result<(), FakeDriverError>, + } + impl FakeFlashDriver { + pub fn new(data: Vec) -> Self { + Self { + data, + check_err_result: Ok(()), + } + } + } + impl FlashDriver for FakeFlashDriver { + type Error = FakeDriverError; + const PAGE_SIZE: usize = 2048; + const PROGRAM_WINDOW_SIZE: usize = 64; + const MAX_READ_SIZE: usize = 4096; + const READ_ALIGNMENT: usize = 4; + const PROGRAM_ALIGNMENT: usize = 8; + + fn erasable_sizes_bitmap(&mut self) -> Result { + Ok(1 << 11) + } + fn size(&self) -> NonZero { + NonZero::new(self.data.len()).unwrap() + } + fn read(&mut self, start_addr: FlashAddress, buf: &mut [u8]) -> Result<(), Self::Error> { + let start_addr = start_addr.offset() as usize; + assert!(start_addr.checked_add(buf.len()).unwrap() <= self.data.len()); + assert!(buf.len() <= Self::MAX_READ_SIZE); + assert!(start_addr % Self::READ_ALIGNMENT == 0); + buf.copy_from_slice(&self.data[start_addr..][..buf.len()]); + Ok(()) + } + fn start_erase( + &mut self, + start_addr: FlashAddress, + size: PowerOf2Usize, + ) -> Result<(), Self::Error> { + let start_addr = start_addr.offset() as usize; + assert_eq!(size.get(), 2048); + assert!(start_addr.checked_add(size.get()).unwrap() <= self.data.len()); + assert!(start_addr % size.get() == 0); + self.data[start_addr..][..size.get()].fill(0xff); + Ok(()) + } + fn start_program( + &mut self, + start_addr: FlashAddress, + data: &[u8], + ) -> Result<(), Self::Error> { + let start_addr = start_addr.offset() as usize; + assert!(start_addr.checked_add(data.len()).unwrap() <= self.data.len()); + assert!( + data.len() <= Self::PROGRAM_WINDOW_SIZE, + "Program window violation" + ); + let end_addr = start_addr.wrapping_add(data.len()); + assert!( + start_addr / Self::PROGRAM_WINDOW_SIZE + == (end_addr - 1) / Self::PROGRAM_WINDOW_SIZE, + "Program window violation" + ); + for (dest, src) in self.data[start_addr..end_addr].iter_mut().zip(data) { + *dest &= *src; + } + Ok(()) + } + fn is_busy(&mut self) -> bool { + false + } + fn complete_op(&mut self) -> Result<(), Self::Error> { + self.check_err_result + } + } + + #[test] + #[should_panic(expected = "Program window violation")] + pub fn test_fake_flash_program_window_violation_0() { + let mut flash_driver = FakeFlashDriver::new((0..255).collect()); + flash_driver + .start_program(FlashAddress::new(0x3c), &[0x42; 5]) + .unwrap(); + } + + #[test] + #[should_panic(expected = "Program window violation")] + pub fn test_fake_flash_program_window_violation_1() { + let mut flash_driver = FakeFlashDriver::new((0..255).collect()); + flash_driver + .start_program(FlashAddress::new(0x0), &[0; 68]) + .unwrap(); + } + + #[test] + pub fn test_fake_flash_full_program_window() { + let mut flash_driver = FakeFlashDriver::new((0..255).collect()); + flash_driver + .start_program(FlashAddress::new(0x40), &[0; 0x40]) + .unwrap(); + assert_eq!(flash_driver.data[0x40..0x80], [0; 0x40]); + } + + #[test] + pub fn test_size() { + let flash_driver = FakeFlashDriver::new((0..255).collect()); + let mut flash = BlockingFlash { + driver: flash_driver, + blocking: FakeBlocking(), + }; + + assert_eq!(flash.geometry().unwrap().0.get(), 255); + let mut reader = flash.random_reader(); + assert_eq!(reader.size().unwrap(), 255); + } + + #[test] + pub fn test_read() { + let flash_driver = FakeFlashDriver::new((0..255).collect()); + + let mut flash = BlockingFlash { + driver: flash_driver, + blocking: FakeBlocking(), + }; + + let mut buf = [0_u8; 4]; + flash.read(FlashAddress::new(0), &mut buf).unwrap(); + assert_eq!(buf, [0_u8, 1, 2, 3]); + + let mut buf = [0_u8; 4]; + flash.read(FlashAddress::new(1), &mut buf).unwrap(); + assert_eq!(buf, [1, 2, 3, 4]); + + let mut buf = [0_u8; 4]; + flash.read(FlashAddress::new(2), &mut buf).unwrap(); + assert_eq!(buf, [2, 3, 4, 5]); + + { + let mut reader = flash.random_reader(); + let mut buf = [0_u8; 4]; + reader.read(2, &mut buf).unwrap(); + assert_eq!(buf, [2, 3, 4, 5]); + } + + let mut buf = [0_u8; 4]; + flash.read(FlashAddress::new(3), &mut buf).unwrap(); + assert_eq!(buf, [3, 4, 5, 6]); + + let mut buf = [0_u8; 6]; + flash.read(FlashAddress::new(3), &mut buf).unwrap(); + assert_eq!(buf, [3, 4, 5, 6, 7, 8]); + + for i in 0..32 { + let mut buf = [0_u8; 32]; + flash.read(FlashAddress::new(0), &mut buf[..i]).unwrap(); + assert_eq!(&buf[..i], &flash.driver.data[..i]); + } + + for i in 0..32 { + let mut buf = [0_u8; 32]; + flash + .read(FlashAddress::new(32 - i as u32), &mut buf[..i]) + .unwrap(); + assert_eq!(&buf[..i], &flash.driver.data[32 - i..32]); + } + } + + #[test] + pub fn test_erase() { + let mut flash = BlockingFlash { + driver: FakeFlashDriver::new(vec![0x42; 0x4000]), + blocking: FakeBlocking(), + }; + flash + .erase(FlashAddress::new(0x0800), PowerOf2Usize::new(2048).unwrap()) + .unwrap(); + assert_eq!(flash.driver.data[0x0000..0x0800], [0x42; 0x0800]); + assert_eq!(flash.driver.data[0x0800..0x1000], [0xff; 0x0800]); + assert_eq!(flash.driver.data[0x1000..0x4000], [0x42; 0x3000]); + + flash + .erase(FlashAddress::new(0x3000), PowerOf2Usize::new(2048).unwrap()) + .unwrap(); + assert_eq!(flash.driver.data[0x0000..0x0800], [0x42; 0x0800]); + assert_eq!(flash.driver.data[0x0800..0x1000], [0xff; 0x0800]); + assert_eq!(flash.driver.data[0x1000..0x3000], [0x42; 0x2000]); + assert_eq!(flash.driver.data[0x3000..0x3800], [0xff; 0x0800]); + assert_eq!(flash.driver.data[0x3800..0x4000], [0x42; 0x0800]); + } + + #[test] + pub fn test_program() { + let mut flash = BlockingFlash { + driver: FakeFlashDriver::new(vec![0xff; 8192]), + blocking: FakeBlocking(), + }; + + flash + .program( + FlashAddress::new(0x3c), + &[0x10, 0x11, 0x12, 0x13, 0x14, 0x15], + ) + .unwrap(); + assert_eq!( + flash.driver.data[0x38..0x44], + [0xff, 0xff, 0xff, 0xff, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0xff, 0xff] + ); + + flash + .program(FlashAddress::new(0x40), &[0x24, 0x25]) + .unwrap(); + assert_eq!( + flash.driver.data[0x38..0x44], + [0xff, 0xff, 0xff, 0xff, 0x10, 0x11, 0x12, 0x13, 0x04, 0x05, 0xff, 0xff] + ); + } +} diff --git a/hal/blocking/src/cipher.rs b/hal/blocking/src/cipher.rs index 55d88754..d1aecedd 100644 --- a/hal/blocking/src/cipher.rs +++ b/hal/blocking/src/cipher.rs @@ -40,6 +40,12 @@ pub enum ErrorKind { /// Key or IV is invalid or missing. KeyError, + + /// The hardware accelerator is busy and cannot process the cipher operation. + Busy, + + /// The operation did not complete within the expected time. + Timeout, } /// Trait for converting implementation-specific errors into a generic [`ErrorKind`]. @@ -183,7 +189,6 @@ pub trait CipherInit: SymmetricCipher { /// /// - `key`: A reference to the key used for the cipher. /// - `nonce`: A reference to the nonce or IV used for the cipher. - /// - `mode`: The cipher mode to use. /// /// # Returns /// @@ -192,7 +197,6 @@ pub trait CipherInit: SymmetricCipher { &'a mut self, key: &Self::Key, nonce: &Self::Nonce, - mode: M, ) -> Result, Self::Error>; } @@ -232,7 +236,7 @@ pub trait ResettableCipherOp: ErrorType { } /// Optional trait for cipher contexts that support rekeying. -pub trait CipherRekey: ErrorType { +pub trait CipherRekey: SymmetricCipher { /// Rekeys the cipher context with a new key. /// /// # Parameters @@ -242,7 +246,7 @@ pub trait CipherRekey: ErrorType { /// # Returns /// /// A result indicating success or failure. - fn rekey(&mut self, new_key: &K) -> Result<(), Self::Error>; + fn rekey(&mut self, new_key: &Self::Key) -> Result<(), Self::Error>; } /// Error type for block-aligned container operations. @@ -410,7 +414,7 @@ impl BlockAligned Result<(), Self::Error>; + fn clear_state(&mut self); } /// Trait for querying cipher status and hardware state. @@ -586,11 +590,6 @@ pub trait AeadCipherOp: SymmetricCipher + ErrorType { /// /// # Common Types /// - /// - `&[u8]` for read-only associated data - /// - `[u8; N]` for fixed-size owned associated data - /// - `()` or empty slice if no associated data is needed - type AssociatedData: FromBytes + IntoBytes; - /// The authentication tag type for AEAD operations. /// /// The authentication tag is a cryptographic checksum that provides @@ -634,7 +633,7 @@ pub trait AeadCipherOp: SymmetricCipher + ErrorType { fn encrypt_aead( &mut self, plaintext: Self::PlainText, - associated_data: Self::AssociatedData, + associated_data: &[u8], ) -> Result<(Self::CipherText, Self::Tag), Self::Error>; /// Decrypts the given ciphertext with associated data and authentication tag. @@ -651,7 +650,7 @@ pub trait AeadCipherOp: SymmetricCipher + ErrorType { fn decrypt_aead( &mut self, ciphertext: Self::CipherText, - associated_data: Self::AssociatedData, + associated_data: &[u8], tag: Self::Tag, ) -> Result; } diff --git a/hal/blocking/src/digest.rs b/hal/blocking/src/digest.rs index 178bd18f..7a621522 100644 --- a/hal/blocking/src/digest.rs +++ b/hal/blocking/src/digest.rs @@ -54,7 +54,6 @@ //! # impl ErrorType for MyDigestImpl { type Error = core::convert::Infallible; } //! # impl DigestInit for MyDigestImpl { //! # type OpContext<'a> = MyContext<'a> where Self: 'a; -//! # type Output = Digest<8>; //! # fn init<'a>(&'a mut self, _: Sha2_256) -> Result, Self::Error> { todo!() } //! # } //! # struct MyContext<'a>(&'a mut MyDigestImpl); @@ -81,7 +80,6 @@ //! # impl ErrorType for MyDigestController { type Error = core::convert::Infallible; } //! # impl DigestInit for MyDigestController { //! # type Context = MyOwnedContext; -//! # type Output = Digest<8>; //! # fn init(self, _: Sha2_256) -> Result { todo!() } //! # } //! # struct MyOwnedContext; @@ -417,9 +415,6 @@ pub enum ErrorKind { /// The specified hash algorithm is not supported by the hardware or software implementation. UnsupportedAlgorithm, - /// Failed to allocate memory for the hash computation. - MemoryAllocationFailure, - /// Failed to initialize the hash computation context. InitializationError, @@ -435,9 +430,6 @@ pub enum ErrorKind { /// General hardware failure during hash computation. HardwareFailure, - /// The specified output size is not valid for the hash function. - InvalidOutputSize, - /// Insufficient permissions to access the hardware or perform the hash computation. PermissionDenied, @@ -450,13 +442,11 @@ impl core::fmt::Display for ErrorKind { match self { Self::InvalidInputLength => write!(f, "invalid input data length"), Self::UnsupportedAlgorithm => write!(f, "unsupported hash algorithm"), - Self::MemoryAllocationFailure => write!(f, "memory allocation failed"), Self::InitializationError => write!(f, "failed to initialize hash computation"), Self::UpdateError => write!(f, "error updating hash computation"), Self::FinalizationError => write!(f, "error finalizing hash computation"), Self::Busy => write!(f, "hardware accelerator is busy"), Self::HardwareFailure => write!(f, "hardware failure during hash computation"), - Self::InvalidOutputSize => write!(f, "invalid output size for hash function"), Self::PermissionDenied => write!(f, "insufficient permissions to access hardware"), Self::NotInitialized => write!(f, "hash computation context not initialized"), } @@ -549,7 +539,6 @@ pub trait ErrorType { /// # impl ErrorType for MyDigestImpl { type Error = core::convert::Infallible; } /// # impl DigestInit for MyDigestImpl { /// # type OpContext<'a> = MyContext<'a> where Self: 'a; -/// # type Output = Digest<8>; /// # fn init<'a>(&'a mut self, _: Sha2_256) -> Result, Self::Error> { todo!() } /// # } /// # struct MyContext<'a>(&'a mut MyDigestImpl); @@ -571,26 +560,20 @@ pub trait DigestInit: ErrorType { /// This associated type represents the stateful context returned by [`init`](Self::init) /// that can be used to perform the actual digest operations via [`DigestOp`]. /// The lifetime parameter ensures the context cannot outlive the device that created it. - type OpContext<'a>: DigestOp + type OpContext<'a>: DigestOp where Self: 'a; - /// The output type produced by this digest implementation. - /// - /// This type must implement [`IntoBytes`] to allow conversion to byte arrays - /// for interoperability with other systems and zero-copy operations. - type Output: IntoBytes; - /// Init instance of the crypto function with the given context. /// /// # Parameters /// - /// - `init_params`: The context or configuration parameters for the crypto function. + /// - `algorithm`: The zero-sized algorithm marker type specifying which hash function to use. /// /// # Returns /// /// A new instance of the hash function. - fn init(&mut self, init_params: T) -> Result, Self::Error>; + fn init(&mut self, algorithm: T) -> Result, Self::Error>; } /// Trait for resetting digest computation contexts. @@ -748,7 +731,6 @@ pub mod owned { /// # } /// # impl DigestInit for MyController { /// # type Context = MyContext; - /// # type Output = Digest<8>; /// # fn init(self, _: Sha2_256) -> Result { todo!() } /// # } /// let controller = MyController; @@ -761,13 +743,7 @@ pub mod owned { /// /// This context has no lifetime constraints and can be stored in structs, /// moved between functions, and persisted across IPC boundaries. - type Context: DigestOp; - - /// The output type produced by this digest implementation. - /// - /// This type must implement [`IntoBytes`] to allow conversion to byte arrays - /// for interoperability with other systems and zero-copy operations. - type Output: IntoBytes; + type Context: DigestOp; /// Initialize a new digest computation context. /// @@ -776,12 +752,12 @@ pub mod owned { /// /// # Parameters /// - /// - `init_params`: Algorithm-specific initialization parameters + /// - `algorithm`: The zero-sized algorithm marker type specifying which hash function to use. /// /// # Returns /// /// An owned context that can be used for digest operations. - fn init(self, init_params: T) -> Result; + fn init(self, algorithm: T) -> Result; } /// Trait for performing digest operations with owned contexts. diff --git a/platform/impls/baremetal/mock/src/hash.rs b/platform/impls/baremetal/mock/src/hash.rs index 640f1ea2..b0b99146 100644 --- a/platform/impls/baremetal/mock/src/hash.rs +++ b/platform/impls/baremetal/mock/src/hash.rs @@ -83,13 +83,12 @@ macro_rules! impl_scoped_sha2 { ($algo:ident) => { impl DigestInit<$algo> for MockDigestDevice { type OpContext<'a> = MockHasher<'a, $algo>; - type Output = <$algo as DigestAlgorithm>::Digest; - fn init(&mut self, init_params: $algo) -> Result, Self::Error> { + fn init(&mut self, algorithm: $algo) -> Result, Self::Error> { // In a real implementation, we'd configure the hardware here Ok(Self::OpContext { hw: self, - _alg: init_params, + _alg: algorithm, data_processed: 0, }) } @@ -183,14 +182,13 @@ pub mod owned { ($algo:ident) => { impl DigestInit<$algo> for MockDigestController { type Context = MockOwnedContext<$algo>; - type Output = <$algo as DigestAlgorithm>::Digest; - fn init(self, init_params: $algo) -> Result { + fn init(self, algorithm: $algo) -> Result { // Controller moves into the context // In hardware implementation, this might claim hardware resources Ok(MockOwnedContext { controller: self, - algorithm: init_params, + algorithm, data_processed: 0, }) } diff --git a/platform/impls/rustcrypto/src/cipher.rs b/platform/impls/rustcrypto/src/cipher.rs index cc0fc70c..15664ccb 100644 --- a/platform/impls/rustcrypto/src/cipher.rs +++ b/platform/impls/rustcrypto/src/cipher.rs @@ -233,7 +233,6 @@ impl CipherInit for Aes256CtrCipher { &'a mut self, key: &Self::Key, nonce: &Self::Nonce, - _mode: Aes256CtrMode, ) -> Result, Self::Error> { // Validate key and nonce lengths (compile-time guaranteed by types) // Create new context with the provided key and IV @@ -409,7 +408,7 @@ mod tests { #[test] fn test_cipher_init_trait() { let mut cipher = Aes256CtrCipher; - let result = cipher.init(&TEST_KEY, &TEST_IV, Aes256CtrMode); + let result = cipher.init(&TEST_KEY, &TEST_IV); assert!( result.is_ok(), "Failed to create context via CipherInit trait" diff --git a/platform/impls/rustcrypto/src/controller.rs b/platform/impls/rustcrypto/src/controller.rs index e04265e8..12540cdc 100644 --- a/platform/impls/rustcrypto/src/controller.rs +++ b/platform/impls/rustcrypto/src/controller.rs @@ -69,7 +69,7 @@ impl DigestError for CryptoError { fn kind(&self) -> DigestErrorKind { match self { CryptoError::InvalidKeyLength => DigestErrorKind::InvalidInputLength, - CryptoError::InvalidOutputLength => DigestErrorKind::InvalidOutputSize, + CryptoError::InvalidOutputLength => DigestErrorKind::FinalizationError, CryptoError::OperationFailed => DigestErrorKind::HardwareFailure, } } @@ -218,7 +218,6 @@ impl MacErrorType for RustCryptoController { // Digest initialization - creates SHA-256 context impl DigestInit for RustCryptoController { type Context = DigestContext256; - type Output = Digest<8>; // SHA-256 output as 8 words of 32 bits fn init(self, _algorithm: Sha2_256) -> Result { Ok(DigestContext256(Sha256::new())) @@ -228,7 +227,6 @@ impl DigestInit for RustCryptoController { // Digest initialization - creates SHA-384 context impl DigestInit for RustCryptoController { type Context = DigestContext384; - type Output = Digest<12>; // SHA-384 output as 12 words of 32 bits fn init(self, _algorithm: Sha2_384) -> Result { Ok(DigestContext384(Sha384::new())) @@ -238,7 +236,6 @@ impl DigestInit for RustCryptoController { // Digest initialization - creates SHA-512 context impl DigestInit for RustCryptoController { type Context = DigestContext512; - type Output = Digest<16>; // SHA-512 output as 16 words of 32 bits fn init(self, _algorithm: Sha2_512) -> Result { Ok(DigestContext512(Sha512::new())) diff --git a/services/fwmanager/api/BUILD.bazel b/services/fwmanager/api/BUILD.bazel new file mode 100644 index 00000000..49662ed9 --- /dev/null +++ b/services/fwmanager/api/BUILD.bazel @@ -0,0 +1,22 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@rules_rust//rust:defs.bzl", "rust_library", "rust_test") + +rust_library( + name = "fwmanager_api", + srcs = [ + "src/boot_control.rs", + "src/boot_monitor.rs", + "src/config.rs", + "src/lib.rs", + ], + edition = "2024", + visibility = ["//visibility:public"], +) + +# Host tests: build on the host platform, no kernel/QEMU. +rust_test( + name = "fwmanager_api_test", + crate = ":fwmanager_api", +) diff --git a/services/fwmanager/api/src/boot_control.rs b/services/fwmanager/api/src/boot_control.rs new file mode 100644 index 00000000..ae13cd57 --- /dev/null +++ b/services/fwmanager/api/src/boot_control.rs @@ -0,0 +1,123 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Home of the [`BootControl`] capability contract. + +/// Actuation capability: hold a managed device in reset and release it. +/// +/// Stateless pass-through by design — sequencing discipline (hold before +/// release, release only after verification) belongs to the orchestrator +/// flows, where it is observable behavior. +/// +/// # How the orchestrator uses it +/// +/// During verified release the orchestrator parks a device in +/// reset, verifies its active slot while nothing is running, then releases +/// it to boot the image it just checked: +/// +/// ```ignore +/// // `dev` is this device's BootControl, obtained from the registry. +/// fn verified_release(dev: &mut D) -> Result<(), D::Error> { +/// dev.hold_in_reset()?; // freeze the device; its flash is now safe to inspect +/// verify_active_slot()?; // re-hash + signature check (a separate capability) +/// dev.release()?; // run the just-verified image +/// Ok(()) +/// } +/// ``` +/// +/// In a trial boot the same hold/release pair brackets a +/// watchdog-bounded window; the new slot is committed only if a good boot is +/// observed, otherwise the device falls back to the previous slot: +/// +/// ```ignore +/// dev.hold_in_reset()?; +/// store.set_trial(new_slot)?; // tentative boot selection — not yet committed +/// dev.release()?; // boot the trial image +/// match monitor.await_boot(window)? { +/// Booted => store.commit(new_slot)?, // observed good => make it active +/// Failed | Timeout => { /* nothing committed; previous slot still active */ } +/// } +/// ``` +pub trait BootControl { + /// The error type reported by this device's boot control. + /// + /// Requires [`core::error::Error`] (in `core` since Rust 1.81) so the + /// orchestrator gets `Display` and a `source()` cause chain, not just a + /// `Debug` dump. Error categories stay implementation-defined — this + /// crate names no error vocabulary of its own; a consumer that knows the + /// concrete adapter can recover its details by downcasting the + /// `&dyn core::error::Error`. + type Error: core::error::Error; + + /// Holds the device in reset. + fn hold_in_reset(&mut self) -> Result<(), Self::Error>; + + /// Releases the device from reset. + fn release(&mut self) -> Result<(), Self::Error>; +} + +#[cfg(test)] +mod tests { + use super::*; + + // A BootControl implemented against no HAL at all — the contract must be + // satisfiable from any stack (mock, IPC proxy, simulator). Re-adding a + // HAL-flavored bound on `Error` breaks this compile. + struct MockDevice { + fail: bool, + } + + #[derive(Debug, PartialEq, Eq)] + struct MockFault; + + impl core::fmt::Display for MockFault { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + f.write_str("mock device fault") + } + } + + impl core::error::Error for MockFault {} + + impl BootControl for MockDevice { + type Error = MockFault; + + fn hold_in_reset(&mut self) -> Result<(), MockFault> { + if self.fail { + Err(MockFault) + } else { + Ok(()) + } + } + + fn release(&mut self) -> Result<(), MockFault> { + if self.fail { + Err(MockFault) + } else { + Ok(()) + } + } + } + + /// The doc example's orchestrator shape, generic over any `BootControl`. + fn hold_then_release(dev: &mut D) -> Result<(), D::Error> { + dev.hold_in_reset()?; + dev.release() + } + + #[test] + fn contract_is_implementable_without_the_hal() { + let mut dev = MockDevice { fail: false }; + + hold_then_release(&mut dev).expect("hold/release failed"); + } + + #[test] + fn errors_surface_through_the_generic_seam() { + let mut dev = MockDevice { fail: true }; + + let err = hold_then_release(&mut dev).expect_err("expected the device fault"); + + // Display comes from the core::error::Error bound, not a Debug dump. + assert_eq!(err.to_string(), "mock device fault"); + } +} diff --git a/services/fwmanager/api/src/boot_monitor.rs b/services/fwmanager/api/src/boot_monitor.rs new file mode 100644 index 00000000..96956880 --- /dev/null +++ b/services/fwmanager/api/src/boot_monitor.rs @@ -0,0 +1,180 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Observation capability: read a managed device's boot liveness. + +/// Liveness of a managed device's boot: Boot Confirmation only. +/// +/// Reports only that a device came up, never what booted; confirming the +/// running image is the one the RoT staged is attestation, a separate step. +/// `Failed` is optional device-reported evidence and never the only failure +/// path, since a hung device reports nothing — a stuck boot is caught by the +/// orchestrator's timeout, not by this enum. +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +pub enum BootStatus { + /// Released, but boot completion not yet observed. + Booting, + /// Boot completion observed. + Booted, + /// Device reported a boot failure. + Failed, +} + +/// Observation capability: read a managed device's boot liveness. +/// +/// Pull-shaped: where the underlying signal is an edge or pulse, the interrupt +/// latches a flag beneath this seam and `boot_status` only reads it. No +/// callback registration, which would require allocation and invert control +/// into device implementations. +/// +/// The reported status must describe the **current** boot cycle. An +/// implementation backed by a latched signal must guarantee the latch is +/// cleared whenever the device re-enters reset, so evidence left over from a +/// previous boot never reads as [`BootStatus::Booted`]. This trait +/// deliberately has no re-arm operation: clearing is the reset path's job +/// (hardware tying the latch to the device's reset line, or the same platform +/// code that drives `BootControl`), not the observer's — a monitor that could +/// clear its own evidence would let a read race a reset. +pub trait BootMonitor { + /// The error type reported by this device's boot monitor. + /// + /// Requires [`core::error::Error`] (in `core` since Rust 1.81) so the + /// orchestrator gets `Display` and a `source()` cause chain, not just a + /// `Debug` dump. Error categories stay implementation-defined — this + /// crate names no error vocabulary of its own; a consumer that knows the + /// concrete adapter can recover its details by downcasting the + /// `&dyn core::error::Error`. + type Error: core::error::Error; + + /// Returns the current liveness of the device. + /// + /// Any given monitor may only ever produce a *subset* of [`BootStatus`], + /// depending on the signals it can access: a single ready pin yields only + /// `Booting`/`Booted`, while a fault-channel backend can also report + /// `Failed`. This is a capability difference between backends, not an + /// incomplete implementation. Consumers must still handle the full set — + /// they cannot know statically which backend they hold. + /// + /// # Errors + /// + /// Returns an error if the underlying liveness signal cannot be read. + fn boot_status(&self) -> Result; +} + +#[cfg(test)] +#[allow(clippy::bool_assert_comparison)] +mod tests { + use super::*; + use core::cell::Cell; + + // ── Trait contract ────────────────────────────────────────────────── + // MockMonitor implements the trait without any HAL dependency. If a + // HAL-specific bound sneaks back onto `Error`, this module stops + // compiling. + + struct MockMonitor { + ready_after: usize, + polls: Cell, + fail: bool, + } + + #[derive(Debug, PartialEq, Eq)] + struct MockFault; + + impl core::fmt::Display for MockFault { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + f.write_str("mock monitor fault") + } + } + + impl core::error::Error for MockFault {} + + impl BootMonitor for MockMonitor { + type Error = MockFault; + + fn boot_status(&self) -> Result { + if self.fail { + return Err(MockFault); + } + let polls = self.polls.get(); + self.polls.set(polls + 1); + Ok(if polls >= self.ready_after { + BootStatus::Booted + } else { + BootStatus::Booting + }) + } + } + + // A device that is still coming up reads Booting, then Booted once it + // is up. + #[test] + fn status_progresses_from_booting_to_booted() { + let mon = MockMonitor { + ready_after: 1, + polls: Cell::new(0), + fail: false, + }; + + assert_eq!( + mon.boot_status().expect("boot_status failed"), + BootStatus::Booting + ); + assert_eq!( + mon.boot_status().expect("boot_status failed"), + BootStatus::Booted + ); + } + + #[test] + fn errors_surface_through_the_generic_seam() { + let mon = MockMonitor { + ready_after: 0, + polls: Cell::new(0), + fail: true, + }; + + let err = comes_up_within(&mon, 1).expect_err("expected the monitor fault"); + + // Display comes from the core::error::Error bound, not a Debug dump. + assert_eq!(err.to_string(), "mock monitor fault"); + } + + // ── The orchestrator's future shape ───────────────────────────────── + // Usage examples for the future orchestrator, not API guarantees; move + // these to the orchestrator crate once it exists. + + /// Poll a monitor up to `poll_budget` times. `Booting` is not a failure; + /// `Ok(false)` means the budget ran out before the device came up. + fn comes_up_within(mon: &M, poll_budget: usize) -> Result { + for _ in 0..poll_budget { + if mon.boot_status()? == BootStatus::Booted { + return Ok(true); + } + } + Ok(false) + } + + // A device that comes up within the poll budget reads Booted. + #[test] + fn a_device_that_comes_up_within_budget_is_booted() { + let mon = MockMonitor { + ready_after: 2, + polls: Cell::new(0), + fail: false, + }; + + assert_eq!(comes_up_within(&mon, 5).expect("boot_status failed"), true); + } + + #[test] + fn a_device_that_never_comes_up_is_a_timeout_not_an_error() { + let mon = MockMonitor { + ready_after: usize::MAX, + polls: Cell::new(0), + fail: false, + }; + + assert_eq!(comes_up_within(&mon, 3).expect("boot_status failed"), false); + } +} diff --git a/services/fwmanager/api/src/config.rs b/services/fwmanager/api/src/config.rs new file mode 100644 index 00000000..43e3ed8b --- /dev/null +++ b/services/fwmanager/api/src/config.rs @@ -0,0 +1,173 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Schema for the per-board device table. Board device tables +//! (`target//devices.rs`) declare the values; no concrete line or +//! device is named here. + +/// What the orchestrator requires before it commits a staged image. +/// +/// Intentionally exhaustive (not `#[non_exhaustive]`): adding a variant is +/// a breaking change, so the compiler forces every match on the policy — +/// in particular the orchestrator's commit decision — to handle the new +/// variant explicitly instead of falling into a wildcard arm. +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +pub enum CommitPolicy { + /// The device reports it came up. + Liveness, + /// Liveness plus SPDM re-attestation of the running image. + LivenessAndAttestation, +} + +/// How the orchestrator observes a device's boot-progress signal. +/// +/// Generic over the id type `G` the board's boot monitor uses to read a +/// boot-complete line, for the same reason `DeviceConfig` is generic over +/// its reset signal: signal ids are board-specific. +/// +/// Intentionally exhaustive (not `#[non_exhaustive]`): adding a signal +/// kind is a breaking change, so every consumer that dispatches on it is +/// forced to handle the new kind explicitly. +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +pub enum BootSignal { + /// The device raises a boot-complete GPIO line. + GpioBootComplete(G), + /// The device sends a heartbeat message. + Heartbeat, + /// The device's MCTP endpoint answers as ready. + MctpReady, + /// The device answers a firmware version query. + VersionQuery, +} + +/// One boot-progress checkpoint: a signal the orchestrator waits for, and +/// how long it waits. +#[derive(Debug, Clone, Copy)] +pub struct BootCheckpoint { + /// Names the checkpoint in timeout reports. + pub name: &'static str, + pub signal: BootSignal, + /// How long the orchestrator waits for `signal` before it declares the + /// checkpoint — and the device's boot — failed. Expiry is the + /// orchestrator's own judgment; hung devices report nothing. + pub window: core::time::Duration, +} + +/// One managed downstream device, as declared by the board config. +/// +/// Generic over the board's reset signal type `R`, which must match the +/// `ResetId` of the reset controller behind the board's `BootControl` +/// implementation — the compiler rejects a table whose ids the controller +/// cannot accept. +/// +/// Intentionally exhaustive (not `#[non_exhaustive]`): board tables +/// construct this struct by literal, which the attribute would forbid. +/// Adding a field is a breaking change that updates every board table. +#[derive(Debug, Clone, Copy)] +pub struct DeviceConfig { + pub name: &'static str, + /// Reset signal id, passed to HalBootControl::new. + pub reset_signal: R, + /// Boot-progress checkpoints, in the order the device passes them. + /// The device counts as booted when the last one is reached; a + /// checkpoint whose window expires fails the boot. + pub checkpoints: &'static [BootCheckpoint], + pub commit_policy: CommitPolicy, +} + +/// Checks a device table. Board configs call this in a const context so a +/// bad table fails the build. +pub const fn validate(devices: &[DeviceConfig]) { + let mut i = 0; + while i < devices.len() { + assert!(!devices[i].name.is_empty(), "device name must not be empty"); + assert!( + !devices[i].checkpoints.is_empty(), + "device must declare at least one boot checkpoint" + ); + let mut c = 0; + while c < devices[i].checkpoints.len() { + assert!( + !devices[i].checkpoints[c].name.is_empty(), + "checkpoint name must not be empty" + ); + assert!( + !devices[i].checkpoints[c].window.is_zero(), + "checkpoint window must not be zero" + ); + c += 1; + } + i += 1; + } +} + +#[cfg(test)] +mod tests { + use super::*; + use core::time::Duration; + + // Board tables run validate() at compile time, where a rejection is a + // build error nobody can assert on. These tests call it at runtime to + // prove the reject paths actually fire — a vacuous loop would pass + // every `const _` check silently. + + const CHECKPOINT: BootCheckpoint = BootCheckpoint { + name: "boot-complete", + signal: BootSignal::GpioBootComplete(0), + window: Duration::from_secs(1), + }; + + const DEVICE: DeviceConfig = DeviceConfig { + name: "dev", + reset_signal: 0, + checkpoints: &[CHECKPOINT], + commit_policy: CommitPolicy::Liveness, + }; + + #[test] + fn accepts_a_valid_table() { + validate(&[DEVICE]); + } + + #[test] + #[should_panic(expected = "device name must not be empty")] + fn rejects_an_empty_device_name() { + validate(&[DEVICE, DeviceConfig { name: "", ..DEVICE }]); + } + + #[test] + #[should_panic(expected = "at least one boot checkpoint")] + fn rejects_an_empty_checkpoint_list() { + validate(&[DeviceConfig { + checkpoints: &[], + ..DEVICE + }]); + } + + #[test] + #[should_panic(expected = "checkpoint name must not be empty")] + fn rejects_an_empty_checkpoint_name() { + validate(&[DeviceConfig { + checkpoints: &[BootCheckpoint { + name: "", + ..CHECKPOINT + }], + ..DEVICE + }]); + } + + #[test] + #[should_panic(expected = "checkpoint window must not be zero")] + fn rejects_a_zero_checkpoint_window() { + validate(&[DeviceConfig { + checkpoints: &[ + CHECKPOINT, + BootCheckpoint { + window: Duration::ZERO, + ..CHECKPOINT + }, + ], + ..DEVICE + }]); + } +} diff --git a/services/fwmanager/api/src/lib.rs b/services/fwmanager/api/src/lib.rs new file mode 100644 index 00000000..f379d10b --- /dev/null +++ b/services/fwmanager/api/src/lib.rs @@ -0,0 +1,30 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Device-facing capability traits for the Boot Orchestrator. +//! +//! `BootControl` is the actuation capability: the orchestrator drives a +//! single managed device's reset without knowing which controller line it +//! maps to. +//! +//! `BootMonitor` is the observation capability: the orchestrator reads a +//! device's boot liveness. +//! +//! This crate is a dependency-free leaf: it holds the capability contracts +//! and the schema for the per-board device table, and everything depends +//! downward on it. Concrete adapters bind a trait to a signal source and +//! live in their own crates, so naming a capability never drags in the stack +//! behind it — the HAL-backed `HalBootControl` and `GpioBootMonitor` are in +//! `fwmanager-hal-adapters`; other backends (for example an MCTP-ready +//! `BootMonitor`) implement the same traits from their own transport crate. +//! Config values live in the board device tables +//! (`target//devices.rs`). + +#![cfg_attr(not(test), no_std)] + +mod boot_control; +mod boot_monitor; +pub mod config; + +pub use boot_control::BootControl; +pub use boot_monitor::{BootMonitor, BootStatus}; diff --git a/services/fwmanager/hal-adapters/BUILD.bazel b/services/fwmanager/hal-adapters/BUILD.bazel new file mode 100644 index 00000000..14e65f0d --- /dev/null +++ b/services/fwmanager/hal-adapters/BUILD.bazel @@ -0,0 +1,25 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@rules_rust//rust:defs.bzl", "rust_library", "rust_test") + +rust_library( + name = "fwmanager_hal_adapters", + srcs = [ + "src/gpio_boot_monitor.rs", + "src/hal_boot_control.rs", + "src/lib.rs", + ], + edition = "2024", + visibility = ["//visibility:public"], + deps = [ + "//hal/blocking", + "//services/fwmanager/api:fwmanager_api", + ], +) + +# Host tests: build on the host platform, no kernel/QEMU. +rust_test( + name = "fwmanager_hal_adapters_test", + crate = ":fwmanager_hal_adapters", +) diff --git a/services/fwmanager/hal-adapters/src/gpio_boot_monitor.rs b/services/fwmanager/hal-adapters/src/gpio_boot_monitor.rs new file mode 100644 index 00000000..d8bf0e12 --- /dev/null +++ b/services/fwmanager/hal-adapters/src/gpio_boot_monitor.rs @@ -0,0 +1,343 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! HAL-backed [`BootMonitor`]: read a device's boot-complete signal off a GPIO +//! input line. + +use fwmanager_api::{BootMonitor, BootStatus}; +use openprot_hal_blocking::gpio_port::{ + ActivePolarity, GpioError, GpioErrorKind, GpioPort, PinMask, +}; + +/// Adapts any HAL GPIO error into a [`core::error::Error`]. +/// +/// GPIO ports keep implementing the HAL `GpioError`/`kind()` pattern +/// unchanged; this wrapper supplies the `Display` and `core::error::Error` +/// machinery [`BootMonitor::Error`] requires, so no per-implementation work is +/// needed. The underlying category stays reachable via [`MonitorError::kind`], +/// and the concrete HAL error through the +/// [`source()`](core::error::Error::source) chain, downcast to +/// [`GpioCause`](GpioCause). +#[derive(Debug)] +pub struct MonitorError(GpioCause); + +/// The concrete HAL error underneath a [`MonitorError`], surfaced as its +/// [`source()`](core::error::Error::source). +/// +/// `GpioError` only guarantees `Debug`, so the HAL error cannot be the source +/// itself; this wrapper adds the `Display`/`Error` machinery. It renders the +/// full concrete error, not just its kind — the tail of a rendered error +/// chain carries the implementation's details. +#[derive(Debug)] +pub struct GpioCause(pub E); + +impl core::fmt::Display for MonitorError { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "boot monitor error: {:?}", self.kind()) + } +} + +impl core::error::Error for MonitorError { + fn source(&self) -> Option<&(dyn core::error::Error + 'static)> { + Some(&self.0) + } +} + +impl core::fmt::Display for GpioCause { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "{:?}", self.0) + } +} + +impl core::error::Error for GpioCause {} + +impl GpioError for MonitorError { + fn kind(&self) -> GpioErrorKind { + let GpioCause(inner) = &self.0; + inner.kind() + } +} + +impl From for MonitorError { + fn from(err: E) -> Self { + Self(GpioCause(err)) + } +} + +/// Binds one input line of a HAL GPIO port to a managed device's boot-complete +/// signal. +/// +/// The input-side counterpart to [`HalBootControl`]: the `(port, ready_pin, +/// active)` binding is made once, in platform configuration, and the +/// orchestrator never learns which line belongs to which device. A signal that +/// latches high is read directly; an edge or pulse (for example a heartbeat) is +/// latched in hardware at bring-up so `read_input` still reflects it. +/// +/// The monitor only reads, so it *borrows* the port rather than owning it: +/// several monitors can watch different lines of the same bank (on the +/// AST1060 SGPIOM a bank packs 32 unrelated lines, so distinct devices' +/// ready signals routinely share one). Platform configuration keeps the bank +/// alive for as long as its monitors. +/// +/// A single ready line can only ever answer "up yet?", so this backend +/// reports the [`BootStatus::Booting`]/[`BootStatus::Booted`] subset — see +/// [`BootMonitor::boot_status`] on why that is a capability difference, not +/// an incomplete implementation. +/// +/// Where a hardware latch is used, the platform must clear it whenever the +/// device re-enters reset (typically by wiring the latch's clear to the +/// device's reset line) — [`BootMonitor`] requires that evidence from a +/// previous boot never reads as [`BootStatus::Booted`], and this adapter only +/// reads the line, it cannot re-arm it. +/// +/// [`HalBootControl`]: crate::HalBootControl +pub struct GpioBootMonitor<'a, P: GpioPort> { + port: &'a P, + ready_pin: P::Mask, + active: ActivePolarity, +} + +impl<'a, P: GpioPort> GpioBootMonitor<'a, P> { + /// Binds `port`'s line `ready_pin`, asserted per `active`, as a device's + /// boot-complete signal. + /// + /// `ready_pin` must name exactly one line — boot-complete is a single + /// signal. Masks naming several lines are not supported (the `PinMask` + /// contract offers no way to reject them here, so they are unspecified + /// behavior, not a feature). + /// + /// # Panics + /// + /// Panics if `ready_pin` is empty. An empty mask is vacuously contained + /// in every sample, so it would report every device `Booted` from the + /// moment reset is released — a misbinding that must fail at + /// construction, in platform bring-up, not stay silent in the field. + pub fn new(port: &'a P, ready_pin: P::Mask, active: ActivePolarity) -> Self { + assert!( + !ready_pin.is_empty(), + "GpioBootMonitor bound to an empty pin mask" + ); + Self { + port, + ready_pin, + active, + } + } +} + +// `P::Error: 'static` because `source()` hands out `&(dyn Error + 'static)` +// referencing the wrapped HAL error. Error types are plain data; this costs +// no real implementation anything. +impl BootMonitor for GpioBootMonitor<'_, P> +where + P::Error: 'static, +{ + type Error = MonitorError; + + /// # Errors + /// + /// Propagates any error returned by the port's `read_input`. + fn boot_status(&self) -> Result { + let high = self.port.read_input()?.contains(self.ready_pin); + let booted = match self.active { + ActivePolarity::ActiveHigh => high, + ActivePolarity::ActiveLow => !high, + }; + Ok(if booted { + BootStatus::Booted + } else { + BootStatus::Booting + }) + } +} + +#[cfg(test)] +mod tests { + use super::*; + use openprot_hal_blocking::gpio_port::GpioErrorType; + + // BMC boot-complete on line 4. Normally set in config.rs. + const BMC_READY: Mask = Mask(1 << 4); + + /// Bitmask over a single mock GPIO bank. + #[derive(Debug, Clone, Copy, PartialEq, Eq)] + struct Mask(u8); + + impl PinMask for Mask { + fn empty() -> Self { + Self(0) + } + + fn all() -> Self { + Self(u8::MAX) + } + + fn is_empty(&self) -> bool { + self.0 == 0 + } + + fn contains(&self, other: Self) -> bool { + self.0 & other.0 == other.0 + } + + fn union(&self, other: Self) -> Self { + Self(self.0 | other.0) + } + + fn intersection(&self, other: Self) -> Self { + Self(self.0 & other.0) + } + + fn toggle(&self) -> Self { + Self(!self.0) + } + } + + #[derive(Debug, Clone, Copy, PartialEq, Eq)] + struct MockError(GpioErrorKind); + + impl GpioError for MockError { + fn kind(&self) -> GpioErrorKind { + self.0 + } + } + + /// Mock HAL GPIO port: returns a fixed input sample, with opt-in read + /// failure injection. Output-side methods must never be called. + struct MockGpioPort { + input: Mask, + fail: Option, + } + + impl MockGpioPort { + fn with_input(input: Mask) -> Self { + Self { input, fail: None } + } + + fn failing(kind: GpioErrorKind) -> Self { + Self { + input: Mask::empty(), + fail: Some(kind), + } + } + } + + impl GpioErrorType for MockGpioPort { + type Error = MockError; + } + + impl GpioPort for MockGpioPort { + type Config = (); + type Mask = Mask; + + fn read_input(&self) -> Result { + match self.fail { + Some(kind) => Err(MockError(kind)), + None => Ok(self.input), + } + } + + fn configure(&mut self, _: Mask, _: ()) -> Result<(), MockError> { + panic!("BootMonitor must never configure pins"); + } + + fn set_reset(&mut self, _: Mask, _: Mask) -> Result<(), MockError> { + panic!("BootMonitor must never drive outputs"); + } + + fn toggle(&mut self, _: Mask) -> Result<(), MockError> { + panic!("BootMonitor must never drive outputs"); + } + } + + // A ready line asserted high reads as Booted under active-high polarity. + #[test] + fn booted_when_ready_line_asserted() { + let port = MockGpioPort::with_input(BMC_READY); + let mon = GpioBootMonitor::new(&port, BMC_READY, ActivePolarity::ActiveHigh); + + assert_eq!(mon.boot_status().expect("read failed"), BootStatus::Booted); + } + + // A deasserted ready line is not a failure — the device is still Booting + // until the orchestrator's own timeout fires. + #[test] + fn booting_when_ready_line_deasserted() { + let port = MockGpioPort::with_input(Mask::empty()); + let mon = GpioBootMonitor::new(&port, BMC_READY, ActivePolarity::ActiveHigh); + + assert_eq!(mon.boot_status().expect("read failed"), BootStatus::Booting); + } + + // Active-low inverts the sense: a low line is asserted, hence Booted. + #[test] + fn respects_active_low_polarity() { + let port = MockGpioPort::with_input(Mask::empty()); + let mon = GpioBootMonitor::new(&port, BMC_READY, ActivePolarity::ActiveLow); + + assert_eq!(mon.boot_status().expect("read failed"), BootStatus::Booted); + } + + // Only the configured line matters: an unrelated high line leaves the + // device Booting. + #[test] + fn ignores_other_lines() { + let port = MockGpioPort::with_input(Mask(1 << 2)); + let mon = GpioBootMonitor::new(&port, BMC_READY, ActivePolarity::ActiveHigh); + + assert_eq!(mon.boot_status().expect("read failed"), BootStatus::Booting); + } + + // An empty mask would read as Booted forever (it is vacuously contained + // in every sample); binding one must die at construction. + #[test] + #[should_panic(expected = "empty pin mask")] + fn empty_ready_mask_panics_at_construction() { + let port = MockGpioPort::with_input(Mask::empty()); + GpioBootMonitor::new(&port, Mask::empty(), ActivePolarity::ActiveHigh); + } + + // A controller error surfaces through BootMonitor unchanged. + #[test] + fn port_error_propagates_through_boot_monitor() { + let port = MockGpioPort::failing(GpioErrorKind::HardwareFailure); + let mon = GpioBootMonitor::new(&port, BMC_READY, ActivePolarity::ActiveHigh); + + let err = mon + .boot_status() + .expect_err("expected the port error to propagate"); + assert_eq!(err.kind(), GpioErrorKind::HardwareFailure); + } + + /// Compile-time fence: the adapter error must satisfy `core::error::Error` + /// (Display + source) *and* the HAL `GpioError` (with `kind()`). Fails to + /// compile if either is dropped. + fn _assert_error_contract() {} + + #[test] + fn monitor_error_satisfies_the_full_contract() { + _assert_error_contract::>(); + } + + #[test] + fn monitor_error_renders_a_human_readable_message() { + let err = MonitorError::from(MockError(GpioErrorKind::HardwareFailure)); + + assert_eq!(err.to_string(), "boot monitor error: HardwareFailure"); + } + + // The cause chain: source() carries the concrete HAL error with its full + // details (not just the kind), and downcasting recovers the typed error. + #[test] + fn source_exposes_the_concrete_hal_error() { + let err = MonitorError::from(MockError(GpioErrorKind::HardwareFailure)); + + let src = core::error::Error::source(&err).expect("source must carry the HAL error"); + assert_eq!(src.to_string(), "MockError(HardwareFailure)"); + + let cause = src + .downcast_ref::>() + .expect("source must downcast to the concrete cause"); + assert_eq!(cause.0, MockError(GpioErrorKind::HardwareFailure)); + } +} diff --git a/services/fwmanager/hal-adapters/src/hal_boot_control.rs b/services/fwmanager/hal-adapters/src/hal_boot_control.rs new file mode 100644 index 00000000..b4ef418a --- /dev/null +++ b/services/fwmanager/hal-adapters/src/hal_boot_control.rs @@ -0,0 +1,265 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! HAL-backed [`BootControl`]: bind one reset-controller line to a device. + +use fwmanager_api::BootControl; +use openprot_hal_blocking::system_control::{Error as HalError, ErrorKind, ResetControl}; + +/// Adapts any HAL system-control error into a [`core::error::Error`]. +/// +/// Reset controllers keep implementing the HAL `Error`/`kind()` pattern +/// unchanged; this wrapper supplies the `Display` and `core::error::Error` +/// machinery [`BootControl::Error`] requires, so no per-implementation work is +/// needed. The underlying category stays reachable via [`BootError::kind`]. +#[derive(Debug)] +pub struct BootError(pub E); + +impl core::fmt::Display for BootError { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "boot control error: {:?}", self.0.kind()) + } +} + +impl core::error::Error for BootError {} + +impl HalError for BootError { + fn kind(&self) -> ErrorKind { + self.0.kind() + } +} + +impl From for BootError { + fn from(err: E) -> Self { + Self(err) + } +} + +/// Binds one reset line of a HAL reset controller to one managed device. +pub struct HalBootControl { + controller: C, + reset_id: C::ResetId, +} + +impl HalBootControl { + pub fn new(controller: C, reset_id: C::ResetId) -> Self { + Self { + controller, + reset_id, + } + } + + pub fn controller(&self) -> &C { + &self.controller + } +} + +impl BootControl for HalBootControl { + type Error = BootError; + + fn hold_in_reset(&mut self) -> Result<(), Self::Error> { + self.controller.reset_assert(&self.reset_id)?; + Ok(()) + } + + fn release(&mut self) -> Result<(), Self::Error> { + self.controller.reset_deassert(&self.reset_id)?; + Ok(()) + } +} + +#[cfg(test)] +mod tests { + use super::*; + use core::time::Duration; + use openprot_hal_blocking::system_control::{Error as HalError, ErrorKind, ErrorType}; + + // Normally set in config.rs + const BMC_LINE: u8 = 7; + + #[derive(Debug, PartialEq, Eq, Clone, Copy)] + enum Call { + Assert(u8), + Deassert(u8), + } + + #[derive(Debug, PartialEq, Eq, Clone, Copy)] + struct MockError(ErrorKind); + + impl HalError for MockError { + fn kind(&self) -> ErrorKind { + self.0 + } + } + + /// Mock HAL reset controller: records every call it receives. + struct MockResetController { + calls: Vec, + fail: Option, + } + + impl MockResetController { + fn new() -> Self { + Self { + calls: Vec::new(), + fail: None, + } + } + + fn failing(kind: ErrorKind) -> Self { + Self { + calls: Vec::new(), + fail: Some(kind), + } + } + + fn calls(&self) -> &[Call] { + &self.calls + } + } + + impl ErrorType for MockResetController { + type Error = MockError; + } + + impl ResetControl for MockResetController { + type ResetId = u8; // Reset line is GPIO here. Real driver should use Enum + + fn reset_assert(&mut self, reset_id: &u8) -> Result<(), MockError> { + if let Some(kind) = self.fail { + return Err(MockError(kind)); + } + self.calls.push(Call::Assert(*reset_id)); + Ok(()) + } + + fn reset_deassert(&mut self, reset_id: &u8) -> Result<(), MockError> { + if let Some(kind) = self.fail { + return Err(MockError(kind)); + } + self.calls.push(Call::Deassert(*reset_id)); + Ok(()) + } + + fn reset_pulse(&mut self, _: &u8, _: Duration) -> Result<(), MockError> { + panic!( + "BootControl must never pulse: hold and release are distinct orchestrator steps" + ); + } + + fn reset_is_asserted(&self, _: &u8) -> Result { + panic!("BootControl does not query line state"); + } + } + + // `hold_in_reset()` must assert exactly the configured line (BMC = 7) + // and nothing else. + #[test] + fn holding_a_device_in_reset_asserts_its_configured_line() { + let mut bmc = HalBootControl::new(MockResetController::new(), BMC_LINE); + + bmc.hold_in_reset().expect("hold_in_reset failed"); + + assert_eq!(bmc.controller().calls(), &[Call::Assert(BMC_LINE)]); + } + + #[test] + fn releasing_a_device_from_reset_deasserts_its_configured_line() { + let mut bmc = HalBootControl::new(MockResetController::new(), BMC_LINE); + + bmc.hold_in_reset().expect("hold_in_reset failed"); + bmc.release().expect("release failed"); + + assert_eq!( + bmc.controller().calls(), + &[Call::Assert(BMC_LINE), Call::Deassert(BMC_LINE)] + ); + } + + #[test] + fn controller_error_propagates_through_boot_control() { + let mut bmc = HalBootControl::new( + MockResetController::failing(ErrorKind::InvalidResetId), + BMC_LINE, + ); + let err = bmc + .hold_in_reset() + .expect_err("expected the controller error to propagate"); + assert_eq!(err.kind(), ErrorKind::InvalidResetId); + } + + #[test] + fn controller_error_propagates_through_release() { + let mut bmc = + HalBootControl::new(MockResetController::failing(ErrorKind::Timeout), BMC_LINE); + let err = bmc + .release() + .expect_err("expected the controller error to propagate"); + assert_eq!(err.kind(), ErrorKind::Timeout); + } + + /// Compile-time fence: the adapter error must satisfy `core::error::Error` + /// (Display + source) *and* the HAL `Error` (with `kind()`). Fails to + /// compile if either is dropped. + fn _assert_error_contract() {} + + #[test] + fn boot_error_satisfies_the_full_contract() { + _assert_error_contract::>(); + } + + #[test] + fn boot_error_renders_a_human_readable_message() { + let err = BootError(MockError(ErrorKind::HardwareFailure)); + + assert_eq!(err.to_string(), "boot control error: HardwareFailure"); + } + + #[test] + fn boot_error_is_a_leaf_with_no_source() { + let err = BootError(MockError(ErrorKind::Timeout)); + + // HAL errors carry no nested `core::error::Error` cause. + assert!(core::error::Error::source(&err).is_none()); + } + + #[test] + fn dyn_error_downcasts_back_to_the_concrete_type() { + let err = BootError(MockError(ErrorKind::PermissionDenied)); + + let dyn_err: &dyn core::error::Error = &err; + let recovered = dyn_err + .downcast_ref::>() + .expect("expected to recover the concrete error type"); + assert_eq!(recovered.kind(), ErrorKind::PermissionDenied); + } + + /// Categorize a failure from *any* `BootControl` — the trait bound only + /// promises `core::error::Error`, so a generic consumer recovers the HAL + /// category by downcasting to the adapter error it knows about. + fn categorize_hold_failure(dev: &mut D) -> Option + where + D::Error: 'static, + { + let err = dev.hold_in_reset().err()?; + let dyn_err: &dyn core::error::Error = &err; + dyn_err + .downcast_ref::>() + .map(|e| e.kind()) + } + + #[test] + fn error_kind_is_reachable_through_generic_boot_control() { + let mut bmc = HalBootControl::new( + MockResetController::failing(ErrorKind::HardwareFailure), + BMC_LINE, + ); + + // No concrete error type in the signature — the HAL category comes + // back through the `dyn Error` downcast. + assert_eq!( + categorize_hold_failure(&mut bmc), + Some(ErrorKind::HardwareFailure) + ); + } +} diff --git a/services/fwmanager/hal-adapters/src/lib.rs b/services/fwmanager/hal-adapters/src/lib.rs new file mode 100644 index 00000000..f4eb93c4 --- /dev/null +++ b/services/fwmanager/hal-adapters/src/lib.rs @@ -0,0 +1,20 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! HAL-backed adapters for the Boot Orchestrator capability traits. +//! +//! Each type here implements a capability trait from `fwmanager-api` against +//! a HAL-blocking trait: [`HalBootControl`] drives `BootControl` over a +//! `ResetControl` line, and [`GpioBootMonitor`] reads `BootMonitor` off a +//! `GpioPort` input line. Adapters live in this crate — not in the leaf +//! `fwmanager-api` — so that depending on a capability contract never pulls +//! in the HAL. A transport-backed adapter belongs in its own crate depending +//! on its own stack, by the same rule. + +#![cfg_attr(not(test), no_std)] + +mod gpio_boot_monitor; +mod hal_boot_control; + +pub use gpio_boot_monitor::{GpioBootMonitor, GpioCause, MonitorError}; +pub use hal_boot_control::{BootError, HalBootControl}; diff --git a/target/ast10x0/board/BUILD.bazel b/target/ast10x0/board/BUILD.bazel index e5baf596..29ec348c 100644 --- a/target/ast10x0/board/BUILD.bazel +++ b/target/ast10x0/board/BUILD.bazel @@ -8,7 +8,7 @@ rust_library( name = "ast10x0_board", srcs = [ "src/lib.rs", - "src/monitor.rs", + "src/spi_monitor.rs", "src/spim_wiring.rs", ], crate_name = "ast10x0_board", @@ -18,5 +18,6 @@ rust_library( deps = [ "//target/ast10x0/backend/i2c:i2c_backend_ast10x0", "//target/ast10x0/peripherals", + "@ast1060_pac", ], ) diff --git a/target/ast10x0/board/src/lib.rs b/target/ast10x0/board/src/lib.rs index e12c05d7..dd7445df 100644 --- a/target/ast10x0/board/src/lib.rs +++ b/target/ast10x0/board/src/lib.rs @@ -11,14 +11,20 @@ clippy::unimplemented )] +use ast10x0_peripherals::hace::HaceDevice; use ast10x0_peripherals::scu::{ClockRegisterHalf, ScuRegisterHalf}; use ast10x0_peripherals::scu::{PinctrlPin, ScuRegisters}; -pub mod monitor; +pub mod spi_monitor; pub mod spim_wiring; -pub use monitor::Ast1060Monitor; -pub use spim_wiring::{apply_spim_wiring, presets, SpimWiring, SpimWiringError}; +pub use spi_monitor::Ast1060SpiMonitor; +pub use spim_wiring::{ + apply_spim_external_mux, apply_spim_pinctrl, apply_spim_wiring, apply_spim_wiring_with_log, + bmc_spim_csin_levels, bmc_spim_path_debug, enable_flash_power, presets, + release_spi_flash_resets, set_bmc_resets, spim_external_mux_state, BmcSpimPathDebug, + SpimWiring, SpimWiringError, +}; pub use ast10x0_peripherals::i2c::{I2cConfig, I2cError}; @@ -56,6 +62,21 @@ impl Ast10x0Board { Self { descriptor } } + /// Create a [`HaceDevice`] bound to the singleton HACE instance. + /// + /// This is the primary factory for HACE access on AST10x0. The board + /// crate is the single point that wires the SCU cache-flush hook into + /// the HACE driver, keeping `ast10x0_peripherals::hace` free of any + /// direct SCU dependency at the operation level. + /// + /// # Safety + /// - Must not be called concurrently with any other HACE access. + /// - Only one [`HaceDevice`] should be live at a time. + pub unsafe fn hace_device(&self, yield_fn: Y) -> HaceDevice { + // SAFETY: caller upholds the single-instance contract. + unsafe { HaceDevice::new_global(yield_fn) } + } + /// Initialize board: apply pinctrl groups and initialize I2C subsystem. /// /// This performs the complete platform-level initialization: @@ -115,7 +136,7 @@ impl Ast10x0Board { /// This is a placeholder; production code should use a proper timer or delay provider. /// Spins for approximately `micros` microseconds. #[inline] -fn delay_us(micros: u32) { +pub fn delay_us(micros: u32) { // Very rough approximation: ~16 cycles per microsecond on Cortex-M4 @ ~50MHz // This is calibration-free but inaccurate; improve for production. for _ in 0..(micros * 16) { diff --git a/target/ast10x0/board/src/monitor.rs b/target/ast10x0/board/src/spi_monitor.rs similarity index 78% rename from target/ast10x0/board/src/monitor.rs rename to target/ast10x0/board/src/spi_monitor.rs index ae48623b..e5821143 100644 --- a/target/ast10x0/board/src/monitor.rs +++ b/target/ast10x0/board/src/spi_monitor.rs @@ -3,7 +3,7 @@ //! Board-level SPI Monitor orchestration. //! -//! `Ast1060Monitor` is the concrete implementation of the `Monitor` trait, orchestrating +//! `Ast1060SpiMonitor` is the concrete implementation of the `Monitor` trait, orchestrating //! both SCU (for external mux control) and SPIPF (for enforcement, filtering, and locks). //! //! This layer ensures no duplication: mux control delegates to SCU routing, and SPIPF @@ -12,10 +12,10 @@ use ast10x0_peripherals::scu::registers::ScuRegisters; use ast10x0_peripherals::scu::types::{ScuExtMuxSelect, SpiMonitorInstance}; use ast10x0_peripherals::spimonitor::registers::SpiMonitorRegisters; -use ast10x0_peripherals::spimonitor::traits::Monitor; +use ast10x0_peripherals::spimonitor::traits::SpiMonitorControl; use ast10x0_peripherals::spimonitor::types::{ - BootError, BootResult, MonitorInstance, MonitorStatus, MuxSelect, PrivilegeDirection, - PrivilegeOp, + BootError, BootResult, MuxSelect, PrivilegeDirection, PrivilegeOp, SpiMonitorId, + SpiMonitorStatus, }; /// Board-level Monitor orchestrator. @@ -29,11 +29,11 @@ use ast10x0_peripherals::spimonitor::types::{ /// ```ignore /// let mut board = Ast1060Board::init(); /// let mut monitor = board.monitor(); -/// monitor.set_mux(MonitorInstance::Spim0, MuxSelect::RotControl)?; +/// monitor.set_mux(SpiMonitorId::Spim0, MuxSelect::RotControl)?; /// monitor.set_address_privilege(/*...*/)?; -/// monitor.lock_policy(MonitorInstance::Spim0)?; +/// monitor.lock_policy(SpiMonitorId::Spim0)?; /// ``` -pub struct Ast1060Monitor<'a> { +pub struct Ast1060SpiMonitor<'a> { scu: &'a mut ScuRegisters, spipf: &'a mut [SpiMonitorRegisters; 4], read_blocked_region_count: u8, @@ -41,7 +41,7 @@ pub struct Ast1060Monitor<'a> { write_blocked_region_count: u8, } -impl<'a> Ast1060Monitor<'a> { +impl<'a> Ast1060SpiMonitor<'a> { /// Create a new board-level Monitor with access to both SCU and SPIPF. pub fn new( scu: &'a mut ScuRegisters, @@ -59,33 +59,33 @@ impl<'a> Ast1060Monitor<'a> { /// Get the register accessor for the specified monitor instance. #[inline] - fn regs(&self, instance: MonitorInstance) -> &SpiMonitorRegisters { + fn regs(&self, instance: SpiMonitorId) -> &SpiMonitorRegisters { match instance { - MonitorInstance::Spim0 => &self.spipf[0], - MonitorInstance::Spim1 => &self.spipf[1], - MonitorInstance::Spim2 => &self.spipf[2], - MonitorInstance::Spim3 => &self.spipf[3], + SpiMonitorId::Spim0 => &self.spipf[0], + SpiMonitorId::Spim1 => &self.spipf[1], + SpiMonitorId::Spim2 => &self.spipf[2], + SpiMonitorId::Spim3 => &self.spipf[3], } } /// Get mutable reference to register accessor (for write operations). #[inline] - fn regs_mut(&mut self, instance: MonitorInstance) -> &mut SpiMonitorRegisters { + fn regs_mut(&mut self, instance: SpiMonitorId) -> &mut SpiMonitorRegisters { match instance { - MonitorInstance::Spim0 => &mut self.spipf[0], - MonitorInstance::Spim1 => &mut self.spipf[1], - MonitorInstance::Spim2 => &mut self.spipf[2], - MonitorInstance::Spim3 => &mut self.spipf[3], + SpiMonitorId::Spim0 => &mut self.spipf[0], + SpiMonitorId::Spim1 => &mut self.spipf[1], + SpiMonitorId::Spim2 => &mut self.spipf[2], + SpiMonitorId::Spim3 => &mut self.spipf[3], } } - /// Map MonitorInstance to SCU SpiMonitorInstance for routing operations. - fn instance_to_scu(instance: MonitorInstance) -> SpiMonitorInstance { + /// Map SpiMonitorId to SCU SpiMonitorInstance for routing operations. + fn instance_to_scu(instance: SpiMonitorId) -> SpiMonitorInstance { match instance { - MonitorInstance::Spim0 => SpiMonitorInstance::Spim0, - MonitorInstance::Spim1 => SpiMonitorInstance::Spim1, - MonitorInstance::Spim2 => SpiMonitorInstance::Spim2, - MonitorInstance::Spim3 => SpiMonitorInstance::Spim3, + SpiMonitorId::Spim0 => SpiMonitorInstance::Spim0, + SpiMonitorId::Spim1 => SpiMonitorInstance::Spim1, + SpiMonitorId::Spim2 => SpiMonitorInstance::Spim2, + SpiMonitorId::Spim3 => SpiMonitorInstance::Spim3, } } @@ -125,8 +125,8 @@ impl<'a> Ast1060Monitor<'a> { } } -impl<'a> Monitor for Ast1060Monitor<'a> { - fn set_mux(&mut self, instance: MonitorInstance, mux: MuxSelect) -> BootResult<()> { +impl<'a> SpiMonitorControl for Ast1060SpiMonitor<'a> { + fn set_mux(&mut self, instance: SpiMonitorId, mux: MuxSelect) -> BootResult<()> { // External mux selection is controlled via SCU0F0 register. // Delegate to SCU routing layer which has the actual register access. let scu_instance = Self::instance_to_scu(instance); @@ -135,14 +135,14 @@ impl<'a> Monitor for Ast1060Monitor<'a> { Ok(()) } - fn read_mux(&self, instance: MonitorInstance) -> BootResult { + fn read_mux(&self, instance: SpiMonitorId) -> BootResult { // Read from SCU0F0 register via SCU routing layer. let scu_instance = Self::instance_to_scu(instance); let scu_mux = self.scu.get_spim_ext_mux(scu_instance); Ok(Self::scu_to_mux(scu_mux)) } - fn soft_reset(&mut self, instance: MonitorInstance) -> BootResult<()> { + fn soft_reset(&mut self, instance: SpiMonitorId) -> BootResult<()> { let regs = self.regs_mut(instance); // Soft reset clears status/logs but preserves policy. // NON-BLOCKING TODO 1: Verify soft reset bit position from AST10x0 datasheet. @@ -157,7 +157,7 @@ impl<'a> Monitor for Ast1060Monitor<'a> { Ok(()) } - fn hardware_reset(&mut self, instance: MonitorInstance) -> BootResult<()> { + fn hardware_reset(&mut self, instance: SpiMonitorId) -> BootResult<()> { let regs = self.regs_mut(instance); // Full hardware reset of all state (SPIPF and related SCU registers). // NON-BLOCKING TODO 1: Verify hardware reset bit and sequence from AST10x0 datasheet. @@ -173,7 +173,7 @@ impl<'a> Monitor for Ast1060Monitor<'a> { fn set_address_privilege( &mut self, - instance: MonitorInstance, + instance: SpiMonitorId, start_addr: u32, end_addr: u32, _direction: PrivilegeDirection, @@ -200,14 +200,14 @@ impl<'a> Monitor for Ast1060Monitor<'a> { Ok(()) } - fn read_region_count(&self, _instance: MonitorInstance) -> BootResult { + fn read_region_count(&self, _instance: SpiMonitorId) -> BootResult { // Region count is tracked in memory (following aspeed-rust pattern). // aspeed-rust stores read_blocked_region_num and write_blocked_region_num as struct fields. // We return the read-blocked region count for now; write-blocked can be exposed via separate method if needed. Ok(self.read_blocked_region_count as u32) } - fn read_status(&self, instance: MonitorInstance) -> BootResult { + fn read_status(&self, instance: SpiMonitorId) -> BootResult { let regs = self.regs(instance); let ctrl = regs.read_ctrl(); let lock_status = regs.read_lock_status(); @@ -217,7 +217,7 @@ impl<'a> Monitor for Ast1060Monitor<'a> { let scu_mux = self.scu.get_spim_ext_mux(scu_instance); let mux = Self::scu_to_mux(scu_mux); - Ok(MonitorStatus { + Ok(SpiMonitorStatus { mux, policy_locked: Self::is_policy_locked(lock_status), enforcement_active: Self::is_enforcement_active(ctrl), @@ -232,7 +232,7 @@ impl<'a> Monitor for Ast1060Monitor<'a> { true } - fn lock_policy(&mut self, instance: MonitorInstance) -> BootResult<()> { + fn lock_policy(&mut self, instance: SpiMonitorId) -> BootResult<()> { if !self.supports_policy_lock() { return Err(BootError::LockedOutFromMonitor); } @@ -246,7 +246,7 @@ impl<'a> Monitor for Ast1060Monitor<'a> { Ok(()) } - fn verify_policy_locked(&self, instance: MonitorInstance) -> BootResult<()> { + fn verify_policy_locked(&self, instance: SpiMonitorId) -> BootResult<()> { if !self.supports_policy_lock() { return Ok(()); } @@ -267,13 +267,13 @@ mod tests { #[test] fn test_enforcement_flag() { - assert!(!Ast1060Monitor::is_enforcement_active(0)); - assert!(Ast1060Monitor::is_enforcement_active(1 << 4)); + assert!(!Ast1060SpiMonitor::is_enforcement_active(0)); + assert!(Ast1060SpiMonitor::is_enforcement_active(1 << 4)); } #[test] fn test_lock_flag() { - assert!(!Ast1060Monitor::is_policy_locked(0)); - assert!(Ast1060Monitor::is_policy_locked(1)); + assert!(!Ast1060SpiMonitor::is_policy_locked(0)); + assert!(Ast1060SpiMonitor::is_policy_locked(1)); } } diff --git a/target/ast10x0/board/src/spim_wiring.rs b/target/ast10x0/board/src/spim_wiring.rs index d33289db..051c8609 100644 --- a/target/ast10x0/board/src/spim_wiring.rs +++ b/target/ast10x0/board/src/spim_wiring.rs @@ -4,32 +4,36 @@ //! Static SPI-monitor wiring for AST10x0 boards. //! //! Composes the `scu::routing` mux helpers with the `spimonitor::controller` -//! typestate to apply once-per-process SPIM routing and SPIPF policy at -//! backend init time. Per-transaction reroutes are explicitly out of scope: +//! typestate to apply once-per-process external-monitor routing and SPIPF +//! policy at backend init time. Per-transaction reroutes are explicitly out of scope: //! the SPIPF lock is one-way, and the design doc //! (`peripherals/spimonitor/planning/overview-and-usage-model.md`) calls for //! "configure early, validate, lock, and operate under that locked policy." +use ast1060_pac as device; use ast10x0_peripherals::scu::{ + pinctrl::{ + PINCTRL_GPIOL2, PINCTRL_GPIOL3, PINCTRL_SPIM1_DEFAULT, PINCTRL_SPIM2_DEFAULT, + PINCTRL_SPIM3_DEFAULT, PINCTRL_SPIM4_DEFAULT, + }, ScuError, ScuExtMuxSelect, ScuRegisters, SpiMonitorInstance, SpiMonitorPassthrough, SpiMonitorSource, }; use ast10x0_peripherals::smc::SmcController; use ast10x0_peripherals::spimonitor::{ - LockedSpiMonitor, MonitorPolicy, SpiMonitor, SpiMonitorController, SpiMonitorError, - Uninitialized, + LockedSpiMonitor, PassthroughMode, SpiMonitor, SpiMonitorController, SpiMonitorError, + SpiMonitorPolicy, Uninitialized, }; -/// Static SPIM wiring for one SPI controller. +/// Static wiring for one external SPI monitor path. /// -/// Captures the four SCU0F0 fields plus the MISO multi-function pin choice -/// that together determine which monitor instance a given SPI master is -/// routed through. +/// The `source` identifies the external flash bus associated with this policy. +/// It does not enable the AST1060 internal SPI-master detour. #[derive(Clone, Copy, Debug, Eq, PartialEq)] pub struct SpimWiring { - /// Monitor instance the master is routed through. + /// Monitor instance connected to the external bus. pub instance: SpiMonitorInstance, - /// Which SPI master is being routed. + /// External SPI bus associated with the monitor policy. pub source: SpiMonitorSource, /// Passthrough enable for the chosen instance. pub passthrough: SpiMonitorPassthrough, @@ -92,11 +96,266 @@ impl From for SpimWiringError { } } +/// Apply the default SCU pinctrl group for a SPI monitor instance. +/// +/// The instance numbering follows the hardware SPIPF blocks: `Spim0` uses +/// the device-tree `spim1` pins, through `Spim3` using the `spim4` pins. +pub fn apply_spim_pinctrl(scu: &ScuRegisters, instance: SpiMonitorInstance) { + let group = match instance { + SpiMonitorInstance::Spim0 => PINCTRL_SPIM1_DEFAULT, + SpiMonitorInstance::Spim1 => PINCTRL_SPIM2_DEFAULT, + SpiMonitorInstance::Spim2 => PINCTRL_SPIM3_DEFAULT, + SpiMonitorInstance::Spim3 => PINCTRL_SPIM4_DEFAULT, + }; + scu.apply_pinctrl_group(group); +} + +/// Configure the external flash mux controls described by the board schematic. +/// +/// SPIM1/2 use GPIO A-D pin 12 plus SGPIOM output 0. +/// SPIM3/4 use GPIO E-H pin 8 plus SGPIOM output 2. +pub fn apply_spim_external_mux(instance: SpiMonitorInstance, mux: ScuExtMuxSelect) { + let high = matches!(mux, ScuExtMuxSelect::Mux1); + let (gpio_group, gpio_mask, sgpio_select) = match instance { + SpiMonitorInstance::Spim0 | SpiMonitorInstance::Spim1 => { + (ExternalMuxGpioGroup::Abcd, 1 << 12, 1 << 0) + } + SpiMonitorInstance::Spim2 | SpiMonitorInstance::Spim3 => { + (ExternalMuxGpioGroup::Efgh, 1 << 8, 1 << 2) + } + }; + + let gpio = unsafe { &*device::Gpio::ptr() }; + let scu = unsafe { &*device::Scu::ptr() }; + scu.scu41c().modify(|_, w| { + w.enbl_sgpiomaster_ckfn_pin() + .set_bit() + .enbl_sgpiomaster_ldfn_pin() + .set_bit() + .enbl_sgpiomaster_dofn_pin() + .set_bit() + .enbl_sgpiomaster_difn_pin() + .set_bit() + }); + match gpio_group { + ExternalMuxGpioGroup::Abcd => { + gpio.gpio000() + .modify(|r, w| unsafe { w.bits(update_bit(r.bits(), gpio_mask, high)) }); + gpio.gpio004() + .modify(|r, w| unsafe { w.bits(r.bits() | gpio_mask) }); + } + ExternalMuxGpioGroup::Efgh => { + gpio.gpio020() + .modify(|r, w| unsafe { w.bits(update_bit(r.bits(), gpio_mask, high)) }); + gpio.gpio024() + .modify(|r, w| unsafe { w.bits(r.bits() | gpio_mask) }); + } + } + + let sgpio = unsafe { &*device::Sgpiom::ptr() }; + sgpio.gpio554().modify(|_, w| unsafe { + w.enbl_of_serial_gpio() + .set_bit() + .numbers_of_serial_gpiopins() + .bits(16) + .serial_gpioclk_division() + .bits(24) + }); + let latch = sgpio.gpio570().read().bits(); + sgpio + .gpio500() + .write(|w| unsafe { w.bits(update_bit(latch, sgpio_select, high)) }); + + crate::delay_us(1_000); +} + +/// Read back the board-level external mux selection. +#[must_use] +pub fn spim_external_mux_state(instance: SpiMonitorInstance) -> Option { + let (gpio_group, gpio_mask, sgpio_select) = match instance { + SpiMonitorInstance::Spim0 | SpiMonitorInstance::Spim1 => { + (ExternalMuxGpioGroup::Abcd, 1 << 12, 1 << 0) + } + SpiMonitorInstance::Spim2 | SpiMonitorInstance::Spim3 => { + (ExternalMuxGpioGroup::Efgh, 1 << 8, 1 << 2) + } + }; + let gpio = unsafe { &*device::Gpio::ptr() }; + let gpio_high = match gpio_group { + ExternalMuxGpioGroup::Abcd => gpio.gpio000().read().bits() & gpio_mask != 0, + ExternalMuxGpioGroup::Efgh => gpio.gpio020().read().bits() & gpio_mask != 0, + }; + let sgpio = unsafe { &*device::Sgpiom::ptr() }; + let latch = sgpio.gpio570().read().bits(); + let sgpio_high = latch & sgpio_select != 0; + if gpio_high != sgpio_high { + None + } else if gpio_high { + Some(ScuExtMuxSelect::Mux1) + } else { + Some(ScuExtMuxSelect::Mux0) + } +} + +/// Release the active-low CPU and BMC SPI flash reset outputs. +/// +/// This mirrors `ast1060_prot_gpio_post_init()` in the Zephyr board support. +#[must_use] +pub fn release_spi_flash_resets() -> bool { + const CPU_SPI_RESET_N: u32 = 1 << 6; + const BMC_SPI_RESET_N: u32 = 1 << 7; + const RESET_MASK: u32 = CPU_SPI_RESET_N | BMC_SPI_RESET_N; + + let sgpio = unsafe { &*device::Sgpiom::ptr() }; + let latch = sgpio.gpio570().read().bits(); + sgpio + .gpio500() + .write(|w| unsafe { w.bits(latch | RESET_MASK) }); + crate::delay_us(1_000); + + sgpio.gpio570().read().bits() & RESET_MASK == RESET_MASK +} + +/// Raw board routing state for the external BMC SPI1/2 paths. +#[derive(Clone, Copy, Debug, Eq, PartialEq)] +pub struct BmcSpimPathDebug { + pub scu410: u32, + pub scu4b0: u32, + pub scu690: u32, + pub scu610: u32, + pub gpio_data: u32, + pub gpio_direction: u32, + pub sgpio_latch: u32, + pub sgpio_config: u32, +} + +/// Capture the pinmux and external-mux state used by BMC SPI1/2. +#[must_use] +pub fn bmc_spim_path_debug() -> BmcSpimPathDebug { + let scu = unsafe { &*device::Scu::ptr() }; + let gpio = unsafe { &*device::Gpio::ptr() }; + let sgpio = unsafe { &*device::Sgpiom::ptr() }; + + BmcSpimPathDebug { + scu410: scu.scu410().read().bits(), + scu4b0: scu.scu4b0().read().bits(), + scu690: scu.scu690().read().bits(), + scu610: scu.scu610().read().bits(), + gpio_data: gpio.gpio000().read().bits(), + gpio_direction: gpio.gpio004().read().bits(), + sgpio_latch: sgpio.gpio570().read().bits(), + sgpio_config: sgpio.gpio554().read().bits(), + } +} + +/// Sample the active-low BMC SPI chip-select inputs. +/// +/// SPIM1 CSIN is GPIOA0 and SPIM2 CSIN is GPIOB6. The GPIO data-read +/// value register reflects the physical input levels while the pins are +/// assigned to their SPIM alternate functions. GPIO0C0 is the output-latch +/// readback and must not be used for these input signals. +#[must_use] +pub fn bmc_spim_csin_levels() -> u32 { + const SPIM1_CSIN: u32 = 1 << 0; + const SPIM2_CSIN: u32 = 1 << 14; + + let gpio = unsafe { &*device::Gpio::ptr() }; + gpio.gpio000().read().bits() & (SPIM1_CSIN | SPIM2_CSIN) +} + +/// Enable the flash-power outputs required by older AST1060 demo boards. +#[must_use] +pub fn enable_flash_power(scu: &ScuRegisters) -> bool { + scu.apply_pinctrl_group(PINCTRL_GPIOL2); + scu.apply_pinctrl_group(PINCTRL_GPIOL3); + + const FLASH_POWER_MASK: u32 = (1 << 26) | (1 << 27); + let gpio = unsafe { &*device::Gpio::ptr() }; + gpio.gpio070() + .modify(|r, w| unsafe { w.bits(r.bits() | FLASH_POWER_MASK) }); + gpio.gpio074() + .modify(|r, w| unsafe { w.bits(r.bits() | FLASH_POWER_MASK) }); + crate::delay_us(1_000); + + gpio.gpio0c8().read().bits() & FLASH_POWER_MASK == FLASH_POWER_MASK +} + +/// Assert or release the active-low BMC reset outputs. +/// +/// The prot board routes BMC_SRST to SGPIOM output 8 and BMC_EXTRST to +/// SGPIOM output 9. On assertion EXTRST is driven low first; on release SRST +/// is driven high first. +#[must_use] +pub fn set_bmc_resets(asserted: bool) -> bool { + const BMC_SRST_MASK: u32 = 1 << 8; + const BMC_EXTRST_MASK: u32 = 1 << 9; + + let scu = unsafe { &*device::Scu::ptr() }; + scu.scu41c().modify(|_, w| { + w.enbl_sgpiomaster_ckfn_pin() + .set_bit() + .enbl_sgpiomaster_ldfn_pin() + .set_bit() + .enbl_sgpiomaster_dofn_pin() + .set_bit() + .enbl_sgpiomaster_difn_pin() + .set_bit() + }); + + let sgpio = unsafe { &*device::Sgpiom::ptr() }; + sgpio.gpio554().modify(|_, w| unsafe { + w.enbl_of_serial_gpio() + .set_bit() + .numbers_of_serial_gpiopins() + .bits(16) + .serial_gpioclk_division() + .bits(24) + }); + + let output_high = !asserted; + let first_mask = if asserted { + BMC_EXTRST_MASK + } else { + BMC_SRST_MASK + }; + let second_mask = if asserted { + BMC_SRST_MASK + } else { + BMC_EXTRST_MASK + }; + + for mask in [first_mask, second_mask] { + let latch = sgpio.gpio570().read().bits(); + sgpio + .gpio500() + .write(|w| unsafe { w.bits(update_bit(latch, mask, output_high)) }); + crate::delay_us(10_000); + } + + let latch = sgpio.gpio570().read().bits(); + let reset_mask = BMC_SRST_MASK | BMC_EXTRST_MASK; + (latch & reset_mask == reset_mask) == output_high +} + +#[derive(Clone, Copy)] +enum ExternalMuxGpioGroup { + Abcd, + Efgh, +} + +const fn update_bit(value: u32, mask: u32, set: bool) -> u32 { + if set { + value | mask + } else { + value & !mask + } +} + /// Apply static SPIM wiring at controller-init time. /// -/// Order: validate → SCU route → passthrough → ext-mux → MISO multi-func → -/// SPIPF policy → SPIPF lock. The lock is one-way; an empty -/// `MonitorPolicy::empty()` combined with lock will brick the SPI bus until +/// Order: validate → pinctrl → SCU route → passthrough → ext-mux → +/// MISO multi-func → SPIPF policy → SPIPF lock. The lock is one-way; an empty +/// `SpiMonitorPolicy::empty()` combined with lock will brick the SPI bus until /// reset, so callers should pass a vetted preset (see [`presets`]). /// /// # Safety @@ -106,15 +365,37 @@ pub unsafe fn apply_spim_wiring( scu: &ScuRegisters, controller_id: SmcController, wiring: SpimWiring, - policy: &MonitorPolicy, + policy: &SpiMonitorPolicy, +) -> Result { + unsafe { apply_spim_wiring_with_log(scu, controller_id, wiring, policy, None) } +} + +/// Apply static SPIM wiring and optionally configure violation-log DMA before +/// the policy registers are locked. +/// +/// # Safety +/// The caller must satisfy [`apply_spim_wiring`] ownership requirements. A +/// supplied log buffer must remain exclusively owned by the monitor forever. +pub unsafe fn apply_spim_wiring_with_log( + scu: &ScuRegisters, + controller_id: SmcController, + wiring: SpimWiring, + policy: &SpiMonitorPolicy, + log_buffer: Option<&'static mut [u32]>, ) -> Result { validate_controller_for_source(controller_id, wiring.source)?; scu.validate_spim_instance(wiring.instance)?; - scu.set_spim_internal_master_route(wiring.instance, wiring.source); + apply_spim_pinctrl(scu, wiring.instance); + scu.disable_spim_cs_internal_pull_down(wiring.instance); + // SPIPF monitors the external BMC/host pins. Keep SCU0F0[3:0] clear so + // neither AST1060 internal SPI controller is detoured into the monitor. + scu.set_spim_internal_mux(wiring.source, 0)?; scu.set_spim_passthrough(wiring.instance, wiring.passthrough); scu.set_spim_ext_mux(wiring.instance, wiring.ext_mux); + apply_spim_external_mux(wiring.instance, wiring.ext_mux); scu.set_spim_miso_multi_func(wiring.instance, wiring.miso_multi_func); + scu.set_spim_filter(wiring.instance, true); let monitor_controller = match wiring.instance { SpiMonitorInstance::Spim0 => SpiMonitorController::Spim0, @@ -127,6 +408,12 @@ pub unsafe fn apply_spim_wiring( // instance, mirroring the SCU exclusivity required above. let monitor = unsafe { SpiMonitor::::new(monitor_controller) }; let configured = monitor.apply_policy(policy)?; + if let Some(buffer) = log_buffer { + configured.configure_log(buffer)?; + } + configured.set_push_pull(true); + configured.set_passthrough(PassthroughMode::Disabled); + configured.enable(); let locked = configured.lock()?; Ok(locked) } @@ -144,9 +431,11 @@ fn validate_controller_for_source( } } -/// Built-in `MonitorPolicy` presets vetted against the BMC's flash opcode set. +/// Built-in `SpiMonitorPolicy` presets vetted against the BMC's flash opcode set. pub mod presets { - use ast10x0_peripherals::spimonitor::MonitorPolicy; + use ast10x0_peripherals::spimonitor::{ + profile, PrivilegeDirection, PrivilegeOp, SpiMonitorPolicy, + }; /// Allow-list for the BMC's normal flash opcodes covering both 3-byte and /// 4-byte addressing variants. Empty `regions` (no address-privilege @@ -159,8 +448,8 @@ pub mod presets { /// `RDSR` (`0x05`), `WREN` (`0x06`), `WRDI` (`0x04`), /// `RDID` (`0x9F`), `RSTEN` (`0x66`), `RST` (`0x99`). #[must_use] - pub const fn bmc_default_policy() -> MonitorPolicy { - let mut p = MonitorPolicy::empty(); + pub const fn bmc_default_policy() -> SpiMonitorPolicy { + let mut p = SpiMonitorPolicy::empty(); p.allow_commands[0] = 0x03; // READ p.allow_commands[1] = 0x0B; // FAST_READ p.allow_commands[2] = 0x0C; // FAST_READ_4B @@ -177,4 +466,18 @@ pub mod presets { p.allow_command_count = 13; p } + + /// Policy matching the supplied Zephyr SPIM nodes: full command list and + /// write protection over flash addresses `0x0000_0000..0x0800_0000`. + #[must_use] + pub fn zephyr_spim_policy() -> SpiMonitorPolicy { + let mut policy = profile::zephyr_default(); + let _ = policy.add_region( + 0, + 0x0010_0000, + PrivilegeDirection::Write, + PrivilegeOp::Disable, + ); + policy + } } diff --git a/target/ast10x0/config.rs b/target/ast10x0/config.rs index d3ac1656..dd5a2a3b 100644 --- a/target/ast10x0/config.rs +++ b/target/ast10x0/config.rs @@ -24,6 +24,17 @@ impl CortexMKernelConfigInterface for KernelConfig { impl KernelConfigInterface for KernelConfig { const SYSTEM_CLOCK_HZ: u64 = KernelConfig::SYS_TICK_HZ as u64; + + // The pigweed default kernel stack is 2 KiB, which is too small for the + // bootstrap thread that runs the peripheral KAT suites. The HACE SHA-2/HMAC + // test in particular builds a single large stack frame (~3.6 KiB) plus a + // ~1.3 KiB `HaceHmacCtx` (1 KiB message buffer) and nested device locals, + // overflowing a 2 KiB stack into adjacent `.bss` (`INPUT_BUF`) and faulting + // with an unaligned access on the first case that writes that buffer + // (`sha256 stream-9000`). 16 KiB gives comfortable headroom for these + // crypto workloads. The AST10x0 has 768 KiB SRAM, so the extra kernel-stack + // RAM is negligible. + const KERNEL_STACK_SIZE_BYTES: usize = 16384; } pub struct NvicConfig; diff --git a/target/ast10x0/harness/test_runner.py b/target/ast10x0/harness/test_runner.py index ec36b641..cba88d74 100644 --- a/target/ast10x0/harness/test_runner.py +++ b/target/ast10x0/harness/test_runner.py @@ -420,9 +420,9 @@ def main() -> int: slave_symlink = image.parent / (image.name + ".slave.elf") if slave_symlink.exists(): slave_elf_path = slave_symlink.resolve() - args.slave_firmware = str(image.parent / (image.name + ".slave.bin")) - args.firmware = str(image.parent / (image.name + ".bin")) + args.slave_firmware = str(slave_elf_path.with_suffix(".bin")) image = image.resolve() + args.firmware = str(image.with_suffix(".bin")) else: args.firmware = str(image.with_suffix(".bin")) diff --git a/target/ast10x0/peripherals/BUILD.bazel b/target/ast10x0/peripherals/BUILD.bazel index e7318f26..5e10fb2f 100644 --- a/target/ast10x0/peripherals/BUILD.bazel +++ b/target/ast10x0/peripherals/BUILD.bazel @@ -1,7 +1,7 @@ # Licensed under the Apache-2.0 license # SPDX-License-Identifier: Apache-2.0 -load("@rules_rust//rust:defs.bzl", "rust_library") +load("@rules_rust//rust:defs.bzl", "rust_library", "rust_test") load("//target/ast10x0:defs.bzl", "TARGET_COMPATIBLE_WITH") package(default_visibility = ["//visibility:public"]) @@ -9,6 +9,19 @@ package(default_visibility = ["//visibility:public"]) rust_library( name = "peripherals", srcs = [ + "gpio/mod.rs", + "gpio/registers.rs", + "gpio/types.rs", + "hace/aes.rs", + "hace/constants.rs", + "hace/context.rs", + "hace/device.rs", + "hace/digest.rs", + "hace/error.rs", + "hace/helpers.rs", + "hace/hmac.rs", + "hace/mod.rs", + "hace/registers.rs", "i2c/constants.rs", "i2c/controller.rs", "i2c/error.rs", @@ -24,7 +37,18 @@ rust_library( "i2c/timing.rs", "i2c/transfer.rs", "i2c/types.rs", + "i3c/ccc.rs", + "i3c/config.rs", + "i3c/constants.rs", + "i3c/controller.rs", + "i3c/error.rs", + "i3c/hardware.rs", + "i3c/ibi.rs", + "i3c/mod.rs", + "i3c/registers.rs", + "i3c/types.rs", "lib.rs", + "scu/cache.rs", "scu/clock.rs", "scu/mod.rs", "scu/pinctrl.rs", @@ -51,6 +75,7 @@ rust_library( "smc/spi/spi.rs", "smc/spi/spi_transaction.rs", "smc/types.rs", + "spimonitor/commands.rs", "spimonitor/controller.rs", "spimonitor/mod.rs", "spimonitor/policy.rs", @@ -72,10 +97,26 @@ rust_library( "@ast1060_pac", "@pigweed//pw_log/rust:pw_log", "@rust_crates//:bitflags", + "@rust_crates//:cortex-m", + "@rust_crates//:critical-section", "@rust_crates//:embedded-hal", "@rust_crates//:embedded-hal-nb", "@rust_crates//:embedded-io", "@rust_crates//:embedded-storage", + "@rust_crates//:heapless", "@rust_crates//:nb", + "@rust_crates//:zerocopy", + ], +) + +rust_test( + name = "spimonitor_commands_test", + srcs = ["spimonitor/commands.rs"], + crate_name = "spimonitor_commands_test", + edition = "2024", + tags = ["do_not_build"], + target_compatible_with = [ + "@platforms//cpu:x86_64", + "@platforms//os:linux", ], ) diff --git a/target/ast10x0/peripherals/gpio/mod.rs b/target/ast10x0/peripherals/gpio/mod.rs new file mode 100644 index 00000000..f569880c --- /dev/null +++ b/target/ast10x0/peripherals/gpio/mod.rs @@ -0,0 +1,720 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! AST10x0 GPIO peripheral driver. +//! +//! Each GPIO bank (A–U) is exposed as a sub-module (`gpioa`, `gpiob`, …). +//! Obtain a bank via `GPIOX::new_global()` (unsafe), then call `split()` to +//! get the individual typed pins. + +mod registers; +mod types; + +pub use registers::GpioRegisters; +pub use types::{ + ActiveHigh, ActiveLow, Floating, GpioError, GpioExt, Input, InputMode, InterruptMode, + OpenDrain, OpenDrainMode, Output, OutputMode, PullDown, PullUp, PushPull, Tristate, +}; + +macro_rules! gpio_macro { + ($GPIOX:ident, $gpiox:ident, $x:literal, $pos:literal, $data_val_reg:ident, + $dir_reg:ident, $int_en_reg:ident, $int_sen_t0:ident, + $int_sen_t1:ident, $int_sen_t2:ident, $int_sts_reg:ident, + $rst_tolerant_reg:ident, $deb1_reg:ident, $deb2_reg:ident, + $cmd_src0_reg:ident, $cmd_src1_reg:ident, $data_read_reg:ident, + $intput_mask_reg:ident, [ + $($PXi:ident: ($pxi:ident, $i:literal, $MODE:ty),)+ + ]) => { + + pub mod $gpiox { + use super::*; + use ast1060_pac as device; + use core::marker::PhantomData; + use embedded_hal::digital::{InputPin, OutputPin, StatefulOutputPin}; + + pub struct $GPIOX { + _regs: GpioRegisters, + } + + impl $GPIOX { + /// Create a GPIO bank instance from a [`GpioRegisters`] handle. + /// + /// # Safety + /// + /// Caller must ensure exclusive access to the GPIO register block is + /// coordinated for the lifetime of this value. + pub const unsafe fn new(regs: GpioRegisters) -> Self { + Self { _regs: regs } + } + + /// Create a GPIO bank instance using the global GPIO register block. + /// + /// # Safety + /// + /// Caller must ensure exclusive access to the singleton GPIO peripheral + /// is coordinated for the lifetime of this value. + pub unsafe fn new_global() -> Self { + Self { + _regs: unsafe { GpioRegisters::new_global() }, + } + } + + /// Initialize command-source and debounce registers for this bank. + pub fn init(&self) { + let p = self._regs.regs(); + p.$cmd_src0_reg().modify(|r, w| unsafe { + w.bits(r.bits() & !(0xff << $pos)) + }); + p.$cmd_src1_reg().modify(|r, w| unsafe { + w.bits(r.bits() & !(0xff << $pos)) + }); + p.$deb1_reg().modify(|r, w| unsafe { + w.bits(r.bits() & !(0xff << $pos)) + }); + p.$deb2_reg().modify(|r, w| unsafe { + w.bits(r.bits() & !(0xff << $pos)) + }); + } + } + + pub struct Parts { + $( + pub $pxi: $PXi<$MODE>, + )+ + } + + impl GpioExt for $GPIOX { + type Parts = Parts; + + fn split(self) -> Self::Parts { + Parts { + $( + $pxi: $PXi { + _mode: PhantomData, + }, + )+ + } + } + } + + $( + pub struct $PXi { + _mode: PhantomData, + } + + impl $PXi { + /// Configures the pin as a pulled-down input. + #[must_use] + pub fn into_pull_down_input(self) -> $PXi> { + let p = unsafe { &*device::Gpio::ptr() }; + p.$dir_reg().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + p.$data_val_reg().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + $PXi { _mode: PhantomData } + } + + /// Configures the pin as a pulled-up input. + #[must_use] + pub fn into_pull_up_input(self) -> $PXi> { + let p = unsafe { &*device::Gpio::ptr() }; + p.$dir_reg().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + p.$data_val_reg().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + $PXi { _mode: PhantomData } + } + + /// Configures the pin as an open-drain output. + #[must_use] + pub fn into_open_drain_output(self) -> $PXi>> + where + ODM: OpenDrainMode, + { + let p = unsafe { &*device::Gpio::ptr() }; + p.$data_val_reg().modify(|r, w| unsafe { + let mask = 1u32 << ($pos + $i); + w.bits(if ODM::ACTIVE_HIGH { + r.bits() | mask + } else { + r.bits() & !mask + }) + }); + // Start released in the inactive state. + p.$dir_reg().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + $PXi { _mode: PhantomData } + } + + /// Configures the pin as a push-pull output. + #[must_use] + pub fn into_push_pull_output(self) -> $PXi> { + let p = unsafe { &*device::Gpio::ptr() }; + p.$dir_reg().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + p.$data_val_reg().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + $PXi { _mode: PhantomData } + } + } + + impl StatefulOutputPin for $PXi> { + fn is_set_high(&mut self) -> Result { + let p = unsafe { &*device::Gpio::ptr() }; + Ok( + (p.$data_read_reg().read().bits() & (1u32 << ($pos + $i))) + == (1u32 << ($pos + $i)), + ) + } + + fn is_set_low(&mut self) -> Result { + self.is_set_high().map(|v| !v) + } + } + + impl OutputPin for $PXi> { + fn set_high(&mut self) -> Result<(), Self::Error> { + let p = unsafe { &*device::Gpio::ptr() }; + p.$data_val_reg().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + Ok(()) + } + + fn set_low(&mut self) -> Result<(), Self::Error> { + let p = unsafe { &*device::Gpio::ptr() }; + p.$data_val_reg().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + Ok(()) + } + } + + impl StatefulOutputPin for $PXi>> + where + ODM: OpenDrainMode, + { + fn is_set_high(&mut self) -> Result { + let p = unsafe { &*device::Gpio::ptr() }; + let is_output = + (p.$dir_reg().read().bits() & (1u32 << ($pos + $i))) != 0; + Ok(is_output == ODM::ACTIVE_HIGH) + } + + fn is_set_low(&mut self) -> Result { + self.is_set_high().map(|v| !v) + } + } + + impl OutputPin for $PXi>> + where + ODM: OpenDrainMode, + { + fn set_high(&mut self) -> Result<(), Self::Error> { + let p = unsafe { &*device::Gpio::ptr() }; + p.$dir_reg().modify(|r, w| unsafe { + let mask = 1u32 << ($pos + $i); + w.bits(if ODM::ACTIVE_HIGH { + r.bits() | mask + } else { + r.bits() & !mask + }) + }); + Ok(()) + } + + fn set_low(&mut self) -> Result<(), Self::Error> { + let p = unsafe { &*device::Gpio::ptr() }; + p.$dir_reg().modify(|r, w| unsafe { + let mask = 1u32 << ($pos + $i); + w.bits(if ODM::ACTIVE_HIGH { + r.bits() & !mask + } else { + r.bits() | mask + }) + }); + Ok(()) + } + } + + impl InputPin for $PXi> + where + MODE: InputMode, + { + fn is_high(&mut self) -> Result { + let p = unsafe { &*device::Gpio::ptr() }; + Ok( + (p.$data_val_reg().read().bits() & (1u32 << ($pos + $i))) + == (1u32 << ($pos + $i)), + ) + } + + fn is_low(&mut self) -> Result { + self.is_high().map(|v| !v) + } + } + + impl $PXi> + where + MODE: InputMode, + { + /// Enable or disable interrupts on this pin. + pub fn set_interrupt_mode(&mut self, mode: InterruptMode) { + let p = unsafe { &*device::Gpio::ptr() }; + match mode { + InterruptMode::LevelHigh => { + p.$int_sen_t0().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + p.$int_sen_t1().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + p.$int_sen_t2().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + p.$int_en_reg().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + } + InterruptMode::LevelLow => { + p.$int_sen_t0().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + p.$int_sen_t1().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + p.$int_sen_t2().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + p.$int_en_reg().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + } + InterruptMode::EdgeRising => { + p.$int_sen_t0().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + p.$int_sen_t1().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + p.$int_sen_t2().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + p.$int_en_reg().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + } + InterruptMode::EdgeFalling => { + p.$int_sen_t0().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + p.$int_sen_t1().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + p.$int_sen_t2().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + p.$int_en_reg().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + } + InterruptMode::EdgeBoth => { + p.$int_sen_t2().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + p.$int_en_reg().modify(|r, w| unsafe { + w.bits(r.bits() | (1u32 << ($pos + $i))) + }); + } + InterruptMode::Disabled => { + p.$int_en_reg().modify(|r, w| unsafe { + w.bits(r.bits() & !(1u32 << ($pos + $i))) + }); + } + } + } + + /// Returns the current interrupt-pending status for this pin. + #[must_use] + pub fn get_interrupt_status(&self) -> bool { + let p = unsafe { &*device::Gpio::ptr() }; + (p.$int_sts_reg().read().bits() & (1u32 << ($pos + $i))) + == (1u32 << ($pos + $i)) + } + + /// Clear the pending interrupt for this pin. + pub fn clear_interrupt(&self) { + let p = unsafe { &*device::Gpio::ptr() }; + p.$int_sts_reg().write(|w| unsafe { w.bits(1u32 << ($pos + $i)) }); + } + + /// Set the command-source bits for this pin. + pub fn set_cmd_src(&self, cmd_src0: u32, cmd_src1: u32) { + let p = unsafe { &*device::Gpio::ptr() }; + p.$cmd_src0_reg().modify(|r, w| unsafe { + w.bits( + (r.bits() & !(1u32 << ($pos + $i))) + | (cmd_src0 << ($pos + $i)), + ) + }); + p.$cmd_src1_reg().modify(|r, w| unsafe { + w.bits( + (r.bits() & !(1u32 << ($pos + $i))) + | (cmd_src1 << ($pos + $i)), + ) + }); + } + + /// Select the debounce timer for this pin. + pub fn select_debounce_timer(&self, deb_setting1: u32, deb_setting2: u32) { + let p = unsafe { &*device::Gpio::ptr() }; + p.$deb1_reg().modify(|r, w| unsafe { + w.bits( + (r.bits() & !(1u32 << ($pos + $i))) + | (deb_setting1 << ($pos + $i)), + ) + }); + p.$deb2_reg().modify(|r, w| unsafe { + w.bits( + (r.bits() & !(1u32 << ($pos + $i))) + | (deb_setting2 << ($pos + $i)), + ) + }); + } + } + + impl embedded_hal::digital::ErrorType for $PXi { + type Error = GpioError; + } + )+ + } + }; +} + +// GPIO ABCD — register group 0x000–0x01c +gpio_macro!( + GPIOA, gpioa, 'a', 0, gpio000, gpio004, gpio008, gpio00c, gpio010, gpio014, gpio018, + gpio01c, gpio040, gpio044, gpio060, gpio064, gpio0c0, gpio1d0, + [ + PA0: (pa0, 0, Tristate), + PA1: (pa1, 1, Tristate), + PA2: (pa2, 2, Tristate), + PA3: (pa3, 3, Tristate), + PA4: (pa4, 4, Tristate), + PA5: (pa5, 5, Tristate), + PA6: (pa6, 6, Tristate), + PA7: (pa7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOB, gpiob, 'b', 8, gpio000, gpio004, gpio008, gpio00c, gpio010, gpio014, gpio018, + gpio01c, gpio040, gpio044, gpio060, gpio064, gpio0c0, gpio1d0, + [ + PB0: (pb0, 0, Tristate), + PB1: (pb1, 1, Tristate), + PB2: (pb2, 2, Tristate), + PB3: (pb3, 3, Tristate), + PB4: (pb4, 4, Tristate), + PB5: (pb5, 5, Tristate), + PB6: (pb6, 6, Tristate), + PB7: (pb7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOC, gpioc, 'c', 16, gpio000, gpio004, gpio008, gpio00c, gpio010, gpio014, gpio018, + gpio01c, gpio040, gpio044, gpio060, gpio064, gpio0c0, gpio1d0, + [ + PC0: (pc0, 0, Tristate), + PC1: (pc1, 1, Tristate), + PC2: (pc2, 2, Tristate), + PC3: (pc3, 3, Tristate), + PC4: (pc4, 4, Tristate), + PC5: (pc5, 5, Tristate), + PC6: (pc6, 6, Tristate), + PC7: (pc7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOD, gpiod, 'd', 24, gpio000, gpio004, gpio008, gpio00c, gpio010, gpio014, gpio018, + gpio01c, gpio040, gpio044, gpio060, gpio064, gpio0c0, gpio1d0, + [ + PD0: (pd0, 0, Tristate), + PD1: (pd1, 1, Tristate), + PD2: (pd2, 2, Tristate), + PD3: (pd3, 3, Tristate), + PD4: (pd4, 4, Tristate), + PD5: (pd5, 5, Tristate), + PD6: (pd6, 6, Tristate), + PD7: (pd7, 7, Tristate), + ] +); + +// GPIO EFGH — register group 0x020–0x03c +gpio_macro!( + GPIOE, gpioe, 'e', 0, gpio020, gpio024, gpio028, gpio02c, gpio030, gpio034, gpio038, + gpio03c, gpio048, gpio04c, gpio068, gpio06c, gpio0c4, gpio1d4, + [ + PE0: (pe0, 0, Tristate), + PE1: (pe1, 1, Tristate), + PE2: (pe2, 2, Tristate), + PE3: (pe3, 3, Tristate), + PE4: (pe4, 4, Tristate), + PE5: (pe5, 5, Tristate), + PE6: (pe6, 6, Tristate), + PE7: (pe7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOF, gpiof, 'f', 8, gpio020, gpio024, gpio028, gpio02c, gpio030, gpio034, gpio038, + gpio03c, gpio048, gpio04c, gpio068, gpio06c, gpio0c4, gpio1d4, + [ + PF0: (pf0, 0, Tristate), + PF1: (pf1, 1, Tristate), + PF2: (pf2, 2, Tristate), + PF3: (pf3, 3, Tristate), + PF4: (pf4, 4, Tristate), + PF5: (pf5, 5, Tristate), + PF6: (pf6, 6, Tristate), + PF7: (pf7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOG, gpiog, 'g', 16, gpio020, gpio024, gpio028, gpio02c, gpio030, gpio034, gpio038, + gpio03c, gpio048, gpio04c, gpio068, gpio06c, gpio0c4, gpio1d4, + [ + PG0: (pg0, 0, Tristate), + PG1: (pg1, 1, Tristate), + PG2: (pg2, 2, Tristate), + PG3: (pg3, 3, Tristate), + PG4: (pg4, 4, Tristate), + PG5: (pg5, 5, Tristate), + PG6: (pg6, 6, Tristate), + PG7: (pg7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOH, gpioh, 'h', 24, gpio020, gpio024, gpio028, gpio02c, gpio030, gpio034, gpio038, + gpio03c, gpio048, gpio04c, gpio068, gpio06c, gpio0c4, gpio1d4, + [ + PH0: (ph0, 0, Tristate), + PH1: (ph1, 1, Tristate), + PH2: (ph2, 2, Tristate), + PH3: (ph3, 3, Tristate), + PH4: (ph4, 4, Tristate), + PH5: (ph5, 5, Tristate), + PH6: (ph6, 6, Tristate), + PH7: (ph7, 7, Tristate), + ] +); + +// GPIO IJKL — register group 0x070–0x0b8 +gpio_macro!( + GPIOI, gpioi, 'i', 0, gpio070, gpio074, gpio098, gpio09c, gpio0a0, gpio0a4, gpio0a8, + gpio0ac, gpio0b0, gpio0b4, gpio090, gpio094, gpio0b8, gpio0c8, + [ + PI0: (pi0, 0, Tristate), + PI1: (pi1, 1, Tristate), + PI2: (pi2, 2, Tristate), + PI3: (pi3, 3, Tristate), + PI4: (pi4, 4, Tristate), + PI5: (pi5, 5, Tristate), + PI6: (pi6, 6, Tristate), + PI7: (pi7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOJ, gpioj, 'j', 8, gpio070, gpio074, gpio098, gpio09c, gpio0a0, gpio0a4, gpio0a8, + gpio0ac, gpio0b0, gpio0b4, gpio090, gpio094, gpio0b8, gpio0c8, + [ + PJ0: (pj0, 0, Tristate), + PJ1: (pj1, 1, Tristate), + PJ2: (pj2, 2, Tristate), + PJ3: (pj3, 3, Tristate), + PJ4: (pj4, 4, Tristate), + PJ5: (pj5, 5, Tristate), + PJ6: (pj6, 6, Tristate), + PJ7: (pj7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOK, gpiok, 'k', 16, gpio070, gpio074, gpio098, gpio09c, gpio0a0, gpio0a4, gpio0a8, + gpio0ac, gpio0b0, gpio0b4, gpio090, gpio094, gpio0b8, gpio0c8, + [ + PK0: (pk0, 0, Tristate), + PK1: (pk1, 1, Tristate), + PK2: (pk2, 2, Tristate), + PK3: (pk3, 3, Tristate), + PK4: (pk4, 4, Tristate), + PK5: (pk5, 5, Tristate), + PK6: (pk6, 6, Tristate), + PK7: (pk7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOL, gpiol, 'l', 24, gpio070, gpio074, gpio098, gpio09c, gpio0a0, gpio0a4, gpio0a8, + gpio0ac, gpio0b0, gpio0b4, gpio090, gpio094, gpio0b8, gpio0c8, + [ + PL0: (pl0, 0, Tristate), + PL1: (pl1, 1, Tristate), + PL2: (pl2, 2, Tristate), + PL3: (pl3, 3, Tristate), + PL4: (pl4, 4, Tristate), + PL5: (pl5, 5, Tristate), + PL6: (pl6, 6, Tristate), + PL7: (pl7, 7, Tristate), + ] +); + +// GPIO MNOP — register group 0x078–0x108 +gpio_macro!( + GPIOM, gpiom, 'm', 0, gpio078, gpio07c, gpio0e8, gpio0ec, gpio0f0, gpio0f4, gpio0f8, + gpio0fc, gpio100, gpio104, gpio0e0, gpio0e4, gpio0cc, gpio108, + [ + PM0: (pm0, 0, Tristate), + PM1: (pm1, 1, Tristate), + PM2: (pm2, 2, Tristate), + PM3: (pm3, 3, Tristate), + PM4: (pm4, 4, Tristate), + PM5: (pm5, 5, Tristate), + PM6: (pm6, 6, Tristate), + PM7: (pm7, 7, Tristate), + ] +); + +gpio_macro!( + GPION, gpion, 'n', 8, gpio078, gpio07c, gpio0e8, gpio0ec, gpio0f0, gpio0f4, gpio0f8, + gpio0fc, gpio100, gpio104, gpio0e0, gpio0e4, gpio0cc, gpio108, + [ + PN0: (pn0, 0, Tristate), + PN1: (pn1, 1, Tristate), + PN2: (pn2, 2, Tristate), + PN3: (pn3, 3, Tristate), + PN4: (pn4, 4, Tristate), + PN5: (pn5, 5, Tristate), + PN6: (pn6, 6, Tristate), + PN7: (pn7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOO, gpioo, 'o', 16, gpio078, gpio07c, gpio0e8, gpio0ec, gpio0f0, gpio0f4, gpio0f8, + gpio0fc, gpio100, gpio104, gpio0e0, gpio0e4, gpio0cc, gpio108, + [ + PO0: (po0, 0, Tristate), + PO1: (po1, 1, Tristate), + PO2: (po2, 2, Tristate), + PO3: (po3, 3, Tristate), + PO4: (po4, 4, Tristate), + PO5: (po5, 5, Tristate), + PO6: (po6, 6, Tristate), + PO7: (po7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOP, gpiop, 'p', 24, gpio078, gpio07c, gpio0e8, gpio0ec, gpio0f0, gpio0f4, gpio0f8, + gpio0fc, gpio100, gpio104, gpio0e0, gpio0e4, gpio0cc, gpio108, + [ + PP0: (pp0, 0, Tristate), + PP1: (pp1, 1, Tristate), + PP2: (pp2, 2, Tristate), + PP3: (pp3, 3, Tristate), + PP4: (pp4, 4, Tristate), + PP5: (pp5, 5, Tristate), + PP6: (pp6, 6, Tristate), + PP7: (pp7, 7, Tristate), + ] +); + +// GPIO QRST — register group 0x080–0x138 +gpio_macro!( + GPIOQ, gpioq, 'q', 0, gpio080, gpio084, gpio118, gpio11c, gpio120, gpio124, gpio128, + gpio12c, gpio130, gpio134, gpio110, gpio114, gpio0d0, gpio138, + [ + PQ0: (pq0, 0, Tristate), + PQ1: (pq1, 1, Tristate), + PQ2: (pq2, 2, Tristate), + PQ3: (pq3, 3, Tristate), + PQ4: (pq4, 4, Tristate), + PQ5: (pq5, 5, Tristate), + PQ6: (pq6, 6, Tristate), + PQ7: (pq7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOR, gpior, 'r', 8, gpio080, gpio084, gpio118, gpio11c, gpio120, gpio124, gpio128, + gpio12c, gpio130, gpio134, gpio110, gpio114, gpio0d0, gpio138, + [ + PR0: (pr0, 0, Tristate), + PR1: (pr1, 1, Tristate), + PR2: (pr2, 2, Tristate), + PR3: (pr3, 3, Tristate), + PR4: (pr4, 4, Tristate), + PR5: (pr5, 5, Tristate), + PR6: (pr6, 6, Tristate), + PR7: (pr7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOS, gpios, 's', 16, gpio080, gpio084, gpio118, gpio11c, gpio120, gpio124, gpio128, + gpio12c, gpio130, gpio134, gpio110, gpio114, gpio0d0, gpio138, + [ + PS0: (ps0, 0, Tristate), + PS1: (ps1, 1, Tristate), + PS2: (ps2, 2, Tristate), + PS3: (ps3, 3, Tristate), + PS4: (ps4, 4, Tristate), + PS5: (ps5, 5, Tristate), + PS6: (ps6, 6, Tristate), + PS7: (ps7, 7, Tristate), + ] +); + +gpio_macro!( + GPIOT, gpiot, 't', 24, gpio080, gpio084, gpio118, gpio11c, gpio120, gpio124, gpio128, + gpio12c, gpio130, gpio134, gpio110, gpio114, gpio0d0, gpio138, + [ + PT0: (pt0, 0, Tristate), + PT1: (pt1, 1, Tristate), + PT2: (pt2, 2, Tristate), + PT3: (pt3, 3, Tristate), + PT4: (pt4, 4, Tristate), + PT5: (pt5, 5, Tristate), + PT6: (pt6, 6, Tristate), + PT7: (pt7, 7, Tristate), + ] +); + +// GPIO U — register group 0x088–0x168 +gpio_macro!( + GPIOU, gpiou, 'u', 0, gpio088, gpio08c, gpio148, gpio14c, gpio150, gpio154, gpio158, + gpio15c, gpio160, gpio164, gpio140, gpio144, gpio0d4, gpio168, + [ + PU0: (pu0, 0, Tristate), + PU1: (pu1, 1, Tristate), + PU2: (pu2, 2, Tristate), + PU3: (pu3, 3, Tristate), + PU4: (pu4, 4, Tristate), + PU5: (pu5, 5, Tristate), + PU6: (pu6, 6, Tristate), + PU7: (pu7, 7, Tristate), + ] +); diff --git a/target/ast10x0/peripherals/gpio/registers.rs b/target/ast10x0/peripherals/gpio/registers.rs new file mode 100644 index 00000000..a9e243b6 --- /dev/null +++ b/target/ast10x0/peripherals/gpio/registers.rs @@ -0,0 +1,52 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! AST10x0 GPIO low-level register accessor. + +use ast1060_pac as device; +use core::marker::PhantomData; + +/// Safe wrapper around the AST1060 GPIO register block. +pub struct GpioRegisters { + base: *const device::gpio::RegisterBlock, + /// Prevent `Send` and `Sync`. + /// + /// MMIO register blocks must not be transferred across threads or + /// shared by reference due to potential side effects and lack of + /// synchronization guarantees. + _not_send_sync: PhantomData<*const ()>, +} + +impl GpioRegisters { + /// Create a register accessor from a raw GPIO register block pointer. + /// + /// # Safety + /// + /// - `base` must be a valid, non-null pointer to the AST1060 GPIO register block. + /// - The block must remain valid for the lifetime of this value. + /// - Caller must enforce exclusive (or otherwise coordinated) access to the + /// register block for the duration of use. + pub const unsafe fn new(base: *const device::gpio::RegisterBlock) -> Self { + Self { + base, + _not_send_sync: PhantomData, + } + } + + /// Create a register accessor for the global GPIO instance. + /// + /// # Safety + /// + /// Caller must ensure exclusive access to the singleton GPIO peripheral is + /// coordinated for the lifetime of this value. + pub unsafe fn new_global() -> Self { + // SAFETY: Caller upholds the singleton access contract. + unsafe { Self::new(device::Gpio::ptr()) } + } + + #[inline] + pub(crate) fn regs(&self) -> &device::gpio::RegisterBlock { + // SAFETY: Constructor guarantees a valid, non-null register block pointer. + unsafe { &*self.base } + } +} diff --git a/target/ast10x0/peripherals/gpio/types.rs b/target/ast10x0/peripherals/gpio/types.rs new file mode 100644 index 00000000..50e90b5a --- /dev/null +++ b/target/ast10x0/peripherals/gpio/types.rs @@ -0,0 +1,115 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! GPIO type states, traits, and error types. + +use core::marker::PhantomData; + +/// All input modes implement this trait. +pub trait InputMode {} + +/// All output modes implement this trait. +pub trait OutputMode {} + +/// `OpenDrain` modes implement this trait. +pub trait OpenDrainMode { + /// Whether the actively driven level is high. + const ACTIVE_HIGH: bool; +} + +/// Active-low open-drain mode: output drives low and input releases high. +pub struct ActiveLow; +impl OpenDrainMode for ActiveLow { + const ACTIVE_HIGH: bool = false; +} + +/// Active-high open-drain mode: output drives high and input releases low. +pub struct ActiveHigh; +impl OpenDrainMode for ActiveHigh { + const ACTIVE_HIGH: bool = true; +} + +/// Input mode (type state). +pub struct Input +where + MODE: InputMode, +{ + pub(super) _mode: PhantomData, +} + +/// Sub-mode of Input: Floating input (type state). +pub struct Floating; +impl InputMode for Floating {} + +/// Sub-mode of Input: Pulled down input (type state). +pub struct PullDown; +impl InputMode for PullDown {} + +/// Sub-mode of Input: Pulled up input (type state). +pub struct PullUp; +impl InputMode for PullUp {} + +/// Tri-state mode (type state). +pub struct Tristate; + +/// Output mode (type state). +pub struct Output +where + MODE: OutputMode, +{ + pub(super) _mode: PhantomData, +} + +/// Sub-mode of Output: Push-pull output (type state). +pub struct PushPull; +impl OutputMode for PushPull {} +impl OutputMode for PullDown {} +impl OutputMode for PullUp {} + +/// Sub-mode of Output: Open drain output (type state). +pub struct OpenDrain +where + ODM: OpenDrainMode, +{ + pub(super) _mode: PhantomData, +} +impl OutputMode for OpenDrain where ODM: OpenDrainMode {} + +/// Sets when a GPIO pin triggers an interrupt. +pub enum InterruptMode { + /// Interrupt when level is low. + LevelLow, + /// Interrupt when level is high. + LevelHigh, + /// Interrupt on rising edge. + EdgeRising, + /// Interrupt on falling edge. + EdgeFalling, + /// Interrupt on both rising and falling edges. + EdgeBoth, + /// Disable interrupts on this pin. + Disabled, +} + +/// Extension trait to split a GPIO bank peripheral into individual pins. +pub trait GpioExt { + /// The type returned by [`split`](GpioExt::split). + type Parts; + + /// Consume the bank peripheral and return its individual pins. + fn split(self) -> Self::Parts; +} + +/// Error type for GPIO operations. +#[derive(Debug)] +pub enum GpioError { + Unknown, +} + +impl embedded_hal::digital::Error for GpioError { + fn kind(&self) -> embedded_hal::digital::ErrorKind { + match self { + GpioError::Unknown => embedded_hal::digital::ErrorKind::Other, + } + } +} diff --git a/target/ast10x0/peripherals/hace/aes.rs b/target/ast10x0/peripherals/hace/aes.rs new file mode 100644 index 00000000..3e729ab3 --- /dev/null +++ b/target/ast10x0/peripherals/hace/aes.rs @@ -0,0 +1,403 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! HACE AES (128/256, ECB/CBC, raw-key path). +//! +//! Reference behavior follows pinned Zephyr `aspeed_hace` (`cfe94dc`). +//! Correctness is checked with NIST AESAVS/CAVP KATs. +//! +//! Deltas: +//! - A1: borrow-arbitrated exclusivity via `&mut HaceDevice` +//! - A2: ciphertext is plain `CT` (IV is separate) +//! - A3: key/IV context bytes are zeroized after each op and on drop +//! - A4: invalid block sizing returns `InvalidInput` before programming HW +//! - A5: AES-192 and OTP/secret-vault keys are out of scope + +use super::constants::{ + AES_CMD_BASE, HACE_CMD_AES128, HACE_CMD_AES256, HACE_CMD_CBC, HACE_CMD_ECB, HACE_CMD_ENCRYPT, + HACE_SG_LAST, POLL_YIELD_NS, +}; +use super::context::CryptoContext; +use super::device::HaceDevice; +use super::error::HaceError; +use super::helpers::ptr_to_u32; +use super::registers::HaceRegisters; +use core::marker::PhantomData; +use openprot_hal_blocking::cipher::{ + BlockCipherMode, CipherInit, CipherMode, CipherOp, ErrorType, SymmetricCipher, +}; + +/// AES block size in bytes. ECB/CBC input must be block-aligned. +pub const AES_BLOCK: usize = 16; + +/// Borrow-arbitrated AES operation over HACE. +/// +/// Created via [`AesCipher::from_device`]. The retained `&mut` borrow prevents +/// overlapping AES/digest/HMAC operations. +pub struct AesCipher<'a> { + regs: HaceRegisters, + ctx: &'a mut CryptoContext, + poll_budget: u32, + /// Cooperative yield hook called once per completion poll. + yield_fn: &'a mut dyn FnMut(u32), + /// Cache flush hook: invalidates stale CPU cache lines after HACE DMA. + /// Injected from [`HaceDevice`] so this module has no direct SCU dependency. + cache_flush: fn(), +} + +impl<'a> AesCipher<'a> { + pub(crate) fn new( + regs: HaceRegisters, + ctx: &'a mut CryptoContext, + poll_budget: u32, + yield_fn: &'a mut dyn FnMut(u32), + cache_flush: fn(), + ) -> Self { + Self { + regs, + ctx, + poll_budget, + yield_fn, + cache_flush, + } + } + + /// Build an AES adapter from a [`HaceDevice`](super::device::HaceDevice). + /// + /// # Safety + /// No concurrent or reentrant HACE access for the returned lifetime. + pub unsafe fn from_device(device: &'a mut super::device::HaceDevice) -> Self { + // Borrow split; retained `yield_fn` keeps the device exclusively borrowed. + let regs = device.regs; + let poll_budget = device.poll_budget; + let cache_flush = device.cache_flush; + // SAFETY: single-instance device + exclusive live borrow gate access. + let ctx: &'a mut CryptoContext = unsafe { &mut *device.crypto_ctx }; + let yield_fn: &'a mut dyn FnMut(u32) = &mut device.yield_fn; + Self::new(regs, ctx, poll_budget, yield_fn, cache_flush) + } + + /// Map AES key length to command bits. Reject AES-192. + fn keylen_bits(key: &[u8]) -> Result { + match key.len() { + 16 => Ok(HACE_CMD_AES128), + 32 => Ok(HACE_CMD_AES256), + _ => Err(HaceError::InvalidInput), + } + } + + /// One-shot AES transform. + /// + /// `mode_bits` is ECB or CBC. `iv` is set only for CBC. Buffers are plain + /// data (no in-band IV). Context key/IV bytes are always zeroized. + fn crypt( + &mut self, + mode_bits: u32, + encrypt: bool, + key: &[u8], + iv: Option<&[u8; AES_BLOCK]>, + input: &[u8], + output: &mut [u8], + ) -> Result<(), HaceError> { + // Enforce block-aligned sizing before programming. + if input.is_empty() || input.len() % AES_BLOCK != 0 || output.len() < input.len() { + return Err(HaceError::InvalidInput); + } + let kbits = Self::keylen_bits(key)?; + let len = u32::try_from(input.len()).map_err(|_| HaceError::InvalidInput)?; + + // Engine context: IV at [0..16) for IV modes, key at [16..16+keylen). + self.ctx.ctx = [0u8; 64]; + if let Some(iv) = iv { + if let Some(dst) = self.ctx.ctx.get_mut(..AES_BLOCK) { + if let Ok(dst) = <&mut [u8; AES_BLOCK]>::try_from(dst) { + *dst = *iv; + } + } + } + if let Some(dst) = self.ctx.ctx.get_mut(AES_BLOCK..AES_BLOCK + key.len()) { + dst.copy_from_slice(key); + } + + // Point SG descriptors directly at the caller's SRAM buffers. + // + // The AST10x0 crypto MBUS reads and writes payload data from ordinary + // cacheable SRAM (below 0x000A0000). Staging through the `.ram_nc` + // window (0x000A0000+) works for the engine context and SG descriptors + // but not for source/destination payload data: putting payloads in + // `.ram_nc` causes the engine to fire the completion intflag without + // writing any output (observed on hardware). Callers must therefore + // supply buffers in ordinary SRAM (e.g. `static mut` or heap); the + // KAT uses `static mut AES_IN / AES_OUT` which are in `.bss` / regular + // SRAM and work correctly. + // + // After the engine completes, `dcache_invd_all()` is called to + // invalidate any stale cache lines over the output buffer so the CPU + // reads the engine-written data rather than pre-op cached zeros + // (authority: `hace_aspeed.c` calls `cache_data_invd_all()` after + // every crypto op; `aspeed-rust` does the same). + let in_ptr = ptr_to_u32(input.as_ptr())?; + let out_ptr = ptr_to_u32(output.as_mut_ptr())?; + self.ctx.src.addr = in_ptr; + self.ctx.src.len = len | HACE_SG_LAST; + self.ctx.dst.addr = out_ptr; + self.ctx.dst.len = len | HACE_SG_LAST; + + let cmd = AES_CMD_BASE | kbits | mode_bits | if encrypt { HACE_CMD_ENCRYPT } else { 0 }; + + let src_desc = ptr_to_u32(core::ptr::addr_of!(self.ctx.src))?; + let dst_desc = ptr_to_u32(core::ptr::addr_of!(self.ctx.dst))?; + let ctx_base = ptr_to_u32(self.ctx.ctx.as_ptr())?; + let data_len = len; + + self.regs.clear_crypto_intflag(); + self.regs + .program_crypto_operation(src_desc, dst_desc, ctx_base, data_len, cmd); + + let mut done = false; + for _ in 0..self.poll_budget { + if self.regs.crypto_intflag_is_set() { + done = true; + break; + } + (self.yield_fn)(POLL_YIELD_NS); + } + + // Invalidate the data cache so the CPU reads what the engine wrote. + (self.cache_flush)(); + + // Always clear key/IV material from the DMA context buffer. + self.ctx.ctx = [0u8; 64]; + + if done { + Ok(()) + } else { + pw_log::error!( + "hace: AES timeout: HACE1C={:#010x}, cmd={:#010x}, len={}", + self.regs.read_hace1c() as u32, + cmd as u32, + len as u32, + ); + Err(HaceError::Timeout) + } + } + + /// AES-ECB encrypt. + /// + /// `key` is 16 or 32 bytes. `pt` must be non-empty and block-aligned. + /// `ct` must be at least `pt.len()`. Output is ciphertext only. + pub fn ecb_encrypt(&mut self, key: &[u8], pt: &[u8], ct: &mut [u8]) -> Result<(), HaceError> { + self.crypt(HACE_CMD_ECB, true, key, None, pt, ct) + } + + /// AES-ECB decrypt (inverse of [`ecb_encrypt`](Self::ecb_encrypt)). + pub fn ecb_decrypt(&mut self, key: &[u8], ct: &[u8], pt: &mut [u8]) -> Result<(), HaceError> { + self.crypt(HACE_CMD_ECB, false, key, None, ct, pt) + } + + /// AES-CBC encrypt with a 16-byte IV. Output excludes IV prefix. + pub fn cbc_encrypt( + &mut self, + key: &[u8], + iv: &[u8; AES_BLOCK], + pt: &[u8], + ct: &mut [u8], + ) -> Result<(), HaceError> { + self.crypt(HACE_CMD_CBC, true, key, Some(iv), pt, ct) + } + + /// AES-CBC decrypt with a 16-byte IV; input excludes IV prefix. + pub fn cbc_decrypt( + &mut self, + key: &[u8], + iv: &[u8; AES_BLOCK], + ct: &[u8], + pt: &mut [u8], + ) -> Result<(), HaceError> { + self.crypt(HACE_CMD_CBC, false, key, Some(iv), ct, pt) + } +} + +impl Drop for AesCipher<'_> { + fn drop(&mut self) { + // Defensive scrub on drop. + self.ctx.ctx = [0u8; 64]; + } +} + +// ===== Optional openprot cipher-trait skin (ADR-A1) ===================== +// +// Thin fixed-`N` wrapper over `AesCipher`. Kept separate because +// `SymmetricCipher` uses fixed associated buffer types and cannot express +// large streaming DMA paths. + +/// AES-ECB mode marker (port-defined; the hal declares no concrete modes). +#[derive(Debug, Clone, Copy)] +pub struct Ecb; +/// AES-CBC mode marker. +#[derive(Debug, Clone, Copy)] +pub struct Cbc; + +impl CipherMode for Ecb {} +impl BlockCipherMode for Ecb {} +impl CipherMode for Cbc {} +impl BlockCipherMode for Cbc {} + +/// Owned AES key for the trait skin (raw-key path only). +/// +/// Size selects variant: 16 => AES-128, 32 => AES-256. +/// +/// The key bytes are zeroized when this value is dropped. +#[derive(Clone)] +pub enum AesKey { + Aes128([u8; 16]), + Aes256([u8; 32]), +} + +impl AesKey { + #[inline] + fn as_slice(&self) -> &[u8] { + match self { + AesKey::Aes128(k) => k, + AesKey::Aes256(k) => k, + } + } + + fn zeroize(&mut self) { + match self { + AesKey::Aes128(k) => k.fill(0), + AesKey::Aes256(k) => k.fill(0), + } + } +} + +impl Drop for AesKey { + fn drop(&mut self) { + self.zeroize(); + } +} + +/// Fixed-`N` openprot cipher-trait skin bound to one [`HaceDevice`]. +/// +/// Each context wraps borrow-arbitrated [`AesCipher`]. +pub struct AesSkin<'d, Y: FnMut(u32), const N: usize> { + dev: &'d mut HaceDevice, +} + +impl<'d, Y: FnMut(u32), const N: usize> AesSkin<'d, Y, N> { + /// Bind the cipher skin to the device. + /// + /// # Safety + /// Same contract as [`AesCipher::from_device`]: no concurrent/reentrant + /// HACE access for this skin or derived contexts. + pub unsafe fn new(dev: &'d mut HaceDevice) -> Self { + Self { dev } + } +} + +/// In-flight trait-skin op: core plus session key/IV. +pub struct AesOp<'a, const N: usize, M> { + core: AesCipher<'a>, + key: AesKey, + iv: [u8; AES_BLOCK], + _m: PhantomData, +} + +impl<'d, Y: FnMut(u32), const N: usize> ErrorType for AesSkin<'d, Y, N> { + type Error = HaceError; +} + +impl<'d, Y: FnMut(u32), const N: usize> SymmetricCipher for AesSkin<'d, Y, N> { + type Key = AesKey; + type Nonce = [u8; AES_BLOCK]; + type PlainText = [u8; N]; + type CipherText = [u8; N]; +} + +impl<'a, const N: usize, M> ErrorType for AesOp<'a, N, M> { + type Error = HaceError; +} + +impl<'a, const N: usize, M> SymmetricCipher for AesOp<'a, N, M> { + type Key = AesKey; + type Nonce = [u8; AES_BLOCK]; + type PlainText = [u8; N]; + type CipherText = [u8; N]; +} + +macro_rules! cipher_init { + ($mode:ty) => { + impl<'d, Y: FnMut(u32), const N: usize> CipherInit<$mode> for AesSkin<'d, Y, N> { + type CipherContext<'a> + = AesOp<'a, N, $mode> + where + Self: 'a; + + fn init<'a>( + &'a mut self, + key: &Self::Key, + nonce: &Self::Nonce, + ) -> Result, Self::Error> { + // SAFETY: `AesSkin::new` guarantees non-reentrancy; reborrow is exclusive. + let core = unsafe { AesCipher::from_device(&mut *self.dev) }; + Ok(AesOp { + core, + key: key.clone(), + iv: *nonce, + _m: PhantomData, + }) + } + } + }; +} +cipher_init!(Ecb); +cipher_init!(Cbc); + +impl<'a, const N: usize> CipherOp for AesOp<'a, N, Ecb> { + fn encrypt(&mut self, plaintext: [u8; N]) -> Result<[u8; N], HaceError> { + const { assert!(N % AES_BLOCK == 0, "AesSkin: N must be a multiple of 16") }; + let mut ct = [0u8; N]; + self.core + .ecb_encrypt(self.key.as_slice(), &plaintext, &mut ct)?; + Ok(ct) + } + + fn decrypt(&mut self, ciphertext: [u8; N]) -> Result<[u8; N], HaceError> { + const { assert!(N % AES_BLOCK == 0, "AesSkin: N must be a multiple of 16") }; + let mut pt = [0u8; N]; + self.core + .ecb_decrypt(self.key.as_slice(), &ciphertext, &mut pt)?; + Ok(pt) + } +} + +impl<'a, const N: usize> CipherOp for AesOp<'a, N, Cbc> { + fn encrypt(&mut self, plaintext: [u8; N]) -> Result<[u8; N], HaceError> { + const { assert!(N % AES_BLOCK == 0, "AesSkin: N must be a multiple of 16") }; + let mut ct = [0u8; N]; + self.core + .cbc_encrypt(self.key.as_slice(), &self.iv, &plaintext, &mut ct)?; + // Advance IV to last ciphertext block so sequential encrypt() calls + // form a correct CBC chain instead of reusing the original IV. + if let Some(last) = ct.get(N - AES_BLOCK..) { + if let Ok(last) = <[u8; AES_BLOCK]>::try_from(last) { + self.iv = last; + } + } + Ok(ct) + } + + fn decrypt(&mut self, ciphertext: [u8; N]) -> Result<[u8; N], HaceError> { + const { assert!(N % AES_BLOCK == 0, "AesSkin: N must be a multiple of 16") }; + let mut pt = [0u8; N]; + self.core + .cbc_decrypt(self.key.as_slice(), &self.iv, &ciphertext, &mut pt)?; + // Advance IV to last ciphertext block (CBC decrypt chaining). + if let Some(last) = ciphertext.get(N - AES_BLOCK..) { + if let Ok(last) = <[u8; AES_BLOCK]>::try_from(last) { + self.iv = last; + } + } + Ok(pt) + } +} diff --git a/target/ast10x0/peripherals/hace/constants.rs b/target/ast10x0/peripherals/hace/constants.rs new file mode 100644 index 00000000..239a904c --- /dev/null +++ b/target/ast10x0/peripherals/hace/constants.rs @@ -0,0 +1,60 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! HACE command and algorithm constants shared across hash and digest modules. + +pub const HACE_SHA_BE_EN: u32 = 1 << 3; +pub const HACE_CMD_ACC_MODE: u32 = 1 << 8; +pub const HACE_SG_EN: u32 = 1 << 18; +pub const HACE_SG_LAST: u32 = 1 << 31; +pub const HACE_ALGO_SHA256: u32 = (1 << 4) | (1 << 6); +pub const HACE_ALGO_SHA512: u32 = (1 << 5) | (1 << 6); +pub const HACE_ALGO_SHA384: u32 = (1 << 5) | (1 << 6) | (1 << 10); +pub const SHA256_HASH_CMD: u32 = HACE_CMD_ACC_MODE | HACE_SHA_BE_EN | HACE_SG_EN | HACE_ALGO_SHA256; +pub const SHA384_HASH_CMD: u32 = HACE_CMD_ACC_MODE | HACE_SHA_BE_EN | HACE_SG_EN | HACE_ALGO_SHA384; +pub const SHA512_HASH_CMD: u32 = HACE_CMD_ACC_MODE | HACE_SHA_BE_EN | HACE_SG_EN | HACE_ALGO_SHA512; + +// ----- AES (crypto sub-engine) command bits ----------------------------- +// +// Verbatim from the pinned authority `zephyr-reference/hace_aspeed.h` (the +// `HACE_CMD_*` macros; goal.md §1.9.2). `HACE_SG_LAST` (1<<31) above doubles +// as the crypto SG single/last terminator OR'd into `src/dst` SG length words +// (`hace_aspeed.c:132-133`). + +/// `HACE_CMD_MBUS_REQ_SYNC_EN` (`hace_aspeed.h:17`). +pub const HACE_CMD_MBUS_REQ_SYNC_EN: u32 = 1 << 20; +/// `HACE_CMD_DES_SG_CTRL` (`hace_aspeed.h:18`). +pub const HACE_CMD_DES_SG_CTRL: u32 = 1 << 19; +/// `HACE_CMD_SRC_SG_CTRL` (`hace_aspeed.h:19`). +pub const HACE_CMD_SRC_SG_CTRL: u32 = 1 << 18; +/// `HACE_CMD_AES_KEY_HW_EXP` — hardware key expansion (`hace_aspeed.h:25`). +pub const HACE_CMD_AES_KEY_HW_EXP: u32 = 1 << 13; +/// `HACE_CMD_AES_SELECT == 0` (`hace_aspeed.h:22`). +pub const HACE_CMD_AES_SELECT: u32 = 0; +/// `HACE_CMD_ENCRYPT` (`hace_aspeed.h:28`); decrypt is the absence of this bit. +pub const HACE_CMD_ENCRYPT: u32 = 1 << 7; +/// `HACE_CMD_ECB == 0` (`hace_aspeed.h:29`). +pub const HACE_CMD_ECB: u32 = 0; +/// `HACE_CMD_CBC` (`hace_aspeed.h:30`). +pub const HACE_CMD_CBC: u32 = 0x1 << 4; +/// `HACE_CMD_AES128 == 0` (`hace_aspeed.h:34`). +pub const HACE_CMD_AES128: u32 = 0; +/// `HACE_CMD_AES256` (`hace_aspeed.h:36`). +pub const HACE_CMD_AES256: u32 = 0x2 << 2; + +/// Fixed AES session base, `aspeed_crypto_session_setup` (`hace_aspeed.c:264`, +/// `:269`): SG control + MBUS sync + HW key expansion + AES select. +pub const AES_CMD_BASE: u32 = HACE_CMD_DES_SG_CTRL + | HACE_CMD_SRC_SG_CTRL + | HACE_CMD_MBUS_REQ_SYNC_EN + | HACE_CMD_AES_KEY_HW_EXP + | HACE_CMD_AES_SELECT; + +pub const DEFAULT_POLL_BUDGET: u32 = 1_000_000; + +/// Suggested wait window, in nanoseconds, passed to the cooperative `yield_fn` +/// between completion polls. Mirrors the reference HACE driver's 1 µs poll +/// interval (`reg_read_poll_timeout(..., 1, 3000)`). Advisory only: the +/// injected strategy decides whether/how to honor it (`spin_loop` ignores it; +/// an async/RTOS strategy may sleep for it). +pub const POLL_YIELD_NS: u32 = 1_000; diff --git a/target/ast10x0/peripherals/hace/context.rs b/target/ast10x0/peripherals/hace/context.rs new file mode 100644 index 00000000..d6c074e0 --- /dev/null +++ b/target/ast10x0/peripherals/hace/context.rs @@ -0,0 +1,235 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Internal context structures for HACE hashing. + +use core::cell::UnsafeCell; + +pub(crate) const SHA256_DIGEST_SIZE: usize = 32; +pub(crate) const SHA384_DIGEST_SIZE: usize = 48; +pub(crate) const SHA512_DIGEST_SIZE: usize = 64; +/// Block size for SHA-1/224/256. +pub(crate) const HACE_BLOCK_SIZE: usize = 64; +/// Block size for SHA-384/512. +pub(crate) const HACE_BLOCK_SIZE_128: usize = 128; +pub(crate) const HACE_BUFFER_SIZE: usize = 256; + +pub(crate) const SHA256_IV: [u32; 8] = [ + 0x67e6_096a, + 0x85ae_67bb, + 0x72f3_6e3c, + 0x3af5_4fa5, + 0x7f52_0e51, + 0x8c68_059b, + 0xabd9_831f, + 0x19cd_e05b, +]; + +/// SHA-384 IV, verbatim from the pinned Zephyr `hash_aspeed_priv.h` (`sha384_iv`). +pub(crate) const SHA384_IV: [u32; 16] = [ + 0x5d9d_bbcb, + 0xd89e_05c1, + 0x2a29_9a62, + 0x07d5_7c36, + 0x5a01_5991, + 0x17dd_7030, + 0xd8ec_2f15, + 0x3959_0ef7, + 0x6726_3367, + 0x310b_c0ff, + 0x874a_b48e, + 0x1115_5868, + 0x0d2e_0cdb, + 0xa78f_f964, + 0x1d48_b547, + 0xa44f_fabe, +]; + +/// SHA-512 IV, verbatim from the pinned Zephyr `hash_aspeed_priv.h` (`sha512_iv`). +pub(crate) const SHA512_IV: [u32; 16] = [ + 0x67e6_096a, + 0x08c9_bcf3, + 0x85ae_67bb, + 0x3ba7_ca84, + 0x72f3_6e3c, + 0x2bf8_94fe, + 0x3af5_4fa5, + 0xf136_1d5f, + 0x7f52_0e51, + 0xd182_e6ad, + 0x8c68_059b, + 0x1f6c_3e2b, + 0xabd9_831f, + 0x6bbd_41fb, + 0x19cd_e05b, + 0x7921_7e13, +]; + +pub(crate) const DIGEST_BUFFER_SIZE: usize = 64; +pub(crate) const KEY_BUFFER_SIZE: usize = 128; + +#[derive(Copy, Clone)] +#[repr(C)] +pub(crate) struct Sg { + /// Byte length of the buffer, OR'd with `HACE_SG_LAST` (bit 31) for the + /// final/only entry in the scatter-gather list. Hardware SG format has + /// `len` at offset +0, `addr` at offset +4 — matches both the pinned + /// Zephyr `aspeed_sg` struct (`hace_aspeed.h`) and `aspeed-rust` + /// `AspeedSg { len, addr }`. HACE parses len @ +0, addr @ +4. + pub(crate) len: u32, + /// Physical address of the data buffer. + pub(crate) addr: u32, +} + +impl Sg { + pub const fn new() -> Self { + Self { len: 0, addr: 0 } + } +} + +#[repr(C, align(64))] +pub(crate) struct HashContext { + pub(crate) sg: [Sg; 2], + pub(crate) digest: [u8; DIGEST_BUFFER_SIZE], + pub(crate) method: u32, + pub(crate) block_size: u32, + pub(crate) key: [u8; KEY_BUFFER_SIZE], + pub(crate) key_len: u32, + pub(crate) ipad: [u8; KEY_BUFFER_SIZE], + pub(crate) opad: [u8; KEY_BUFFER_SIZE], + pub(crate) digcnt: [u64; 2], + pub(crate) bufcnt: u32, + pub(crate) buffer: [u8; HACE_BUFFER_SIZE], + pub(crate) iv_size: u8, +} + +impl HashContext { + pub const fn new() -> Self { + Self { + sg: [Sg::new(), Sg::new()], + digest: [0; DIGEST_BUFFER_SIZE], + method: 0, + block_size: 0, + key: [0; KEY_BUFFER_SIZE], + key_len: 0, + ipad: [0; KEY_BUFFER_SIZE], + opad: [0; KEY_BUFFER_SIZE], + digcnt: [0; 2], + bufcnt: 0, + buffer: [0; HACE_BUFFER_SIZE], + iv_size: 0, + } + } +} + +#[allow(dead_code)] +pub(crate) struct SectionPlacedContext(UnsafeCell); + +// SAFETY: HACE is owned by a single-threaded driver; access is serialized by the caller. +unsafe impl Sync for SectionPlacedContext {} + +impl SectionPlacedContext { + pub const fn new() -> Self { + Self(UnsafeCell::new(HashContext::new())) + } + + pub fn get(&self) -> *mut HashContext { + self.0.get() + } +} + +#[unsafe(link_section = ".ram_nc")] +static SHARED_HASH_CTX: SectionPlacedContext = SectionPlacedContext::new(); + +/// Acquire the raw pointer to the section-placed hash context, to be held as +/// private state by the one [`HaceDevice`](super::device::HaceDevice). +/// +/// This is the *only* path to the context. There is deliberately no free +/// accessor that hands the pointer to arbitrary call sites: the operation +/// state is reached exclusively *through* the borrowed device (every +/// `HaceDigest`/`HaceHmac` reborrows it under the device's `&mut`), which is +/// what makes engine exclusivity borrow-arbitrated rather than caller +/// discipline (`design-patterns` :: `borrow-arbitrated-engine-exclusivity`, +/// Checklist box 2). +/// +/// The context must remain a `.ram_nc`, `#[repr(C, align(64))]` static — it +/// holds the SG list / `buffer` / `digest` DMA targets and cannot live on a +/// stack-placed device value (`goal.md` §1.3/§5.1). That residual static is +/// the pattern's stated hardware liability ("language fiction, not a hardware +/// lock"); single-instance is gate-delegated to the `unsafe fn new*` contract +/// below (Checklist box 3), exactly as the sibling SBC port does. +/// +/// # Safety +/// The HACE engine is a hardware singleton. The caller (the `HaceDevice` +/// construction gate) must uphold the same single-instance/non-reentrancy +/// contract as `HaceRegisters::new*`: at most one live `HaceDevice`, hence at +/// most one live `&mut` minted from this pointer, at a time. +pub(crate) unsafe fn acquire_shared_ctx() -> *mut HashContext { + SHARED_HASH_CTX.get() +} + +// ----- AES (crypto sub-engine) context ---------------------------------- +// +// Mirrors the pinned authority `struct aspeed_crypto_ctx` +// (`zephyr-reference/crypto_aspeed_priv.h:20-24`; goal.md §1.9.3): a 64-byte +// engine context (`ctx[0..16)` = IV for CBC, `ctx[16..]` = raw key), plus the +// source/destination SG descriptors and the command word. `ctx`, `src`, `dst` +// are DMA targets handed to the engine by physical address — same `.ram_nc`, +// `#[repr(C, align(64))]`, single-in-flight discipline (and the same +// layout-sensitivity caution, goal.md §2.2) as `HashContext`. + +#[repr(C, align(64))] +pub(crate) struct CryptoContext { + /// Engine context buffer: `[0..16)` IV (CBC), `[16..16+keylen)` raw key + /// (`hace_aspeed.c:114`, `:186`/`:200`). + pub(crate) ctx: [u8; 64], + /// Source SG descriptor (`addr` = data, `len = bytes | HACE_SG_LAST`). + pub(crate) src: Sg, + /// Destination SG descriptor. + pub(crate) dst: Sg, +} + +impl CryptoContext { + pub const fn new() -> Self { + Self { + ctx: [0; 64], + src: Sg::new(), + dst: Sg::new(), + } + } +} + +#[allow(dead_code)] +pub(crate) struct SectionPlacedCrypto(UnsafeCell); + +// SAFETY: HACE is owned by a single-threaded driver; access is serialized by +// the caller (the `unsafe fn new*` single-instance contract). +unsafe impl Sync for SectionPlacedCrypto {} + +impl SectionPlacedCrypto { + pub const fn new() -> Self { + Self(UnsafeCell::new(CryptoContext::new())) + } + + pub fn get(&self) -> *mut CryptoContext { + self.0.get() + } +} + +#[unsafe(link_section = ".ram_nc")] +static SHARED_CRYPTO_CTX: SectionPlacedCrypto = SectionPlacedCrypto::new(); + +/// Acquire the raw pointer to the section-placed crypto context, held as +/// private state by the one [`HaceDevice`](super::device::HaceDevice). Exactly +/// the [`acquire_shared_ctx`] discipline, for the AES path: no free accessor; +/// the live `&mut` is reached only *through* the borrowed device +/// (`borrow-arbitrated-engine-exclusivity`, goal.md §2.3 delta A1). AES is the +/// engine's third operation; it shares the same single-in-flight constraint +/// (goal.md §5.1) as digest/HMAC. +/// +/// # Safety +/// Same single-instance/non-reentrancy contract as [`acquire_shared_ctx`]: at +/// most one live `HaceDevice`, hence at most one live `&mut` from this pointer. +pub(crate) unsafe fn acquire_crypto_ctx() -> *mut CryptoContext { + SHARED_CRYPTO_CTX.get() +} diff --git a/target/ast10x0/peripherals/hace/device.rs b/target/ast10x0/peripherals/hace/device.rs new file mode 100644 index 00000000..8f854cd6 --- /dev/null +++ b/target/ast10x0/peripherals/hace/device.rs @@ -0,0 +1,165 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! HACE device binding with cooperative yield. + +use super::constants::DEFAULT_POLL_BUDGET; +use super::context::{acquire_crypto_ctx, acquire_shared_ctx, CryptoContext, HashContext}; +use super::registers::HaceRegisters; +use crate::scu::cache::dcache_invd_all as scu_dcache_invd_all; +use crate::scu::{ClockRegisterHalf, ScuRegisterHalf, ScuRegisters}; + +#[derive(Debug, Copy, Clone, PartialEq, Eq)] +pub enum HashAlgo { + Sha256, +} + +/// The one owned binding over the HACE engine. +/// +/// Exclusivity member of the *owned-peripheral* family (`design-patterns` :: +/// `borrow-arbitrated-engine-exclusivity`): this value is **not** +/// `Copy`/`Clone` (the `*mut HashContext` field also makes it structurally +/// move-only), and every operation handle — `HaceDigest`, `HaceHmac` — is +/// produced *only* by an exclusive `&mut HaceDevice` borrow-split. Two +/// concurrent ops of the one engine, of any kind, are therefore a borrow-check +/// error: the Rust `&mut`-exclusivity rule is the arbiter, replacing the Zephyr +/// reference's `in_use`/`-EBUSY` caller-serialization discipline. No runtime +/// busy flag and no hardware busy-bit read exists anywhere in this driver. +/// +/// `ctx` is the engine's operation state. It must be a `.ram_nc`, +/// `#[repr(C, align(64))]` static (DMA targets — SG list / `buffer` / +/// `digest`; `goal.md` §1.3/§5.1) so it cannot be an inline by-value field of +/// this (stack-placeable) device; instead the device holds the *sole* pointer +/// to it, acquired once at the construction gate via +/// [`acquire_shared_ctx`](super::context::acquire_shared_ctx) — there is no +/// free accessor handing it out elsewhere (Checklist box 2). The live +/// `&mut HashContext` exists *only* transiently inside an operation, reborrowed +/// through the device's `&mut`. Single-instance-per-engine is gate-delegated to +/// the documented `unsafe fn new*` contract (Checklist box 3), as in the +/// sibling SBC port; that residual static is the pattern's stated hardware +/// liability, not a soundness gap. +pub struct HaceDevice { + pub(crate) regs: HaceRegisters, + /// Sole pointer to the section-placed [`HashContext`]. Reborrowed as a + /// transient `&mut` through `&mut self` by each operation's `from_device` + /// (a disjoint-field split alongside `yield_fn`); never aliased outside + /// the device. + pub(crate) ctx: *mut HashContext, + /// Sole pointer to the section-placed [`CryptoContext`] (AES path). Same + /// discipline as `ctx`: reborrowed as a transient `&mut` through + /// `&mut self` by `AesCipher::from_device` (disjoint-field split alongside + /// `yield_fn`); never aliased outside the device. AES is the engine's + /// third borrow-arbitrated operation (goal.md §2.3 delta A1 / §5.1). + pub(crate) crypto_ctx: *mut CryptoContext, + /// Cooperative yield hook invoked between completion polls. + /// Argument is a suggested wait window in nanoseconds. + pub(crate) yield_fn: Y, + pub(crate) poll_budget: u32, + /// Cache flush hook called after HACE DMA writes to invalidate stale CPU + /// cache lines. Injected at construction so operation modules (digest, + /// aes) have no direct SCU dependency. + pub(crate) cache_flush: fn(), +} + +/// No-op cache flush for devices constructed without a SCU reference (e.g. +/// unit-test stubs using a raw register base pointer via `new`/`new_with_yield`). +fn fn_noop_flush() {} + +impl HaceDevice { + /// Create a device bound to a raw HACE register block with a caller-provided + /// cooperative yield strategy. + /// + /// # Safety + /// Caller must uphold the same safety contract as [`HaceRegisters::new`]. + /// This type is non-reentrant: only one `HaceDevice` may be active at a time. + pub unsafe fn new_with_yield( + base: *const ast1060_pac::hace::RegisterBlock, + yield_fn: Y, + ) -> Self { + Self { + // SAFETY: Caller upholds register-pointer validity/ownership. + regs: unsafe { HaceRegisters::new(base) }, + // SAFETY: the `unsafe fn new*` single-instance contract makes this + // the sole live device, hence the sole holder of these pointers. + ctx: unsafe { acquire_shared_ctx() }, + crypto_ctx: unsafe { acquire_crypto_ctx() }, + yield_fn, + poll_budget: DEFAULT_POLL_BUDGET, + cache_flush: fn_noop_flush, + } + } + + /// Create a device bound to a raw HACE register block. + /// + /// # Safety + /// Caller must uphold the same safety contract as [`HaceRegisters::new`]. + /// This type is non-reentrant: only one `HaceDevice` may be active at a time. + pub unsafe fn new(base: *const ast1060_pac::hace::RegisterBlock, yield_fn: Y) -> Self { + // SAFETY: Same contract as this wrapper. + unsafe { Self::new_with_yield(base, yield_fn) } + } + + /// Create a device bound to the singleton HACE instance with a caller-provided + /// cooperative yield strategy. + /// + /// # Safety + /// Caller must coordinate singleton access globally. + /// This type is non-reentrant: only one `HaceDevice` may be active at a time. + pub unsafe fn new_global_with_yield(yield_fn: Y) -> Self { + // SCU080 bit 13 = StopYCLKForHACE. Write bit 13 to SCU084 to clear the + // clock-stop bit and enable the HACE YCLK before touching any HACE registers. + // SAFETY: SCU is a singleton; this is called under the same single-instance + // contract as HaceRegisters::new_global — the caller guarantees exclusivity. + let scu = unsafe { ScuRegisters::new_global_unlocked() }; + scu.ungate_clock_mask(ClockRegisterHalf::Lower, 1 << 13); + // SCU040 bit 4 = HACE reset. Write bit 4 to SCU044 to deassert reset and + // bring the HACE out of reset before accessing any HACE registers. Without + // this, the AHB bus hangs on the first HACE register read when the ROM + // bootloader (UART/fwspick mode) leaves HACE in reset. + scu.deassert_reset_mask(ScuRegisterHalf::Lower, 1 << 4); + + // SAFETY: Caller coordinates singleton access. + let regs = unsafe { HaceRegisters::new_global() }; + + // Drain any in-progress hash operation left by the bootloader. + // On real hardware the engine may be busy when firmware starts; the + // HACE W1C clear of `hash_intflag` is ignored while `HashEngStsFlag` + // (bit 0) is set, causing the first poll to return a stale flag and the + // digest buffer to read back as the IV (never written by the engine). + // We stop the engine, then spin until it goes idle, then clear the + // stale flag before handing the device to callers. + regs.stop_hash_operation(); + while regs.hash_engine_is_busy() { + core::hint::spin_loop(); + } + regs.clear_hash_intflag(); + + Self { + regs, + cache_flush: scu_dcache_invd_all, + // SAFETY: the `unsafe fn new*` single-instance contract makes this + // the sole live device, hence the sole holder of these pointers. + ctx: unsafe { acquire_shared_ctx() }, + crypto_ctx: unsafe { acquire_crypto_ctx() }, + yield_fn, + poll_budget: DEFAULT_POLL_BUDGET, + } + } + + /// Create a device bound to the singleton HACE instance. + /// + /// # Safety + /// Caller must coordinate singleton access globally. + /// This type is non-reentrant: only one `HaceDevice` may be active at a time. + pub unsafe fn new_global(yield_fn: Y) -> Self { + // SAFETY: Same contract as this wrapper. + unsafe { Self::new_global_with_yield(yield_fn) } + } + + /// Override polling timeout budget for operation completion. + #[must_use] + pub const fn with_timeout_polls(mut self, timeout_polls: u32) -> Self { + self.poll_budget = timeout_polls; + self + } +} diff --git a/target/ast10x0/peripherals/hace/digest.rs b/target/ast10x0/peripherals/hace/digest.rs new file mode 100644 index 00000000..c5b55ad8 --- /dev/null +++ b/target/ast10x0/peripherals/hace/digest.rs @@ -0,0 +1,346 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Generic HACE Digest HAL adapter for OpenPRoT + +use super::constants::{ + HACE_SG_LAST, POLL_YIELD_NS, SHA256_HASH_CMD, SHA384_HASH_CMD, SHA512_HASH_CMD, +}; +use super::context::{ + HashContext, HACE_BLOCK_SIZE, HACE_BLOCK_SIZE_128, SHA256_DIGEST_SIZE, SHA256_IV, + SHA384_DIGEST_SIZE, SHA384_IV, SHA512_DIGEST_SIZE, SHA512_IV, +}; +use super::error::HaceError; +use super::helpers::{fill_padding, load_iv, ptr_to_u32}; +use super::registers::HaceRegisters; +use core::marker::PhantomData; +use openprot_hal_blocking::digest::scoped::{DigestCtrlReset, DigestInit, DigestOp}; +use openprot_hal_blocking::digest::{ + Digest, DigestAlgorithm, ErrorType, Sha2_256, Sha2_384, Sha2_512, +}; +use zerocopy::IntoBytes; + +/// Per-algorithm constants required by the HACE driver. +/// +/// Mirrors the role of `HashAlgo` methods in aspeed-rust: provides the hardware +/// command word, block size, digest size, and IV for each supported algorithm. +pub(crate) trait HaceDigestSpec: DigestAlgorithm +where + Self::Digest: IntoBytes, +{ + const HASH_CMD: u32; + const BLOCK_SIZE: usize; + + fn iv() -> &'static [u32]; + fn digest_from_context(ctx: &HashContext) -> Self::Digest; +} + +impl HaceDigestSpec for Sha2_256 { + const HASH_CMD: u32 = SHA256_HASH_CMD; + const BLOCK_SIZE: usize = HACE_BLOCK_SIZE; + + fn iv() -> &'static [u32] { + &SHA256_IV + } + + fn digest_from_context(ctx: &HashContext) -> Self::Digest { + let mut out = [0u32; SHA256_DIGEST_SIZE / 4]; + for (i, dst) in out.iter_mut().enumerate() { + let off = i * 4; + if let Some(chunk) = ctx.digest.get(off..off + 4) { + *dst = u32::from_ne_bytes(<[u8; 4]>::try_from(chunk).unwrap_or([0u8; 4])); + } + } + Digest::new(out) + } +} + +impl HaceDigestSpec for Sha2_384 { + const HASH_CMD: u32 = SHA384_HASH_CMD; + const BLOCK_SIZE: usize = HACE_BLOCK_SIZE_128; + + fn iv() -> &'static [u32] { + &SHA384_IV + } + + fn digest_from_context(ctx: &HashContext) -> Self::Digest { + let mut out = [0u32; SHA384_DIGEST_SIZE / 4]; + for (i, dst) in out.iter_mut().enumerate() { + let off = i * 4; + if let Some(chunk) = ctx.digest.get(off..off + 4) { + *dst = u32::from_ne_bytes(<[u8; 4]>::try_from(chunk).unwrap_or([0u8; 4])); + } + } + Digest::new(out) + } +} + +impl HaceDigestSpec for Sha2_512 { + const HASH_CMD: u32 = SHA512_HASH_CMD; + const BLOCK_SIZE: usize = HACE_BLOCK_SIZE_128; + + fn iv() -> &'static [u32] { + &SHA512_IV + } + + fn digest_from_context(ctx: &HashContext) -> Self::Digest { + let mut out = [0u32; SHA512_DIGEST_SIZE / 4]; + for (i, dst) in out.iter_mut().enumerate() { + let off = i * 4; + if let Some(chunk) = ctx.digest.get(off..off + 4) { + *dst = u32::from_ne_bytes(<[u8; 4]>::try_from(chunk).unwrap_or([0u8; 4])); + } + } + Digest::new(out) + } +} + +pub struct HaceDigest<'a, T: DigestAlgorithm> { + pub(crate) regs: HaceRegisters, + pub(crate) ctx: &'a mut HashContext, + pub(crate) poll_budget: u32, + /// Cooperative yield hook, borrowed from the originating [`HaceDevice`] and + /// invoked once between every completion poll. Type-erased so the adapter + /// (and the `Digest*` trait impls) need not be generic over the strategy. + pub(crate) yield_fn: &'a mut dyn FnMut(u32), + /// Cache flush hook: invalidates stale CPU cache lines after HACE DMA. + /// Injected from [`HaceDevice`] so this module has no direct SCU dependency. + pub(crate) cache_flush: fn(), + _algo: PhantomData, +} + +impl<'a, T: DigestAlgorithm> HaceDigest<'a, T> { + /// Construct a digest adapter from an existing register handle, context, + /// poll budget, and cooperative yield hook. + pub(crate) fn new( + regs: HaceRegisters, + ctx: &'a mut HashContext, + poll_budget: u32, + yield_fn: &'a mut dyn FnMut(u32), + cache_flush: fn(), + ) -> Self { + Self { + regs, + ctx, + poll_budget, + yield_fn, + cache_flush, + _algo: PhantomData, + } + } + + /// Construct a digest adapter from a [`HaceDevice`]. + /// + /// # Safety + /// Caller must ensure no concurrent or reentrant HACE access for the + /// lifetime of the returned [`HaceDigest`]. + pub unsafe fn from_device(device: &'a mut super::device::HaceDevice) -> Self { + // Borrow split. `regs`/`poll_budget`/`ctx` are `Copy`d out; the + // retained `&'a mut device.yield_fn` reborrow pins `&'a mut HaceDevice` + // for the whole life of the returned op — that is the arbiter: a + // second `HaceDigest`/`HaceHmac` needs `&mut device` again and is a + // borrow-check error while this one lives. The context is no longer + // minted by a `shared_ctx_ptr()` free accessor at each call; it is the + // device's sole pointer, so its transient `&mut` is reached only + // *through* that exclusive device borrow + // (`borrow-arbitrated-engine-exclusivity`, Checklist box 2/4). + let regs = device.regs; + let poll_budget = device.poll_budget; + let cache_flush = device.cache_flush; + // SAFETY: the device holds the sole pointer to this `.ram_nc` context + // (acquired once at its `unsafe fn new*` single-instance gate); the + // caller upholds non-reentrancy and the live `&'a mut device` (pinned + // by `yield_fn` below) gates it, so no other `&mut` to it is live. + let ctx: &'a mut HashContext = unsafe { &mut *device.ctx }; + let yield_fn: &'a mut dyn FnMut(u32) = &mut device.yield_fn; + Self::new(regs, ctx, poll_budget, yield_fn, cache_flush) + } + + /// DMA one full block held in `ctx.buffer` (always `.ram_nc`) to the engine. + /// + /// Called only when `ctx.bufcnt == ctx.block_size`. Resets `bufcnt` to 0 + /// on success so the buffer can be reused for the next block. + fn flush_block(&mut self) -> Result<(), HaceError> { + let buf_ptr = ptr_to_u32(self.ctx.buffer.as_ptr())?; + let bufcnt = self.ctx.bufcnt; + self.ctx.sg[0].addr = buf_ptr; + self.ctx.sg[0].len = bufcnt | HACE_SG_LAST; + + let sg_addr = ptr_to_u32(self.ctx.sg.as_ptr())?; + let digest_addr = ptr_to_u32(self.ctx.digest.as_ptr())?; + let method = self.ctx.method; + + self.regs.clear_hash_intflag(); + self.regs + .program_hash_operation(sg_addr, digest_addr, bufcnt, method); + + for _ in 0..self.poll_budget { + if self.regs.hash_intflag_is_set() { + self.ctx.bufcnt = 0; + return Ok(()); + } + (self.yield_fn)(POLL_YIELD_NS); + } + + self.regs.stop_hash_operation(); + Err(HaceError::Timeout) + } +} + +impl<'a, T: DigestAlgorithm> ErrorType for HaceDigest<'a, T> { + type Error = HaceError; +} + +impl<'a, T: HaceDigestSpec> DigestInit for HaceDigest<'a, T> +where + T::Digest: IntoBytes, +{ + type OpContext<'b> + = HaceDigest<'b, T> + where + Self: 'b; + + fn init(&mut self, _algo: T) -> Result, Self::Error> { + // Mirror aspeed-rust init sequence exactly: + // 1. Set method (hardware command word, includes HACE_SG_EN) + // 2. Load IV into digest buffer + // 3. Set block_size + // 4. Zero bufcnt and digcnt + let iv = T::iv(); + self.ctx.method = T::HASH_CMD; + let iv_bytes = iv.len().saturating_mul(4); + match self.ctx.digest.get_mut(..iv_bytes) { + Some(dst) => load_iv(dst, iv)?, + None => return Err(HaceError::InvalidInput), + } + self.ctx.block_size = T::BLOCK_SIZE as u32; + self.ctx.bufcnt = 0; + self.ctx.digcnt = [0; 2]; + Ok(HaceDigest { + regs: self.regs, + ctx: &mut *self.ctx, + poll_budget: self.poll_budget, + yield_fn: &mut *self.yield_fn, + cache_flush: self.cache_flush, + _algo: PhantomData, + }) + } +} + +impl<'a, T: HaceDigestSpec> DigestOp for HaceDigest<'a, T> +where + T::Digest: IntoBytes, +{ + type Output = T::Digest; + + fn update(&mut self, input: &[u8]) -> Result<(), Self::Error> { + let input_len = u32::try_from(input.len()).map_err(|_| HaceError::InvalidInput)?; + + // Accumulate total byte count (with carry into digcnt[1]). + let (new_digcnt, carry) = self.ctx.digcnt[0].overflowing_add(u64::from(input_len)); + self.ctx.digcnt[0] = new_digcnt; + if carry { + self.ctx.digcnt[1] += 1; + } + + // Copy all input through ctx.buffer (.ram_nc) one block at a time. + // + // DMA safety (D1/D2): the HACE engine reads data by physical address + // via SG descriptors. If the caller's `input` slice is in flash, rodata, + // or a cacheable stack buffer, the engine may read stale zeros from + // physical RAM. By staging every byte through `ctx.buffer` (which is + // placed in `.ram_nc` by the linker) we guarantee the DMA source is + // always in non-cacheable SRAM. This also covers HMAC's `scratch` + // buffer (D2) since it routes through `update()` via `one_shot!`. + let block_size = self.ctx.block_size as usize; + let mut offset = 0usize; + while offset < input.len() { + let bufcnt = self.ctx.bufcnt as usize; + let space = block_size.saturating_sub(bufcnt); + let chunk_len = core::cmp::min(space, input.len() - offset); + // Invariant: block_size is 64 or 128 (set by init()); if somehow + // zero, bail rather than infinite-loop. + if chunk_len == 0 { + return Err(HaceError::InvalidInput); + } + + let dst = self + .ctx + .buffer + .get_mut(bufcnt..bufcnt.saturating_add(chunk_len)) + .ok_or(HaceError::InvalidInput)?; + let src = input + .get(offset..offset.saturating_add(chunk_len)) + .ok_or(HaceError::InvalidInput)?; + // Element-wise copy instead of `copy_from_slice`: `dst` and `src` are + // both `chunk_len` long by construction, but the optimizer cannot + // prove `dst.len() == src.len()` through the two `get`/`get_mut` + // range slices, so `copy_from_slice` would keep its length-mismatch + // panic branch. The zip-copy is provably panic-free. + for (d, s) in dst.iter_mut().zip(src.iter()) { + *d = *s; + } + + self.ctx.bufcnt += chunk_len as u32; + offset += chunk_len; + + // When the buffer holds exactly one full block, flush it via DMA. + if self.ctx.bufcnt == self.ctx.block_size { + self.flush_block()?; + } + } + + Ok(()) + } + + fn finalize(self) -> Result { + let this = self; + + // Append SHA padding at ctx.buffer[bufcnt..]; updates ctx.bufcnt. + fill_padding(this.ctx, 0); + + // Set up SG[0] descriptor pointing at the padded buffer (mirror aspeed-rust finalize). + let buf_ptr = ptr_to_u32(this.ctx.buffer.as_ptr())?; + let bufcnt = this.ctx.bufcnt; + this.ctx.sg[0].addr = buf_ptr; + this.ctx.sg[0].len = bufcnt | HACE_SG_LAST; + + let sg_addr = ptr_to_u32(this.ctx.sg.as_ptr())?; + let digest_addr = ptr_to_u32(this.ctx.digest.as_ptr())?; + let method = this.ctx.method; + + this.regs.clear_hash_intflag(); + this.regs + .program_hash_operation(sg_addr, digest_addr, bufcnt, method); + + for _ in 0..this.poll_budget { + if this.regs.hash_intflag_is_set() { + // Invalidate stale CPU cache lines over the digest buffer. + (this.cache_flush)(); + let result = T::digest_from_context(this.ctx); + // Cleanup context (mirrors cleanup_context in aspeed-rust). + this.ctx.bufcnt = 0; + this.ctx.digcnt = [0; 2]; + this.ctx.buffer.fill(0); + this.ctx.digest.fill(0); + this.regs.stop_hash_operation(); + return Ok(result); + } + (this.yield_fn)(POLL_YIELD_NS); + } + + this.regs.stop_hash_operation(); + Err(HaceError::Timeout) + } +} + +impl<'a, T: DigestAlgorithm> DigestCtrlReset for HaceDigest<'a, T> { + fn reset(&mut self) -> Result<(), Self::Error> { + self.ctx.bufcnt = 0; + self.ctx.digcnt = [0; 2]; + self.ctx.buffer.fill(0); + self.ctx.digest.fill(0); + self.regs.stop_hash_operation(); + Ok(()) + } +} diff --git a/target/ast10x0/peripherals/hace/error.rs b/target/ast10x0/peripherals/hace/error.rs new file mode 100644 index 00000000..19bcb5fd --- /dev/null +++ b/target/ast10x0/peripherals/hace/error.rs @@ -0,0 +1,53 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! HACE error definitions. + +use openprot_hal_blocking::cipher::{Error as CipherError, ErrorKind as CipherErrorKind}; +use openprot_hal_blocking::digest::{Error as DigestError, ErrorKind}; +use openprot_hal_blocking::mac::{Error as MacError, ErrorKind as MacErrorKind}; + +#[derive(Debug, Copy, Clone, PartialEq, Eq)] +pub enum HaceError { + /// Engine was not able to accept a new operation. + Busy, + /// Operation did not complete before the timeout budget. + Timeout, + /// Caller-provided parameters are invalid. + InvalidInput, + /// Unexpected hardware/software failure. + Internal, +} + +impl DigestError for HaceError { + fn kind(&self) -> ErrorKind { + match self { + HaceError::Busy => ErrorKind::HardwareFailure, + HaceError::Timeout => ErrorKind::HardwareFailure, + HaceError::InvalidInput => ErrorKind::InvalidInputLength, + HaceError::Internal => ErrorKind::HardwareFailure, + } + } +} + +impl MacError for HaceError { + fn kind(&self) -> MacErrorKind { + match self { + HaceError::Busy => MacErrorKind::Busy, + HaceError::Timeout => MacErrorKind::HardwareFailure, + HaceError::InvalidInput => MacErrorKind::InvalidInputLength, + HaceError::Internal => MacErrorKind::HardwareFailure, + } + } +} + +impl CipherError for HaceError { + fn kind(&self) -> CipherErrorKind { + match self { + HaceError::Busy => CipherErrorKind::Busy, + HaceError::Timeout => CipherErrorKind::Timeout, + HaceError::InvalidInput => CipherErrorKind::InvalidInput, + HaceError::Internal => CipherErrorKind::HardwareFailure, + } + } +} diff --git a/target/ast10x0/peripherals/hace/helpers.rs b/target/ast10x0/peripherals/hace/helpers.rs new file mode 100644 index 00000000..5a192802 --- /dev/null +++ b/target/ast10x0/peripherals/hace/helpers.rs @@ -0,0 +1,88 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Shared helper routines for HACE digest operations. + +use super::context::HashContext; +use super::error::HaceError; + +pub(crate) fn ptr_to_u32(ptr: *const T) -> Result { + u32::try_from(ptr as usize).map_err(|_| HaceError::InvalidInput) +} + +/// Append SHA padding to `ctx.buffer` starting at `ctx.bufcnt`. +/// +/// Mirrors `aspeed-rust` `fill_padding`: uses `ctx.bufcnt` as the write +/// position and `ctx.digcnt[0]` (plus carry in `digcnt[1]`) as the total +/// byte count. `remaining` is the number of bytes not yet reflected in +/// `ctx.digcnt` (pass 0 when `digcnt` is fully up to date, as in `finalize`). +pub(crate) fn fill_padding(ctx: &mut HashContext, remaining: usize) { + let block_size = ctx.block_size as usize; + let bufcnt = ctx.bufcnt as usize; + + let index = (bufcnt + remaining) & (block_size - 1); + let padlen = if block_size == 64 { + if index < 56 { + 56 - index + } else { + 64 + 56 - index + } + } else if index < 112 { + 112 - index + } else { + 128 + 112 - index + }; + + ctx.buffer.get_mut(bufcnt).map(|b| *b = 0x80).unwrap_or(()); + ctx.buffer + .get_mut(bufcnt + 1..bufcnt + padlen) + .map(|s| s.fill(0)) + .unwrap_or(()); + + if block_size == 64 { + let bits = (ctx.digcnt[0] << 3).to_be_bytes(); + if let Some(dst) = ctx.buffer.get_mut(bufcnt + padlen..bufcnt + padlen + 8) { + dst.copy_from_slice(&bits); + } + ctx.bufcnt += (padlen + 8) as u32; + } else { + let low = (ctx.digcnt[0] << 3).to_be_bytes(); + let high = ((ctx.digcnt[1] << 3) | (ctx.digcnt[0] >> 61)).to_be_bytes(); + if let Some(dst) = ctx.buffer.get_mut(bufcnt + padlen..bufcnt + padlen + 8) { + dst.copy_from_slice(&high); + } + if let Some(dst) = ctx + .buffer + .get_mut(bufcnt + padlen + 8..bufcnt + padlen + 16) + { + dst.copy_from_slice(&low); + } + ctx.bufcnt += (padlen + 16) as u32; + } +} + +/// Load IV words into the digest buffer using native-endian byte order. +/// +/// Mirrors `aspeed-rust` `copy_iv_to_digest`: reinterprets each `u32` IV word +/// as its native-endian byte sequence and writes it into `digest`. +pub(crate) fn load_iv(digest: &mut [u8], iv_words: &[u32]) -> Result<(), HaceError> { + if digest.len() != iv_words.len() * 4 { + return Err(HaceError::InvalidInput); + } + + // Index-based copy (no `chunks_exact`): the `ChunksExact` iterator stores its + // chunk size as a runtime field, so zipping it makes the optimizer emit a + // `len / chunk_size` division it cannot prove is non-zero (a `div_by_zero` + // panic path). Iterating word-by-word with a const stride and a length-proven + // `&mut [u8; 4]` keeps the copy panic-free. + for (i, word) in iv_words.iter().enumerate() { + let off = i * 4; + if let Some(dst) = digest.get_mut(off..off + 4) { + if let Ok(dst) = <&mut [u8; 4]>::try_from(dst) { + *dst = word.to_ne_bytes(); + } + } + } + + Ok(()) +} diff --git a/target/ast10x0/peripherals/hace/hmac.rs b/target/ast10x0/peripherals/hace/hmac.rs new file mode 100644 index 00000000..72c92de3 --- /dev/null +++ b/target/ast10x0/peripherals/hace/hmac.rs @@ -0,0 +1,308 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Software RFC-2104 HMAC over the HACE SHA-2 hasher. +//! +//! Per `plans/goal.md` §2.1 / §3 item 2, HMAC is **not** the engine-native +//! `aspeed_hash_*_hmac` path: it is implemented in software as +//! `H((K0 ^ opad) ‖ H((K0 ^ ipad) ‖ msg))` on top of the already +//! parity-verified [`HaceDigest`] digest path. The key-reduction threshold is +//! the RFC-2104-correct, algorithm-dependent `key_len > block_size` (64 for +//! SHA-256, 128 for SHA-384/512) — *not* `aspeed-rust`'s flat `>128`. +//! +//! One-shot, like the authoritative model (goal.md §1.7: "HMAC — NOT +//! streaming"). Each sub-hash runs through the verified public [`HaceDigest`] +//! path (`HaceDevice` → `from_device` → `DigestInit`). +//! +//! Key reduction always copies the raw key bytes through a `.ram_nc` staging +//! buffer before DMA, ensuring the HACE engine reads from non-cacheable SRAM +//! regardless of where the caller allocated the `HmacKey` (mirrors +//! aspeed-rust's `hash_key` strategy). +//! +//! Correctness authority: published RFC-4231 known-answer vectors (§2.1). + +use super::device::HaceDevice; +use super::digest::HaceDigest; +use super::error::HaceError; +use core::marker::PhantomData; +use openprot_hal_blocking::digest::scoped::{DigestInit, DigestOp}; +use openprot_hal_blocking::digest::{Digest, Sha2_256, Sha2_384, Sha2_512}; +use openprot_hal_blocking::mac::scoped::{MacInit, MacOp}; +use openprot_hal_blocking::mac::{ + ErrorType as MacErrorType, HmacSha2_256, HmacSha2_384, HmacSha2_512, KeyHandle, +}; + +/// Maximum HMAC key length accepted by [`HmacKey`]. Sized to cover the longest +/// RFC-4231 vector (131 B, case 6/7); keys longer than the algorithm's block +/// size are reduced via `H(K)` anyway, so larger values buy nothing except +/// stack pressure. +pub const HMAC_KEY_CAP: usize = 131; + +/// Largest HMAC message accepted (one-shot, like the authoritative model). +pub const HMAC_MSG_CAP: usize = 1024; + +// ----- DMA-safe HMAC working buffers ---------------------------------------- +// +// All large HMAC buffers live in a single `.ram_nc` static so they are never +// on the stack. This is critical: `run_hace_sha2_kats` runs many back-to-back +// HMAC operations in a single stack frame; each `HaceHmacCtx` previously +// carried 256+ bytes of `ipad`/`opad` and 1024 bytes of `msg`, causing stack +// overflows (HardFault lockup) by rfc4231-3. With all big buffers here, +// `HaceHmacCtx` is just three scalars (~20 bytes) on the stack. +// +// Safety contract: only one HMAC operation is live at a time (the +// single-instance/non-reentrant `HaceDevice` contract). `init()` zeroes all +// fields before starting a new operation. +struct HmacNcBufs { + key: core::cell::UnsafeCell<[u8; HMAC_KEY_CAP]>, + ipad: core::cell::UnsafeCell<[u8; 128]>, + opad: core::cell::UnsafeCell<[u8; 128]>, + msg: core::cell::UnsafeCell<[u8; HMAC_MSG_CAP]>, +} +// SAFETY: single-threaded HACE driver; non-reentrant `HaceDevice` contract +// serialises all HMAC operations. +unsafe impl Sync for HmacNcBufs {} + +#[unsafe(link_section = ".ram_nc")] +static HMAC_NC: HmacNcBufs = HmacNcBufs { + key: core::cell::UnsafeCell::new([0u8; HMAC_KEY_CAP]), + ipad: core::cell::UnsafeCell::new([0u8; 128]), + opad: core::cell::UnsafeCell::new([0u8; 128]), + msg: core::cell::UnsafeCell::new([0u8; HMAC_MSG_CAP]), +}; + +/// Run one full digest of `$input` via the verified public path, yielding the +/// algorithm's `Digest`. Used for all three HMAC sub-hashes so HMAC rides +/// exactly the digest path the KAT suite covers. +macro_rules! one_shot { + ($inner:ty, $algo:expr, $pb:expr, $input:expr) => {{ + // SAFETY: the whole HACE driver is single-threaded / non-reentrant; + // the HMAC controller upholds that contract for its sub-hashes. + let dev = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + let mut dev = dev.with_timeout_polls($pb); + // SAFETY: same single-threaded exclusivity contract. + let mut dd = unsafe { HaceDigest::<$inner>::from_device(&mut dev) }; + let mut op = dd.init($algo)?; + op.update($input)?; + op.finalize()? + }}; +} + +/// Owned, bounded HMAC key handle. Variable length up to [`HMAC_KEY_CAP`]. +#[derive(Clone)] +pub struct HmacKey { + bytes: [u8; HMAC_KEY_CAP], + len: usize, +} + +impl HmacKey { + /// Build a key from a byte slice. + /// + /// Returns [`HaceError::InvalidInput`] if `key.len() > HMAC_KEY_CAP`. + pub fn from_slice(key: &[u8]) -> Result { + if key.len() > HMAC_KEY_CAP { + return Err(HaceError::InvalidInput); + } + let mut bytes = [0u8; HMAC_KEY_CAP]; + if let Some(dst) = bytes.get_mut(..key.len()) { + for (d, s) in dst.iter_mut().zip(key.iter()) { + *d = *s; + } + } + Ok(Self { + bytes, + len: key.len(), + }) + } + + #[inline] + fn as_slice(&self) -> &[u8] { + self.bytes.get(..self.len).unwrap_or(&[]) + } +} + +impl KeyHandle for HmacKey {} + +/// HMAC controller. Holds only the poll budget; each sub-hash binds the +/// singleton HACE through the standard [`HaceDevice`] path. +pub struct HaceHmac { + poll_budget: u32, +} + +impl HaceHmac { + pub(crate) fn new(poll_budget: u32) -> Self { + Self { poll_budget } + } + + /// Construct an HMAC controller from a [`super::device::HaceDevice`]. + /// + /// # Safety + /// Caller must ensure no concurrent or reentrant HACE access for the + /// lifetime of HMAC operations created from this controller. + pub unsafe fn from_device(device: &mut super::device::HaceDevice) -> Self { + Self::new(device.poll_budget) + } +} + +impl MacErrorType for HaceHmac { + type Error = HaceError; +} + +/// In-flight HMAC operation. All large buffers (ipad, opad, key, msg) live in +/// the `.ram_nc` static `HMAC_NC`; this struct holds only the scalars needed +/// to drive `finalize()` (~20 bytes on the stack). +pub struct HaceHmacCtx { + msg_len: usize, + poll_budget: u32, + _inner: PhantomData, +} + +impl MacErrorType for HaceHmacCtx { + type Error = HaceError; +} + +macro_rules! hmac_variant { + ($mac:ty, $inner:ty, $algo:expr, $b:expr, $nw:expr) => { + impl MacInit<$mac> for HaceHmac { + type Key = HmacKey; + type OpContext<'a> + = HaceHmacCtx<$inner> + where + Self: 'a; + + fn init<'a>( + &'a mut self, + _algo: $mac, + key: HmacKey, + ) -> Result, HaceError> { + let pb = self.poll_budget; + let k = key.as_slice(); + + // K0: key reduced to <= block_size, then zero-padded to block. + // RFC-2104-correct threshold: reduce only when len > block_size. + let mut k0 = [0u8; 128]; + if k.len() > $b { + // Copy the raw key into the .ram_nc staging buffer so that + // the HACE DMA engine reads from non-cacheable SRAM. + let key_nc: &[u8] = unsafe { + let buf = &mut *HMAC_NC.key.get(); + if let Some(dst) = buf.get_mut(..k.len()) { + for (d, s) in dst.iter_mut().zip(k.iter()) { + *d = *s; + } + } + buf.get(..k.len()).unwrap_or(&[]) + }; + let kh = one_shot!($inner, $algo, pb, key_nc); + let hb = kh.as_bytes(); + if let Some(dst) = k0.get_mut(..hb.len()) { + for (d, s) in dst.iter_mut().zip(hb.iter()) { + *d = *s; + } + } + } else { + if let Some(dst) = k0.get_mut(..k.len()) { + for (d, s) in dst.iter_mut().zip(k.iter()) { + *d = *s; + } + } + } + + // Build ipad/opad in .ram_nc directly. + // SAFETY: non-reentrant contract — exclusive access guaranteed. + unsafe { + let ipad = &mut *HMAC_NC.ipad.get(); + let opad = &mut *HMAC_NC.opad.get(); + ipad.iter_mut() + .zip(k0.iter()) + .take($b) + .for_each(|(d, s)| *d = *s ^ 0x36); + opad.iter_mut() + .zip(k0.iter()) + .take($b) + .for_each(|(d, s)| *d = *s ^ 0x5c); + if let Some(rest) = ipad.get_mut($b..) { + rest.fill(0); + } + if let Some(rest) = opad.get_mut($b..) { + rest.fill(0); + } + (*HMAC_NC.msg.get()).fill(0); + } + + Ok(HaceHmacCtx { + msg_len: 0, + poll_budget: pb, + _inner: PhantomData, + }) + } + } + + impl MacOp for HaceHmacCtx<$inner> { + type Output = Digest<$nw>; + + fn update(&mut self, input: &[u8]) -> Result<(), HaceError> { + let end = self + .msg_len + .checked_add(input.len()) + .ok_or(HaceError::InvalidInput)?; + if end > HMAC_MSG_CAP { + return Err(HaceError::InvalidInput); + } + // SAFETY: non-reentrant HMAC contract guarantees exclusive + // access to HMAC_NC.msg for the lifetime of this operation. + let buf = unsafe { &mut *HMAC_NC.msg.get() }; + // zip-copy: dst.len() == input.len() holds because the range is + // [msg_len..end] where end = msg_len + input.len(), but the + // compiler cannot prove that through get_mut, so copy_from_slice + // would retain a len_mismatch_fail branch. zip stops at the + // shorter side, making this provably panic-free. + if let Some(dst) = buf.get_mut(self.msg_len..end) { + for (d, s) in dst.iter_mut().zip(input.iter()) { + *d = *s; + } + } + self.msg_len = end; + Ok(()) + } + + fn finalize(self) -> Result { + let pb = self.poll_budget; + + // inner = H(K0^ipad ‖ msg) + // Feed ipad and msg via two update() calls — both sourced from + // HMAC_NC (.ram_nc), so DMA-safe without any extra copy. + let inner = { + let dev = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + let mut dev = dev.with_timeout_polls(pb); + let mut dd = unsafe { HaceDigest::<$inner>::from_device(&mut dev) }; + let mut op = dd.init($algo)?; + // SAFETY: HMAC_NC is exclusively owned by this operation. + let ipad = unsafe { &*HMAC_NC.ipad.get() }; + op.update(ipad.get(..$b).unwrap_or(&[]))?; + let msg = unsafe { &*HMAC_NC.msg.get() }; + op.update(msg.get(..self.msg_len).ok_or(HaceError::InvalidInput)?)?; + op.finalize()? + }; + let inner_bytes = inner.as_bytes(); + + // outer = H(K0^opad ‖ inner) + let dev = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + let mut dev = dev.with_timeout_polls(pb); + let mut dd = unsafe { HaceDigest::<$inner>::from_device(&mut dev) }; + let mut op = dd.init($algo)?; + // SAFETY: HMAC_NC is exclusively owned by this operation. + let opad = unsafe { &*HMAC_NC.opad.get() }; + op.update(opad.get(..$b).unwrap_or(&[]))?; + op.update(inner_bytes)?; + op.finalize() + } + } + }; +} + +// Block sizes / output words: SHA-256 -> 64 B block, 8 words (32 B); +// SHA-384 -> 128 B, 12 words (48 B); SHA-512 -> 128 B, 16 words (64 B). +hmac_variant!(HmacSha2_256, Sha2_256, Sha2_256, 64, 8); +hmac_variant!(HmacSha2_384, Sha2_384, Sha2_384, 128, 12); +hmac_variant!(HmacSha2_512, Sha2_512, Sha2_512, 128, 16); diff --git a/target/ast10x0/peripherals/hace/mod.rs b/target/ast10x0/peripherals/hace/mod.rs new file mode 100644 index 00000000..a892337f --- /dev/null +++ b/target/ast10x0/peripherals/hace/mod.rs @@ -0,0 +1,21 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! AST10x0 HACE (Hash and Crypto Engine) peripheral support. + +mod aes; +mod constants; +mod context; +mod device; +mod digest; +mod error; +mod helpers; +mod hmac; +mod registers; + +pub use aes::{AesCipher, AesKey, AesOp, AesSkin, Cbc, Ecb, AES_BLOCK}; +pub use device::{HaceDevice, HashAlgo}; +pub use digest::HaceDigest; +pub use error::HaceError; +pub use hmac::{HaceHmac, HaceHmacCtx, HmacKey, HMAC_KEY_CAP}; +pub use registers::HaceRegisters; diff --git a/target/ast10x0/peripherals/hace/registers.rs b/target/ast10x0/peripherals/hace/registers.rs new file mode 100644 index 00000000..34a50681 --- /dev/null +++ b/target/ast10x0/peripherals/hace/registers.rs @@ -0,0 +1,146 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! AST10x0 HACE low-level register access. + +use core::marker::PhantomData; + +use ast1060_pac as device; + +/// Safe wrapper around the AST10x0 HACE register block. +#[derive(Copy, Clone)] +pub struct HaceRegisters { + ptr: *mut device::hace::RegisterBlock, + _not_send: PhantomData<*mut ()>, +} + +impl HaceRegisters { + /// Create a register accessor from a raw HACE register block pointer. + /// + /// # Safety + /// Caller must ensure: + /// - `base` points to a valid HACE register block. + /// - access to the HACE instance is serialized appropriately. + pub const unsafe fn new(base: *const device::hace::RegisterBlock) -> Self { + Self { + ptr: base as *mut device::hace::RegisterBlock, + _not_send: PhantomData, + } + } + + /// Create a register accessor for the global HACE instance. + /// + /// # Safety + /// Caller must ensure access to the singleton HACE is coordinated. + pub const unsafe fn new_global() -> Self { + // SAFETY: Caller upholds the singleton access contract. + unsafe { Self::new(device::Hace::ptr()) } + } + + #[inline] + pub(crate) fn regs(&self) -> &device::hace::RegisterBlock { + // SAFETY: Constructor guarantees a valid HACE register block pointer. + unsafe { &*self.ptr } + } + + #[inline] + pub(crate) fn clear_hash_intflag(&self) { + self.regs().hace1c().write(|w| w.hash_intflag().set_bit()); + } + + #[inline] + pub(crate) fn hash_intflag_is_set(&self) -> bool { + self.regs().hace1c().read().hash_intflag().bit_is_set() + } + + /// Returns `true` while the hash engine is actively processing (HACE1C bit 0). + /// Used to drain any in-progress bootloader operation before starting our own. + #[inline] + pub(crate) fn hash_engine_is_busy(&self) -> bool { + self.regs().hace1c().read().hash_eng_sts_flag().bit_is_set() + } + + #[inline] + pub(crate) fn program_hash_operation( + &self, + src_addr: u32, + digest_addr: u32, + data_len: u32, + cmd: u32, + ) { + // SAFETY: Callers provide HACE-usable physical addresses and a valid command. + self.regs().hace20().write(|w| unsafe { w.bits(src_addr) }); + self.regs() + .hace24() + .write(|w| unsafe { w.bits(digest_addr) }); + self.regs() + .hace28() + .write(|w| unsafe { w.bits(digest_addr) }); + self.regs().hace2c().write(|w| unsafe { w.bits(data_len) }); + self.regs().hace30().write(|w| unsafe { w.bits(cmd) }); + } + + #[inline] + pub(crate) fn stop_hash_operation(&self) { + // SAFETY: Writing 0 to command register is the defined idle/stop state. + self.regs().hace30().write(|w| unsafe { w.bits(0) }); + } + + // ----- Crypto (AES) sub-engine ----------------------------------------- + // + // The HACE engine's symmetric-crypto path uses a distinct register file + // from the hash path (HACE00/04/08/0C/10) and a distinct completion bit + // in the shared status register HACE1C (`crypto_intflag`). Driven in the + // exact order of the pinned authority `crypto_trigger` + // (`zephyr-reference/hace_aspeed.c:88-94`; goal.md §1.9.1). + // + // Note: the authority also gates on a HW busy bit + // (`hace_sts.crypto_engine_sts`, `hace_aspeed.c:83`). The port deliberately + // does **not** read it — engine exclusivity is structural (one owned + // `HaceDevice`, borrow-arbitrated), goal.md §2.3 delta A1 / the + // `borrow-arbitrated-engine-exclusivity` pattern. No busy-bit accessor is + // exposed here, by design. + + #[inline] + pub(crate) fn clear_crypto_intflag(&self) { + self.regs().hace1c().write(|w| w.crypto_intflag().set_bit()); + } + + #[inline] + + pub(crate) fn crypto_intflag_is_set(&self) -> bool { + self.regs().hace1c().read().crypto_intflag().bit_is_set() + } + + /// Read the raw HACE1C status register value (for diagnostics). + #[inline] + pub(crate) fn read_hace1c(&self) -> u32 { + self.regs().hace1c().read().bits() + } + + /// Program one crypto (AES) pass and start the engine. + /// + /// Writes, in authority order: source data address (HACE00), destination + /// data address (HACE04), crypto context base (HACE08), data length + /// (HACE0C), then the command word (HACE10) — the final write starts the + /// engine. The SG-terminator (`| 1<<31`) lives in the `src`/`dst` length + /// words inside the crypto context (goal.md §1.9.3), not here; `data_len` + /// is the plain byte length the engine consumes. + #[inline] + pub(crate) fn program_crypto_operation( + &self, + src_addr: u32, + dst_addr: u32, + ctx_base: u32, + data_len: u32, + cmd: u32, + ) { + // SAFETY: Callers provide HACE-usable physical addresses and a valid + // command word composed per goal.md §1.9.2. + self.regs().hace00().write(|w| unsafe { w.bits(src_addr) }); + self.regs().hace04().write(|w| unsafe { w.bits(dst_addr) }); + self.regs().hace08().write(|w| unsafe { w.bits(ctx_base) }); + self.regs().hace0c().write(|w| unsafe { w.bits(data_len) }); + self.regs().hace10().write(|w| unsafe { w.bits(cmd) }); + } +} diff --git a/target/ast10x0/peripherals/i3c/ccc.rs b/target/ast10x0/peripherals/i3c/ccc.rs new file mode 100644 index 00000000..e2cbf997 --- /dev/null +++ b/target/ast10x0/peripherals/i3c/ccc.rs @@ -0,0 +1,850 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! I3C Common Command Codes (CCC) +//! +//! Functions and types for executing I3C CCCs. + +use super::config::{DaState, I3cConfig, IbiState}; +use super::constants::{ + I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE, I3C_CCC_GETBCR, I3C_CCC_GETDCR, I3C_CCC_GETMRL, + I3C_CCC_GETMWL, I3C_CCC_GETMXDS, I3C_CCC_GETPID, I3C_CCC_GETSTATUS, I3C_CCC_RSTDAA, + I3C_CCC_SETMRL, I3C_CCC_SETMRL_BC, I3C_CCC_SETMWL, I3C_CCC_SETMWL_BC, I3C_CCC_SETNEWDA, +}; +use super::error::{CccErrorKind, I3cError}; +use super::hardware::HardwareInterface; +use super::types::DevKind; + +// ============================================================================= +// CCC Types +// ============================================================================= + +/// CCC target payload for direct CCCs +#[derive(Debug)] +pub struct CccTargetPayload<'a> { + /// Target 7-bit dynamic address + pub addr: u8, + /// `false` = write, `true` = read + pub rnw: bool, + /// Data buffer for write (source) or read (destination) + pub data: Option<&'a mut [u8]>, + /// Actual bytes transferred (driver fills on return) + pub num_xfer: usize, +} + +/// CCC descriptor +#[derive(Debug)] +pub struct Ccc<'a> { + /// CCC ID (command code) + pub id: u8, + /// Optional CCC data immediately following the CCC byte + pub data: Option<&'a mut [u8]>, + /// Actual bytes transferred (driver fills on return) + pub num_xfer: usize, +} + +/// Complete CCC transaction description +#[derive(Debug)] +pub struct CccPayload<'a, 'b> { + /// The CCC command + pub ccc: Option>, + /// Optional list of direct-CCC target payloads + pub targets: Option<&'b mut [CccTargetPayload<'a>]>, +} + +// ============================================================================= +// CCC Reset Action +// ============================================================================= + +/// RSTACT defining byte values +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +pub enum CccRstActDefByte { + /// No reset + NoReset = 0x0, + /// Reset peripheral only + PeriphralOnly = 0x1, + /// Reset whole target + ResetWholeTarget = 0x2, + /// Debug network adapter + DebugNetworkAdapter = 0x3, + /// Virtual target detect + VirtualTargetDetect = 0x4, +} + +impl CccRstActDefByte { + #[inline] + fn as_byte(self) -> u8 { + self as u8 + } +} + +// ============================================================================= +// GETSTATUS Types +// ============================================================================= + +/// GETSTATUS format selection +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +pub enum GetStatusFormat { + /// Format 1 (no defining byte) + Fmt1, + /// Format 2 (with defining byte) + Fmt2(GetStatusDefByte), +} + +/// GETSTATUS defining byte values +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +pub enum GetStatusDefByte { + /// 0x00 - TGTSTAT + TgtStat, + /// 0x91 - PRECR + Precr, +} + +impl GetStatusDefByte { + #[inline] + fn as_byte(self) -> u8 { + match self { + Self::TgtStat => 0x00, + Self::Precr => 0x91, + } + } +} + +/// GETSTATUS response +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +pub enum GetStatusResp { + /// Format 1 response + Fmt1 { status: u16 }, + /// Format 2 response + Fmt2 { + kind: GetStatusDefByte, + raw_u16: u16, + }, +} + +// ============================================================================= +// CCC Helper Functions +// ============================================================================= + +const fn ccc_enec(broadcast: bool) -> u8 { + if broadcast { + 0x00 + } else { + 0x80 + } +} + +const fn ccc_disec(broadcast: bool) -> u8 { + if broadcast { + 0x01 + } else { + 0x81 + } +} + +const fn ccc_rstact(broadcast: bool) -> u8 { + if broadcast { + 0x2a + } else { + 0x9a + } +} + +// ============================================================================= +// CCC Operations +// ============================================================================= + +/// Preserve errors with ambiguous bus-side effects. +fn map_ccc_err(e: I3cError) -> I3cError { + match e { + I3cError::Timeout | I3cError::RespError | I3cError::IoError | I3cError::AddressNack => e, + _ => I3cError::CccError(CccErrorKind::Invalid), + } +} + +fn mark_setnewda_unknown(config: &mut I3cConfig, dev_idx: usize, new_da: u8) { + config.mark_da_unknown(dev_idx, Some(new_da)); + if let Some(dev) = config.attached.devices.get_mut(dev_idx) { + dev.ibi_state = IbiState::Unknown; + } +} + +/// Enable/disable events for all devices (broadcast) +pub fn ccc_events_all_set( + hw: &mut H, + config: &mut I3cConfig, + enable: bool, + events: u8, +) -> Result<(), I3cError> +where + H: HardwareInterface, +{ + // SIR changes require per-device DAT updates. + if events & super::constants::I3C_CCC_EVT_INTR != 0 { + return Err(I3cError::Access); + } + + let id = if enable { + ccc_enec(true) + } else { + ccc_disec(true) + }; + + hw.do_ccc( + config, + &mut CccPayload { + ccc: Some(Ccc { + id, + data: Some(&mut [events]), + num_xfer: 0, + }), + targets: None, + }, + ) + .map_err(map_ccc_err) +} + +/// Enable/disable events for a specific device (direct) +pub fn ccc_events_set( + hw: &mut H, + config: &mut I3cConfig, + da: u8, + enable: bool, + events: u8, +) -> Result<(), I3cError> +where + H: HardwareInterface, +{ + if da == 0 { + return Err(I3cError::CccError(CccErrorKind::InvalidParam)); + } + + let mut ev_buf = [events]; + let tgt = CccTargetPayload { + addr: da, + rnw: false, + data: Some(&mut ev_buf[..]), + num_xfer: 0, + }; + + let mut tgts = [tgt]; + let ccc_id = if enable { + ccc_enec(false) + } else { + ccc_disec(false) + }; + let ccc = Ccc { + id: ccc_id, + data: None, + num_xfer: 0, + }; + + let mut payload = CccPayload { + ccc: Some(ccc), + targets: Some(&mut tgts[..]), + }; + + hw.do_ccc(config, &mut payload).map_err(map_ccc_err) +} + +/// Execute RSTACT (Reset Action) broadcast +pub fn ccc_rstact_all( + hw: &mut H, + config: &mut I3cConfig, + action: CccRstActDefByte, +) -> Result<(), I3cError> +where + H: HardwareInterface, +{ + let mut db = [action.as_byte()]; + let ccc = Ccc { + id: ccc_rstact(true), + data: Some(&mut db[..]), + num_xfer: 0, + }; + let mut payload = CccPayload { + ccc: Some(ccc), + targets: None, + }; + + hw.do_ccc(config, &mut payload).map_err(map_ccc_err) +} + +/// Get BCR (Bus Characteristics Register) from a device +pub fn ccc_getbcr(hw: &mut H, config: &mut I3cConfig, dyn_addr: u8) -> Result +where + H: HardwareInterface, +{ + if dyn_addr == 0 { + return Err(I3cError::CccError(CccErrorKind::InvalidParam)); + } + + let mut bcr_buf = [0u8; 1]; + + let tgt = CccTargetPayload { + addr: dyn_addr, + rnw: true, + data: Some(&mut bcr_buf[..]), + num_xfer: 0, + }; + let mut tgts = [tgt]; + + let ccc = Ccc { + id: I3C_CCC_GETBCR, + data: None, + num_xfer: 0, + }; + let mut payload = CccPayload { + ccc: Some(ccc), + targets: Some(&mut tgts[..]), + }; + + hw.do_ccc(config, &mut payload).map_err(map_ccc_err)?; + + Ok(bcr_buf[0]) +} + +/// Get DCR (Device Characteristics Register) from a device +pub fn ccc_getdcr(hw: &mut H, config: &mut I3cConfig, dyn_addr: u8) -> Result +where + H: HardwareInterface, +{ + if dyn_addr == 0 { + return Err(I3cError::CccError(CccErrorKind::InvalidParam)); + } + + let mut dcr_buf = [0u8; 1]; + + let tgt = CccTargetPayload { + addr: dyn_addr, + rnw: true, + data: Some(&mut dcr_buf[..]), + num_xfer: 0, + }; + let mut tgts = [tgt]; + + let ccc = Ccc { + id: I3C_CCC_GETDCR, + data: None, + num_xfer: 0, + }; + let mut payload = CccPayload { + ccc: Some(ccc), + targets: Some(&mut tgts[..]), + }; + + hw.do_ccc(config, &mut payload).map_err(map_ccc_err)?; + + Ok(dcr_buf[0]) +} + +/// Send SETNEWDA without changing bookkeeping or DAT state. +pub(crate) fn ccc_setnewda_bus_only( + hw: &mut H, + config: &mut I3cConfig, + curr_da: u8, + new_da: u8, +) -> Result<(), I3cError> +where + H: HardwareInterface, +{ + // Reject addresses that would be truncated on the bus. + if curr_da == 0 || new_da == 0 || new_da >= super::constants::I3C_BROADCAST_ADDR { + return Err(I3cError::CccError(CccErrorKind::InvalidParam)); + } + + let mut new_dyn_addr = (new_da & 0x7F) << 1; + let tgt = CccTargetPayload { + addr: curr_da, + rnw: false, + data: Some(core::slice::from_mut(&mut new_dyn_addr)), + num_xfer: 0, + }; + let mut tgts = [tgt]; + let ccc = Ccc { + id: I3C_CCC_SETNEWDA, + data: None, + num_xfer: 0, + }; + let mut payload = CccPayload { + ccc: Some(ccc), + targets: Some(&mut tgts[..]), + }; + + hw.do_ccc(config, &mut payload).map_err(map_ccc_err) +} + +/// Set new dynamic address for a device +pub fn ccc_setnewda( + hw: &mut H, + config: &mut I3cConfig, + curr_da: u8, + new_da: u8, +) -> Result<(), I3cError> +where + H: HardwareInterface, +{ + let Some(dev_idx) = config.attached.find_dev_idx_by_addr(curr_da) else { + return Err(I3cError::CccError(CccErrorKind::NotFound)); + }; + let Some(dev) = config.attached.devices.get(dev_idx) else { + return Err(I3cError::CccError(CccErrorKind::NotFound)); + }; + if dev.kind != DevKind::I3c || dev.da_state != DaState::Verified { + return Err(I3cError::Access); + } + let Some(pos) = config.attached.pos_of(dev_idx) else { + return Err(I3cError::CccError(CccErrorKind::NotFound)); + }; + let ibi_was_enabled = config + .attached + .devices + .iter() + .find(|dev| dev.dyn_addr == curr_da) + .is_some_and(|dev| dev.ibi_state == IbiState::Enabled); + + // Check reservations before sending SETNEWDA. + if new_da != curr_da && !config.addrbook.is_free(new_da) { + return Err(I3cError::CccError(CccErrorKind::NoFreeSlot)); + } + + if let Err(e) = ccc_setnewda_bus_only(hw, config, curr_da, new_da) { + if matches!(e, I3cError::Timeout | I3cError::RespError) { + // The target may have moved despite the error. + mark_setnewda_unknown(config, dev_idx, new_da); + } + return Err(e); + } + + // Reprogram DAT before committing bookkeeping. + if hw.attach_i3c_dev(pos.into(), new_da).is_err() { + // The target moved but DAT did not; block further transfers. + mark_setnewda_unknown(config, dev_idx, new_da); + hw.mark_xfer_faulted(); + return Err(I3cError::CccError(CccErrorKind::Invalid)); + } + + // Commit the move and restore IBI state if needed. + if config.reassign_da(curr_da, new_da).is_err() { + // Bus and DAT moved but bookkeeping did not. + mark_setnewda_unknown(config, dev_idx, new_da); + hw.mark_xfer_faulted(); + return Err(I3cError::CccError(CccErrorKind::Invalid)); + } + + if ibi_was_enabled { + let result = hw.ibi_enable(config, new_da); + if let Some(dev) = config + .attached + .devices + .iter_mut() + .find(|dev| dev.dyn_addr == new_da) + { + dev.ibi_state = match result { + Ok(()) => IbiState::Enabled, + Err(I3cError::Timeout | I3cError::RespError) => IbiState::Unknown, + Err(_) => IbiState::Disabled, + }; + } + result.map_err(map_ccc_err)?; + } + Ok(()) +} + +/// Send a direct write CCC with a small fixed payload. +fn ccc_direct_write( + hw: &mut H, + config: &mut I3cConfig, + id: u8, + da: u8, + payload: &mut [u8], +) -> Result<(), I3cError> +where + H: HardwareInterface, +{ + if da == 0 { + return Err(I3cError::CccError(CccErrorKind::InvalidParam)); + } + let tgt = CccTargetPayload { + addr: da, + rnw: false, + data: Some(payload), + num_xfer: 0, + }; + let mut tgts = [tgt]; + let mut p = CccPayload { + ccc: Some(Ccc { + id, + data: None, + num_xfer: 0, + }), + targets: Some(&mut tgts[..]), + }; + hw.do_ccc(config, &mut p).map_err(map_ccc_err) +} + +/// Send a direct read CCC into a small fixed buffer. +fn ccc_direct_read( + hw: &mut H, + config: &mut I3cConfig, + id: u8, + da: u8, + out: &mut [u8], +) -> Result<(), I3cError> +where + H: HardwareInterface, +{ + if da == 0 { + return Err(I3cError::CccError(CccErrorKind::InvalidParam)); + } + let tgt = CccTargetPayload { + addr: da, + rnw: true, + data: Some(out), + num_xfer: 0, + }; + let mut tgts = [tgt]; + let mut p = CccPayload { + ccc: Some(Ccc { + id, + data: None, + num_xfer: 0, + }), + targets: Some(&mut tgts[..]), + }; + hw.do_ccc(config, &mut p).map_err(map_ccc_err) +} + +/// Set Maximum Write Length for a device (direct SETMWL); mirrors the value +/// into the attached-device entry on success. +pub fn ccc_setmwl(hw: &mut H, config: &mut I3cConfig, da: u8, mwl: u16) -> Result<(), I3cError> +where + H: HardwareInterface, +{ + let mut payload = mwl.to_be_bytes(); + ccc_direct_write(hw, config, I3C_CCC_SETMWL, da, &mut payload)?; + if let Some(idx) = config.attached.find_dev_idx_by_addr(da) + && let Some(dev) = config.attached.devices.get_mut(idx) + { + dev.mwl = mwl; + } + Ok(()) +} + +/// Set Maximum Read Length for a device (direct SETMRL). `ibi_len` adds the +/// optional third byte (max IBI payload size) for targets whose BCR +/// advertises an IBI payload. Mirrors the values into the attached-device +/// entry on success. +pub fn ccc_setmrl( + hw: &mut H, + config: &mut I3cConfig, + da: u8, + mrl: u16, + ibi_len: Option, +) -> Result<(), I3cError> +where + H: HardwareInterface, +{ + let be = mrl.to_be_bytes(); + let mut buf3 = [be[0], be[1], 0]; + let payload: &mut [u8] = match ibi_len { + Some(n) => { + buf3[2] = n; + &mut buf3[..3] + } + None => &mut buf3[..2], + }; + ccc_direct_write(hw, config, I3C_CCC_SETMRL, da, payload)?; + if let Some(idx) = config.attached.find_dev_idx_by_addr(da) + && let Some(dev) = config.attached.devices.get_mut(idx) + { + dev.mrl = mrl; + if let Some(n) = ibi_len { + dev.max_ibi = n; + } + } + Ok(()) +} + +/// Broadcast SETMWL to all devices. +pub fn ccc_setmwl_all(hw: &mut H, config: &mut I3cConfig, mwl: u16) -> Result<(), I3cError> +where + H: HardwareInterface, +{ + let mut payload = mwl.to_be_bytes(); + hw.do_ccc( + config, + &mut CccPayload { + ccc: Some(Ccc { + id: I3C_CCC_SETMWL_BC, + data: Some(&mut payload[..]), + num_xfer: 0, + }), + targets: None, + }, + ) + .map_err(map_ccc_err)?; + + for dev in &mut config.attached.devices { + if dev.kind == DevKind::I3c { + dev.mwl = mwl; + } + } + Ok(()) +} + +/// Broadcast SETMRL to all devices. +pub fn ccc_setmrl_all( + hw: &mut H, + config: &mut I3cConfig, + mrl: u16, + ibi_len: Option, +) -> Result<(), I3cError> +where + H: HardwareInterface, +{ + let be = mrl.to_be_bytes(); + let mut buf3 = [be[0], be[1], 0]; + let payload: &mut [u8] = match ibi_len { + Some(n) => { + buf3[2] = n; + &mut buf3[..3] + } + None => &mut buf3[..2], + }; + hw.do_ccc( + config, + &mut CccPayload { + ccc: Some(Ccc { + id: I3C_CCC_SETMRL_BC, + data: Some(payload), + num_xfer: 0, + }), + targets: None, + }, + ) + .map_err(map_ccc_err)?; + + for dev in &mut config.attached.devices { + if dev.kind == DevKind::I3c { + dev.mrl = mrl; + if let Some(n) = ibi_len { + dev.max_ibi = n; + } + } + } + Ok(()) +} + +/// Get Maximum Write Length from a device (GETMWL); mirrors the value into +/// the attached-device entry. +pub fn ccc_getmwl(hw: &mut H, config: &mut I3cConfig, da: u8) -> Result +where + H: HardwareInterface, +{ + let mut buf = [0u8; 2]; + ccc_direct_read(hw, config, I3C_CCC_GETMWL, da, &mut buf)?; + let mwl = u16::from_be_bytes(buf); + if let Some(idx) = config.attached.find_dev_idx_by_addr(da) + && let Some(dev) = config.attached.devices.get_mut(idx) + { + dev.mwl = mwl; + } + Ok(mwl) +} + +/// Get Maximum Read Length from a device (GETMRL). +/// +/// Returns `(mrl, max_ibi_len)`; the third response byte is present only for +/// targets whose BCR advertises an IBI payload (the attached entry's BCR +/// decides how many bytes are requested). Mirrors the values into the +/// attached-device entry. +pub fn ccc_getmrl( + hw: &mut H, + config: &mut I3cConfig, + da: u8, +) -> Result<(u16, Option), I3cError> +where + H: HardwareInterface, +{ + let has_ibi_byte = config + .attached + .find_dev_idx_by_addr(da) + .and_then(|idx| config.attached.devices.get(idx)) + .map(|d| u32::from(d.bcr) & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE != 0) + .unwrap_or(false); + + let mut buf = [0u8; 3]; + let want = if has_ibi_byte { 3 } else { 2 }; + // `want` is 2 or 3, always within the buffer. + let out = buf.get_mut(..want).ok_or(I3cError::Invalid)?; + ccc_direct_read(hw, config, I3C_CCC_GETMRL, da, out)?; + + let mrl = u16::from_be_bytes([buf[0], buf[1]]); + let ibi_len = has_ibi_byte.then_some(buf[2]); + if let Some(idx) = config.attached.find_dev_idx_by_addr(da) + && let Some(dev) = config.attached.devices.get_mut(idx) + { + dev.mrl = mrl; + if let Some(n) = ibi_len { + dev.max_ibi = n; + } + } + Ok((mrl, ibi_len)) +} + +/// Get Max Data Speed from a device (GETMXDS format 1). +/// +/// Returns `(max_wr, max_rd)` raw speed bytes; mirrored into the +/// attached-device entry. +pub fn ccc_getmxds(hw: &mut H, config: &mut I3cConfig, da: u8) -> Result<(u8, u8), I3cError> +where + H: HardwareInterface, +{ + let mut buf = [0u8; 2]; + ccc_direct_read(hw, config, I3C_CCC_GETMXDS, da, &mut buf)?; + let (max_wr, max_rd) = (buf[0], buf[1]); + if let Some(idx) = config.attached.find_dev_idx_by_addr(da) + && let Some(dev) = config.attached.devices.get_mut(idx) + { + dev.maxwr = max_wr; + dev.maxrd = max_rd; + } + Ok((max_wr, max_rd)) +} + +fn bytes_to_pid(bytes: &[u8]) -> u64 { + bytes + .iter() + .take(6) + .fold(0u64, |acc, &b| (acc << 8) | u64::from(b)) +} + +/// Get PID (Provisional ID) from a device +pub fn ccc_getpid(hw: &mut H, config: &mut I3cConfig, dyn_addr: u8) -> Result +where + H: HardwareInterface, +{ + let mut pid_buf = [0u8; 6]; + + let tgt = CccTargetPayload { + addr: dyn_addr, + rnw: true, + data: Some(&mut pid_buf[..]), + num_xfer: 0, + }; + let mut tgts = [tgt]; + + let ccc = Ccc { + id: I3C_CCC_GETPID, + data: None, + num_xfer: 0, + }; + let mut payload = CccPayload { + ccc: Some(ccc), + targets: Some(&mut tgts[..]), + }; + + hw.do_ccc(config, &mut payload).map_err(map_ccc_err)?; + + Ok(bytes_to_pid(&pid_buf)) +} + +/// Get status from a device +pub fn ccc_getstatus( + hw: &mut H, + config: &mut I3cConfig, + da: u8, + fmt: GetStatusFormat, +) -> Result +where + H: HardwareInterface, +{ + let mut data_buf = [0u8; 2]; + let mut defbyte_buf = [0u8; 1]; + + let tgt = CccTargetPayload { + addr: da, + rnw: true, + data: Some(&mut data_buf[..]), + num_xfer: 0, + }; + + let mut ccc = Ccc { + id: I3C_CCC_GETSTATUS, + data: None, + num_xfer: 0, + }; + + let kind_opt = match fmt { + GetStatusFormat::Fmt1 => None, + GetStatusFormat::Fmt2(kind) => { + defbyte_buf[0] = kind.as_byte(); + ccc.data = Some(&mut defbyte_buf[..]); + Some(kind) + } + }; + + let mut targets_arr = [tgt]; + let mut payload = CccPayload { + ccc: Some(ccc), + targets: Some(&mut targets_arr[..]), + }; + + hw.do_ccc(config, &mut payload).map_err(map_ccc_err)?; + + let val = u16::from_be_bytes(data_buf); + + let resp = match kind_opt { + None => GetStatusResp::Fmt1 { status: val }, + Some(kind) => GetStatusResp::Fmt2 { kind, raw_u16: val }, + }; + Ok(resp) +} + +/// Get status (Format 1) from a device +pub fn ccc_getstatus_fmt1(hw: &mut H, config: &mut I3cConfig, da: u8) -> Result +where + H: HardwareInterface, +{ + match ccc_getstatus(hw, config, da, GetStatusFormat::Fmt1) { + Ok(GetStatusResp::Fmt1 { status }) => Ok(status), + // Fmt1 cannot produce Fmt2. + Ok(GetStatusResp::Fmt2 { .. }) => Err(I3cError::CccError(CccErrorKind::Invalid)), + Err(e) => Err(e), + } +} + +/// Reset dynamic address assignment for all devices (broadcast) +pub fn ccc_rstdaa_all(hw: &mut H, config: &mut I3cConfig) -> Result<(), I3cError> +where + H: HardwareInterface, +{ + let result = hw + .do_ccc( + config, + &mut CccPayload { + ccc: Some(Ccc { + id: I3C_CCC_RSTDAA, + data: None, + num_xfer: 0, + }), + targets: None, + }, + ) + .map_err(map_ccc_err); + + match result { + Ok(()) => { + config.commit_rstdaa(); + Ok(()) + } + Err(e @ (I3cError::Timeout | I3cError::RespError)) => { + // The command may have reached none, some, or all targets. Keep + // every possible owner reserved until a confirmed RSTDAA. + config.mark_rstdaa_unknown(); + Err(e) + } + Err(e) => Err(e), + } +} diff --git a/target/ast10x0/peripherals/i3c/config.rs b/target/ast10x0/peripherals/i3c/config.rs new file mode 100644 index 00000000..ed24c657 --- /dev/null +++ b/target/ast10x0/peripherals/i3c/config.rs @@ -0,0 +1,826 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! I3C configuration types +//! +//! Configuration structures for I3C controller and devices. + +use core::marker::PhantomData; +use heapless::Vec; + +use super::constants::NSEC_PER_SEC; +use super::error::I3cError; +use super::types::DevKind; + +// ============================================================================= +// Target Configuration +// ============================================================================= + +/// Configuration for I3C target mode +pub struct I3cTargetConfig { + /// Target flags + pub flags: u8, + /// Dynamic address assigned by DAA. + pub addr: Option, + /// Static address advertised before DAA. + pub static_addr: Option, + /// Mandatory Data Byte for IBI + pub mdb: u8, +} + +impl I3cTargetConfig { + /// Create a target configuration with no assigned dynamic address. + #[must_use] + pub const fn new(flags: u8, static_addr: Option, mdb: u8) -> Self { + Self { + flags, + addr: None, + static_addr, + mdb, + } + } +} + +// ============================================================================= +// Address Book +// ============================================================================= + +/// Address allocation and tracking for I3C bus +pub struct AddrBook { + /// Bitmap (128 bits) of addresses currently in use. + in_use: [u32; 4], + /// Bitmap (128 bits) of reserved addresses (not available for allocation). + reserved: [u32; 4], +} + +impl AddrBook { + /// Read bit `addr` (0..=127) of a 128-bit map. The `& 3` index keeps this + /// panic-free (provably in `0..4`) for the `no_panics` analysis. + #[inline] + fn bit_get(bits: &[u32; 4], addr: u8) -> bool { + let i = addr as usize; + (bits[(i >> 5) & 3] >> (i & 31)) & 1 != 0 + } + + /// Set/clear bit `addr` (0..=127) of a 128-bit map (panic-free). + #[inline] + fn bit_set(bits: &mut [u32; 4], addr: u8, val: bool) { + let i = addr as usize; + let mask = 1u32 << (i & 31); + if val { + bits[(i >> 5) & 3] |= mask; + } else { + bits[(i >> 5) & 3] &= !mask; + } + } +} + +impl Default for AddrBook { + fn default() -> Self { + Self::new() + } +} + +impl AddrBook { + /// Create a new empty address book + #[must_use] + pub const fn new() -> Self { + Self { + in_use: [0; 4], + reserved: [0; 4], + } + } + + /// Check whether a 7-bit address is free. + #[inline] + #[must_use] + pub fn is_free(&self, addr: u8) -> bool { + addr < 128 && !Self::bit_get(&self.in_use, addr) && !Self::bit_get(&self.reserved, addr) + } + + /// Check whether an address is reserved or outside the 7-bit range. + #[inline] + #[must_use] + pub fn is_reserved(&self, addr: u8) -> bool { + addr >= 128 || Self::bit_get(&self.reserved, addr) + } + + /// Reserve default I3C addresses per specification + /// + /// Reserves addresses 0-7, 0x7E (broadcast), and addresses that + /// differ from 0x7E by a single bit. + pub fn reserve_defaults(&mut self) { + // Reserve addresses 0-7 + for a in 0u8..=7 { + Self::bit_set(&mut self.reserved, a, true); + } + // Reserve broadcast address + Self::bit_set(&mut self.reserved, 0x7E, true); + // Reserve addresses differing from 0x7E by single bit + for i in 0..=7 { + let alt = 0x7E ^ (1u8 << i); + if alt <= 0x7E { + Self::bit_set(&mut self.reserved, alt, true); + } + } + } + + /// Allocate an address starting from the given value + /// + /// Returns `Some(addr)` if an address was found, `None` if exhausted. + pub fn alloc_from(&mut self, start: u8) -> Option { + let mut addr = start.max(8); + while addr < 0x7F { + if self.is_free(addr) { + return Some(addr); + } + addr += 1; + } + None + } + + /// Mark an address as used or free + #[inline] + pub fn mark_use(&mut self, addr: u8, used: bool) { + // Avoid bitmap aliasing above the 7-bit range. + if addr != 0 && addr < 128 { + Self::bit_set(&mut self.in_use, addr, used); + } + } + + /// Clear all in-use addresses. + pub fn reset_in_use(&mut self) { + self.in_use = [0; 4]; + } +} + +// ============================================================================= +// Device Entry +// ============================================================================= + +/// Cached controller/target IBI state. +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +pub enum IbiState { + Disabled, + Enabled, + /// An ENEC/DISEC or DAT reprogramming operation had an ambiguous outcome. + Unknown, +} + +/// Confidence in a device entry's dynamic-address assignment. +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +pub enum DaState { + /// No device has claimed this address. + Unassigned, + /// GETPID confirmed the address owner. + Verified, + /// The address may be claimed, but its owner is unverified. + Unknown, +} + +/// Entry for a device attached to the I3C bus +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +pub struct DeviceEntry { + /// Device type (I3C or I2C) + pub kind: DevKind, + /// Provisional ID (for I3C devices) + pub pid: Option, + /// Static address (for I2C or SETDASA) + pub static_addr: u8, + /// Current dynamic address + pub dyn_addr: u8, + /// Desired dynamic address + pub desired_da: u8, + /// Bus Characteristics Register + pub bcr: u8, + /// Device Characteristics Register + pub dcr: u8, + /// Maximum read speed + pub maxrd: u8, + /// Maximum write speed + pub maxwr: u8, + /// Maximum read length + pub mrl: u16, + /// Maximum write length + pub mwl: u16, + /// Maximum IBI payload size + pub max_ibi: u8, + /// Cached IBI state. + pub ibi_state: IbiState, + /// Position in DAT (Device Address Table) + pub pos: Option, + /// Dynamic-address confidence. + pub da_state: DaState, +} + +impl DeviceEntry { + /// Create a new I3C device entry + #[must_use] + pub const fn new_i3c(pid: u64, desired_da: u8) -> Self { + Self { + kind: DevKind::I3c, + pid: Some(pid), + static_addr: 0, + dyn_addr: desired_da, + desired_da, + bcr: 0, + dcr: 0, + maxrd: 0, + maxwr: 0, + mrl: 0, + mwl: 0, + max_ibi: 0, + ibi_state: IbiState::Disabled, + pos: None, + da_state: DaState::Unassigned, + } + } + + /// Create a new I2C device entry + #[must_use] + pub const fn new_i2c(static_addr: u8) -> Self { + Self { + kind: DevKind::I2c, + pid: None, + static_addr, + dyn_addr: static_addr, + desired_da: static_addr, + bcr: 0, + dcr: 0, + maxrd: 0, + maxwr: 0, + mrl: 0, + mwl: 0, + max_ibi: 0, + ibi_state: IbiState::Disabled, + pos: None, + da_state: DaState::Unassigned, + } + } +} + +// ============================================================================= +// Attached Devices +// ============================================================================= + +/// Collection of devices attached to the I3C bus +pub struct Attached { + /// Device entries (max 8 devices) + pub devices: Vec, + /// Position-to-index mapping + pub by_pos: [Option; 8], +} + +impl Default for Attached { + fn default() -> Self { + Self::new() + } +} + +impl Attached { + /// Create a new empty attached devices collection + #[must_use] + pub const fn new() -> Self { + Self { + devices: Vec::new(), + by_pos: [None; 8], + } + } + + /// Attach a device to the bus + /// + /// Returns the device index on success. + pub fn attach(&mut self, dev: DeviceEntry) -> Result { + let idx = self.devices.len(); + self.devices.push(dev).map_err(|_| I3cError::NoFreeSlot)?; + Ok(idx) + } + + /// Detach a device by its index + pub fn detach(&mut self, dev_idx: usize) { + if dev_idx >= self.devices.len() { + return; + } + + // Clear position mapping if device had one + if let Some(pos) = self.devices[dev_idx].pos + && let Some(p) = self.by_pos.get_mut(pos as usize) + { + *p = None; + } + + // Remove device and update position mappings + self.devices.remove(dev_idx); + for bp in &mut self.by_pos { + if let Some(idx) = bp { + let idx_usize = *idx as usize; + if idx_usize > dev_idx && idx_usize > 0 { + // SAFETY: Saturating subtract to prevent panic on underflow + *bp = Some(idx.saturating_sub(1)); + } + } + } + } + + /// Detach a device by its DAT position + pub fn detach_by_pos(&mut self, pos: usize) { + if let Some(Some(dev_idx)) = self.by_pos.get(pos) { + self.detach(*dev_idx as usize); + } + } + + /// Get the DAT position of a device by its index + #[must_use] + pub fn pos_of(&self, dev_idx: usize) -> Option { + let dev_idx_u8 = u8::try_from(dev_idx).ok()?; + self.by_pos + .iter() + .enumerate() + .find_map(|(pos, &v)| (v == Some(dev_idx_u8)).then_some(pos)) + .and_then(|p| u8::try_from(p).ok()) + } + + /// Find device index by dynamic address + #[must_use] + pub fn find_dev_idx_by_addr(&self, da: u8) -> Option { + self.devices.iter().position(|d| d.dyn_addr == da) + } + + /// Get DAT position by dynamic address + #[must_use] + pub fn pos_of_addr(&self, da: u8) -> Option { + let dev_idx = self.devices.iter().position(|d| d.dyn_addr == da)?; + self.pos_of(dev_idx) + } + + /// Get DAT position by PID + #[must_use] + pub fn pos_of_pid(&self, pid: u64) -> Option { + let dev_idx = self.devices.iter().position(|d| d.pid == Some(pid))?; + self.pos_of(dev_idx) + } + + /// Find device index by static address (legacy I2C devices) + #[must_use] + pub fn find_dev_idx_by_static_addr(&self, addr: u8) -> Option { + self.devices + .iter() + .position(|d| d.kind == DevKind::I2c && d.static_addr == addr) + } + + /// Get DAT position by static address (legacy I2C devices) + #[must_use] + pub fn pos_of_static_addr(&self, addr: u8) -> Option { + let dev_idx = self.find_dev_idx_by_static_addr(addr)?; + self.pos_of(dev_idx) + .or_else(|| self.devices.get(dev_idx).and_then(|d| d.pos)) + } + + /// Map a DAT position to a device index + #[inline] + pub fn map_pos(&mut self, pos: u8, idx: u8) -> bool { + if let Some(slot) = self.by_pos.get_mut(pos as usize) { + *slot = Some(idx); + return true; + } + false + } + + /// Unmap a DAT position + #[inline] + pub fn unmap_pos(&mut self, pos: u8) { + if let Some(slot) = self.by_pos.get_mut(pos as usize) { + *slot = None; + } + } +} + +// ============================================================================= +// Common State +// ============================================================================= + +/// Common state shared across configurations (placeholder) +#[derive(Default)] +pub struct CommonState { + _phantom: PhantomData<()>, +} + +/// Common configuration (placeholder) +#[derive(Default)] +pub struct CommonCfg { + _phantom: PhantomData<()>, +} + +// ============================================================================= +// Reset Specification +// ============================================================================= + +/// Reset line specification +#[derive(Clone, Copy)] +pub struct ResetSpec { + /// Reset line ID + pub id: u32, + /// Whether reset is active high + pub active_high: bool, +} + +// ============================================================================= +// Main Configuration +// ============================================================================= + +/// Main I3C bus configuration +pub struct I3cConfig { + /// Common higher-level state + pub common: CommonState, + /// Target mode configuration (if operating as target) + pub target_config: Option, + /// Address book for dynamic address management + pub addrbook: AddrBook, + /// Collection of attached devices + pub attached: Attached, + + // Clock configuration + /// Core clock frequency in Hz (injected by platform) + /// + /// If `None`, hardware implementation may auto-detect or use a default. + /// Providing this value decouples I3C from SCU/clock tree access. + pub core_clk_hz: Option, + + // Timing/PHY parameters (nanoseconds, computed from core_clk_hz) + /// Core clock period in ns (computed during init) + pub core_period: u32, + /// I2C SCL frequency in Hz + pub i2c_scl_hz: u32, + /// I3C SCL frequency in Hz + pub i3c_scl_hz: u32, + /// I3C push-pull SCL high period in ns + pub i3c_pp_scl_hi_period_ns: u32, + /// I3C push-pull SCL low period in ns + pub i3c_pp_scl_lo_period_ns: u32, + /// I3C open-drain SCL high period in ns + pub i3c_od_scl_hi_period_ns: u32, + /// I3C open-drain SCL low period in ns + pub i3c_od_scl_lo_period_ns: u32, + /// SDA TX hold time in ns + pub sda_tx_hold_ns: u32, + /// Whether this controller is secondary + pub is_secondary: bool, + + // Tables/indices + /// Maximum number of devices + pub maxdevs: u16, + /// Bitmap of free DAT positions + pub free_pos: u32, + /// Bitmap of devices needing dynamic address + pub need_da: u32, + /// DCR value + pub dcr: u32, + + // Target-mode data + /// Whether SIR (Slave Interrupt Request) is allowed by software + pub sir_allowed_by_sw: bool, +} + +impl Default for I3cConfig { + fn default() -> Self { + Self::new() + } +} + +impl I3cConfig { + /// Create a new configuration with default values + #[must_use] + pub fn new() -> Self { + // Constructors must reserve spec-defined addresses. + let mut addrbook = AddrBook::new(); + addrbook.reserve_defaults(); + + Self { + common: CommonState::default(), + target_config: None, + addrbook, + attached: Attached::new(), + core_clk_hz: None, + core_period: 0, + i2c_scl_hz: 0, + i3c_scl_hz: 0, + i3c_pp_scl_hi_period_ns: 0, + i3c_pp_scl_lo_period_ns: 0, + i3c_od_scl_hi_period_ns: 0, + i3c_od_scl_lo_period_ns: 0, + sda_tx_hold_ns: 0, + is_secondary: false, + maxdevs: 8, + free_pos: 0, + need_da: 0, + dcr: 0, + sir_allowed_by_sw: false, + } + } + + /// Initialize runtime fields (address book and attached devices) + pub fn init_runtime_fields(&mut self) { + self.addrbook = AddrBook::new(); + self.addrbook.reserve_defaults(); + self.attached = Attached::new(); + } + + /// Pick and reserve an initial dynamic address for a device. + pub fn pick_initial_da(&mut self, static_addr: u8, desired: u8) -> Option { + let addr = if desired != 0 && self.addrbook.is_free(desired) { + desired + } else if static_addr != 0 && self.addrbook.is_free(static_addr) { + static_addr + } else { + self.addrbook.alloc_from(8)? + }; + self.addrbook.mark_use(addr, true); + Some(addr) + } + + /// Reassign a device's dynamic address + pub fn reassign_da(&mut self, from: u8, to: u8) -> Result<(), I3cError> { + // Resolve the device before mutating the address book. + let idx = self + .attached + .devices + .iter() + .position(|d| d.dyn_addr == from) + .ok_or(I3cError::DevNotFound)?; + + if from == to { + return Ok(()); + } + if !self.addrbook.is_free(to) { + return Err(I3cError::AddrInUse); + } + + self.addrbook.mark_use(from, false); + self.addrbook.mark_use(to, true); + if let Some(dev) = self.attached.devices.get_mut(idx) { + dev.dyn_addr = to; + // Keep the next DAA cycle on the new address. + dev.desired_da = to; + } + Ok(()) + } + + /// Record an address-changing operation whose bus-side outcome is + /// ambiguous. The old and candidate addresses stay reserved so neither + /// can be handed to another target before the owner is verified. + pub(crate) fn mark_da_unknown(&mut self, dev_idx: usize, candidate: Option) { + let Some(dev) = self.attached.devices.get_mut(dev_idx) else { + return; + }; + if dev.kind != DevKind::I3c { + return; + } + + dev.da_state = DaState::Unknown; + self.addrbook.mark_use(dev.dyn_addr, true); + self.addrbook.mark_use(dev.desired_da, true); + if let Some(addr) = candidate { + self.addrbook.mark_use(addr, true); + } + } + + /// Preserve all possible address owners after an ambiguous broadcast + /// RSTDAA. Existing reservations, including parking addresses, remain + /// intact because the command may not have reached every target. + pub(crate) fn mark_rstdaa_unknown(&mut self) { + for dev in &mut self.attached.devices { + if dev.kind != DevKind::I3c { + continue; + } + dev.da_state = DaState::Unknown; + dev.ibi_state = IbiState::Unknown; + self.addrbook.mark_use(dev.dyn_addr, true); + self.addrbook.mark_use(dev.desired_da, true); + } + } + + /// Commit a confirmed broadcast RSTDAA and rebuild reservations from the + /// addresses that will be offered by the next DAA walk. + pub(crate) fn commit_rstdaa(&mut self) { + self.addrbook.reset_in_use(); + for dev in &mut self.attached.devices { + match dev.kind { + DevKind::I2c => self.addrbook.mark_use(dev.static_addr, true), + DevKind::I3c => { + dev.da_state = DaState::Unassigned; + dev.ibi_state = IbiState::Disabled; + self.addrbook.mark_use(dev.desired_da, true); + } + } + } + } +} + +// ============================================================================= +// Builder Pattern for I3cConfig +// ============================================================================= + +impl I3cConfig { + /// Set core clock frequency in Hz + /// + /// This decouples the I3C driver from SCU/clock tree access. + /// The platform layer should provide the actual clock rate. + /// + /// # I3C Timing Requirements (MIPI I3C Spec v1.1) + /// + /// | Mode | Min Clock | Typical | Notes | + /// |------|-----------|---------|-------| + /// | SDR | 12.5 `MHz` | 100-200 `MHz` | For 12.5 `MHz` SCL | + /// | HDR | 25 `MHz` | 100-200 `MHz` | For 25 `MHz` SCL | + /// + /// # Example + /// + /// ```rust,ignore + /// let config = I3cConfig::new() + /// .core_clk_hz(200_000_000) // 200 MHz from platform + /// .i3c_scl_hz(12_500_000); // 12.5 MHz SCL + /// ``` + #[must_use] + pub fn core_clk_hz(mut self, hz: u32) -> Self { + self.core_clk_hz = Some(hz); + self + } + + /// Set I2C SCL frequency + #[must_use] + pub fn i2c_scl_hz(mut self, hz: u32) -> Self { + self.i2c_scl_hz = hz; + self + } + + /// Set I3C SCL frequency + #[must_use] + pub fn i3c_scl_hz(mut self, hz: u32) -> Self { + self.i3c_scl_hz = hz; + self + } + + /// Set as secondary controller + #[must_use] + pub fn secondary(mut self, is_secondary: bool) -> Self { + self.is_secondary = is_secondary; + self + } + + /// Set DCR (Device Characteristics Register) + #[must_use] + pub fn dcr(mut self, dcr: u8) -> Self { + self.dcr = u32::from(dcr); + self + } + + /// Set target configuration + #[must_use] + pub fn target_config(mut self, config: I3cTargetConfig) -> Self { + self.target_config = Some(config); + self + } + + /// Set I3C Push-Pull SCL high period in ns + #[must_use] + pub fn i3c_pp_scl_hi_period_ns(mut self, ns: u32) -> Self { + self.i3c_pp_scl_hi_period_ns = ns; + self + } + + /// Set I3C Push-Pull SCL low period in ns + #[must_use] + pub fn i3c_pp_scl_lo_period_ns(mut self, ns: u32) -> Self { + self.i3c_pp_scl_lo_period_ns = ns; + self + } + + /// Set I3C Open-Drain SCL high period in ns + #[must_use] + pub fn i3c_od_scl_hi_period_ns(mut self, ns: u32) -> Self { + self.i3c_od_scl_hi_period_ns = ns; + self + } + + /// Set I3C Open-Drain SCL low period in ns + #[must_use] + pub fn i3c_od_scl_lo_period_ns(mut self, ns: u32) -> Self { + self.i3c_od_scl_lo_period_ns = ns; + self + } + + /// Set SDA TX hold time in ns + #[must_use] + pub fn sda_tx_hold_ns(mut self, ns: u32) -> Self { + self.sda_tx_hold_ns = ns; + self + } +} + +// ============================================================================= +// Clock Validation +// ============================================================================= + +/// Minimum core clock for I3C SDR mode (Hz) +/// Required to achieve 12.5 `MHz` SCL with proper timing margins +pub const I3C_MIN_CORE_CLK_SDR: u32 = 12_500_000; + +/// Minimum core clock for I3C HDR mode (Hz) +/// Required to achieve 25 `MHz` SCL with proper timing margins +pub const I3C_MIN_CORE_CLK_HDR: u32 = 25_000_000; + +/// Maximum supported core clock (Hz) +pub const I3C_MAX_CORE_CLK: u32 = 400_000_000; + +/// Maximum I3C SDR SCL frequency. +pub const I3C_MAX_SCL_HZ: u32 = 12_500_000; + +/// Maximum legacy-I2C Fast-mode Plus frequency. +pub const I3C_MAX_I2C_SCL_HZ: u32 = 1_000_000; + +impl I3cConfig { + /// Validate clock configuration + /// + /// Checks that the configured clock frequencies are achievable per + /// MIPI I3C specification timing requirements. + /// + /// # Timing Requirements (MIPI I3C Basic Spec v1.1.1) + /// + /// | Parameter | SDR Mode | HDR-DDR Mode | Unit | + /// |-----------|----------|--------------|------| + /// | fSCL max | 12.5 | 12.5 | `MHz` | + /// | tLOW min | 32 | 32 | ns | + /// | tHIGH min | 32 | 32 | ns | + /// + /// For reliable operation, core clock should be at least 4x the SCL frequency + /// to allow proper timing register resolution. + /// + /// # Returns + /// + /// - `Ok(())` if configuration is valid + /// - `Err(I3cError::InvalidParam)` if configuration is invalid + /// + /// # Example + /// + /// ```rust,ignore + /// let config = I3cConfig::new() + /// .core_clk_hz(200_000_000) + /// .i3c_scl_hz(12_500_000); + /// + /// config.validate_clock()?; + /// ``` + pub fn validate_clock(&self) -> Result<(), I3cError> { + // Enforce protocol frequency limits. + if self.i3c_scl_hz > I3C_MAX_SCL_HZ { + return Err(I3cError::InvalidParam); + } + if self.i2c_scl_hz > I3C_MAX_I2C_SCL_HZ { + return Err(I3cError::InvalidParam); + } + // Primary mode requires I3C timing; legacy-I2C timing is optional. + if !self.is_secondary && self.i3c_scl_hz == 0 { + return Err(I3cError::InvalidParam); + } + + if let Some(core_hz) = self.core_clk_hz + && (core_hz < I3C_MIN_CORE_CLK_SDR || core_hz > I3C_MAX_CORE_CLK) + { + return Err(I3cError::InvalidParam); + } + + // Validate against the same fallback used by `init_clock`. + let effective_core_hz = self.core_clk_hz.unwrap_or(I3C_MIN_CORE_CLK_SDR); + if self.i3c_scl_hz > 0 && effective_core_hz < self.i3c_scl_hz.saturating_mul(4) { + return Err(I3cError::InvalidParam); + } + if self.i2c_scl_hz > 0 && effective_core_hz < self.i2c_scl_hz.saturating_mul(4) { + return Err(I3cError::InvalidParam); + } + + // Custom timing requires complete high/low pairs. + if (self.i3c_od_scl_hi_period_ns == 0) != (self.i3c_od_scl_lo_period_ns == 0) + || (self.i3c_pp_scl_hi_period_ns == 0) != (self.i3c_pp_scl_lo_period_ns == 0) + { + return Err(I3cError::InvalidParam); + } + + // Custom periods must fit the 8-bit timing registers. + let period_ns = NSEC_PER_SEC.div_ceil(effective_core_hz.max(1)).max(1); + for ns in [ + self.i3c_od_scl_hi_period_ns, + self.i3c_od_scl_lo_period_ns, + self.i3c_pp_scl_hi_period_ns, + self.i3c_pp_scl_lo_period_ns, + ] { + if ns == 0 { + continue; + } + let cnt = ns.div_ceil(period_ns); + if cnt == 0 || cnt > u32::from(u8::MAX) { + return Err(I3cError::InvalidParam); + } + } + + Ok(()) + } +} diff --git a/target/ast10x0/peripherals/i3c/constants.rs b/target/ast10x0/peripherals/i3c/constants.rs new file mode 100644 index 00000000..354aefa8 --- /dev/null +++ b/target/ast10x0/peripherals/i3c/constants.rs @@ -0,0 +1,370 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! I3C hardware constants and register definitions +//! +//! # Register Map +//! | Offset | Register | Description | +//! |--------|-----------------------|--------------------------------| +//! | 0x0C | COMMAND_QUEUE_PORT | Command queue port | +//! | 0x10 | RESPONSE_QUEUE_PORT | Response queue port | +//! | 0x18 | IBI_QUEUE_STATUS | IBI queue status | +//! | 0x3C | INTR_STATUS | Interrupt status | +//! | 0x40 | INTR_STATUS_EN | Interrupt status enable | +//! | 0x44 | INTR_SIGNAL_EN | Interrupt signal enable | + +// ============================================================================= +// Message Flags +// ============================================================================= + +/// I3C message write flag +pub const I3C_MSG_WRITE: u8 = 0x0; +/// I3C message read flag +pub const I3C_MSG_READ: u8 = 0x1; +/// I3C message stop flag +pub const I3C_MSG_STOP: u8 = 0x2; + +// ============================================================================= +// I2C Timing Constants (nanoseconds) +// ============================================================================= + +// Standard mode (100 kHz) +pub const I3C_BUS_I2C_STD_TLOW_MIN_NS: u32 = 4_700; +pub const I3C_BUS_I2C_STD_THIGH_MIN_NS: u32 = 4_000; +pub const I3C_BUS_I2C_STD_TR_MAX_NS: u32 = 1_000; +pub const I3C_BUS_I2C_STD_TF_MAX_NS: u32 = 300; + +// Fast mode (400 kHz) +pub const I3C_BUS_I2C_FM_TLOW_MIN_NS: u32 = 1_300; +pub const I3C_BUS_I2C_FM_THIGH_MIN_NS: u32 = 600; +pub const I3C_BUS_I2C_FM_TR_MAX_NS: u32 = 300; +pub const I3C_BUS_I2C_FM_TF_MAX_NS: u32 = 300; + +// Fast mode plus (1 MHz) +pub const I3C_BUS_I2C_FMP_TLOW_MIN_NS: u32 = 500; +pub const I3C_BUS_I2C_FMP_THIGH_MIN_NS: u32 = 260; +pub const I3C_BUS_I2C_FMP_TR_MAX_NS: u32 = 120; +pub const I3C_BUS_I2C_FMP_TF_MAX_NS: u32 = 120; + +// I3C timing +pub const I3C_BUS_THIGH_MAX_NS: u32 = 41; + +/// Nanoseconds per second +pub const NSEC_PER_SEC: u32 = 1_000_000_000; +/// Microseconds per second +pub const USEC_PER_SEC: u32 = 1_000_000; + +// ============================================================================= +// SDA TX Hold Configuration +// ============================================================================= + +pub const SDA_TX_HOLD_MIN: u32 = 0b001; +pub const SDA_TX_HOLD_MAX: u32 = 0b111; +pub const SDA_TX_HOLD_MASK: u32 = 0x0007_0000; // bits 18:16 + +// ============================================================================= +// Slave Configuration +// ============================================================================= + +pub const SLV_DCR_MASK: u32 = 0x0000_ff00; +pub const SLV_EVENT_CTRL: u32 = 0x38; +pub const SLV_EVENT_CTRL_MWL_UPD: u32 = bit(7); +pub const SLV_EVENT_CTRL_MRL_UPD: u32 = bit(6); +pub const SLV_EVENT_CTRL_HJ_REQ: u32 = bit(3); +pub const SLV_EVENT_CTRL_SIR_EN: u32 = bit(0); + +// ============================================================================= +// I3C Global Register Bits +// ============================================================================= + +pub const I3CG_REG1_SCL_IN_SW_MODE_VAL: u32 = bit(23); +pub const I3CG_REG1_SDA_IN_SW_MODE_VAL: u32 = bit(27); +pub const I3CG_REG1_SCL_IN_SW_MODE_EN: u32 = bit(28); +pub const I3CG_REG1_SDA_IN_SW_MODE_EN: u32 = bit(29); + +// ============================================================================= +// Transfer Status +// ============================================================================= + +pub const CM_TFR_STS_MASTER_HALT: u8 = 0xf; +pub const CM_TFR_STS_TARGET_HALT: u8 = 0x6; + +// ============================================================================= +// Command Queue Port (0x0C) +// ============================================================================= + +pub const COMMAND_QUEUE_PORT: u32 = 0x0c; + +// Command port bit flags +pub const COMMAND_PORT_PEC: u32 = bit(31); +pub const COMMAND_PORT_TOC: u32 = bit(30); +pub const COMMAND_PORT_READ_TRANSFER: u32 = bit(28); +pub const COMMAND_PORT_SDAP: u32 = bit(27); +pub const COMMAND_PORT_ROC: u32 = bit(26); +pub const COMMAND_PORT_DBP: u32 = bit(25); +pub const COMMAND_PORT_CP: u32 = bit(15); + +// Command port field masks +pub const COMMAND_PORT_SPEED: u32 = bits(23, 21); +pub const COMMAND_PORT_DEV_INDEX: u32 = bits(20, 16); +pub const COMMAND_PORT_CMD: u32 = bits(14, 7); +pub const COMMAND_PORT_TID: u32 = bits(6, 3); +pub const COMMAND_PORT_ARG_DB: u32 = bits(15, 8); +pub const COMMAND_PORT_ARG_DATA_LEN: u32 = bits(31, 16); +pub const COMMAND_PORT_ATTR: u32 = bits(2, 0); +pub const COMMAND_PORT_DEV_COUNT: u32 = bits(25, 21); + +// ============================================================================= +// Transaction IDs +// ============================================================================= + +pub const TID_TARGET_IBI: u32 = 0x1; +pub const TID_TARGET_RD_DATA: u32 = 0x2; +pub const TID_TARGET_MASTER_WR: u32 = 0x8; +pub const TID_TARGET_MASTER_DEF: u32 = 0xf; + +// ============================================================================= +// Command Attributes +// ============================================================================= + +pub const COMMAND_ATTR_XFER_CMD: u32 = 0; +pub const COMMAND_ATTR_XFER_ARG: u32 = 1; +pub const COMMAND_ATTR_SHORT_ARG: u32 = 2; +pub const COMMAND_ATTR_ADDR_ASSGN_CMD: u32 = 3; +pub const COMMAND_ATTR_SLAVE_DATA_CMD: u32 = 0; + +// ============================================================================= +// Device Address Table +// ============================================================================= + +pub const DEV_ADDR_TABLE_LEGACY_I2C_DEV: u32 = bit(31); +pub const DEV_ADDR_TABLE_DYNAMIC_ADDR: u32 = bits(23, 16); +pub const DEV_ADDR_TABLE_MR_REJECT: u32 = bit(14); +pub const DEV_ADDR_TABLE_SIR_REJECT: u32 = bit(13); +pub const DEV_ADDR_TABLE_IBI_MDB: u32 = bit(12); +pub const DEV_ADDR_TABLE_IBI_PEC: u32 = bit(11); +pub const DEV_ADDR_TABLE_STATIC_ADDR: u32 = bits(6, 0); + +// ============================================================================= +// IBI Queue Status (0x18) +// ============================================================================= + +pub const IBI_QUEUE_STATUS: u32 = 0x18; +pub const IBIQ_STATUS_IBI_ID: u32 = bits(15, 8); +pub const IBIQ_STATUS_IBI_ID_SHIFT: u32 = 8; +pub const IBIQ_STATUS_IBI_DATA_LEN: u32 = bits(7, 0); +pub const IBIQ_STATUS_IBI_DATA_LEN_SHIFT: u32 = 0; + +// ============================================================================= +// Reset Control +// ============================================================================= + +pub const RESET_CTRL_IBI_QUEUE: u32 = bit(5); +pub const RESET_CTRL_RX_FIFO: u32 = bit(4); +pub const RESET_CTRL_TX_FIFO: u32 = bit(3); +pub const RESET_CTRL_RESP_QUEUE: u32 = bit(2); +pub const RESET_CTRL_CMD_QUEUE: u32 = bit(1); +pub const RESET_CTRL_SOFT: u32 = bit(0); + +pub const RESET_CTRL_ALL: u32 = RESET_CTRL_IBI_QUEUE + | RESET_CTRL_RX_FIFO + | RESET_CTRL_TX_FIFO + | RESET_CTRL_RESP_QUEUE + | RESET_CTRL_CMD_QUEUE + | RESET_CTRL_SOFT; + +pub const RESET_CTRL_QUEUES: u32 = RESET_CTRL_IBI_QUEUE + | RESET_CTRL_RX_FIFO + | RESET_CTRL_TX_FIFO + | RESET_CTRL_RESP_QUEUE + | RESET_CTRL_CMD_QUEUE; + +pub const RESET_CTRL_XFER_QUEUES: u32 = + RESET_CTRL_RX_FIFO | RESET_CTRL_TX_FIFO | RESET_CTRL_RESP_QUEUE | RESET_CTRL_CMD_QUEUE; + +// ============================================================================= +// Response Queue Port (0x10) +// ============================================================================= + +pub const RESPONSE_QUEUE_PORT: u32 = 0x10; +pub const RESPONSE_PORT_ERR_STATUS_SHIFT: u32 = 28; +pub const RESPONSE_PORT_ERR_STATUS_MASK: u32 = genmask(31, 28); +pub const RESPONSE_PORT_TID_SHIFT: u32 = 24; +pub const RESPONSE_PORT_TID_MASK: u32 = genmask(27, 24); +pub const RESPONSE_PORT_DATA_LEN_SHIFT: u32 = 0; +pub const RESPONSE_PORT_DATA_LEN_MASK: u32 = genmask(15, 0); + +// Response error codes +pub const RESPONSE_NO_ERROR: u32 = 0; +pub const RESPONSE_ERROR_CRC: u32 = 1; +pub const RESPONSE_ERROR_PARITY: u32 = 2; +pub const RESPONSE_ERROR_FRAME: u32 = 3; +pub const RESPONSE_ERROR_IBA_NACK: u32 = 4; +pub const RESPONSE_ERROR_ADDRESS_NACK: u32 = 5; +pub const RESPONSE_ERROR_OVER_UNDER_FLOW: u32 = 6; +pub const RESPONSE_ERROR_TRANSF_ABORT: u32 = 8; +pub const RESPONSE_ERROR_I2C_W_NACK_ERR: u32 = 9; +pub const RESPONSE_ERROR_EARLY_TERMINATE: u32 = 10; +pub const RESPONSE_ERROR_PEC_ERR: u32 = 12; + +// ============================================================================= +// Interrupt Registers (0x3C - 0x48) +// ============================================================================= + +pub const INTR_STATUS: u32 = 0x3c; +pub const INTR_STATUS_EN: u32 = 0x40; +pub const INTR_SIGNAL_EN: u32 = 0x44; +pub const INTR_FORCE: u32 = 0x48; + +// Interrupt status bits +pub const INTR_BUSOWNER_UPDATE_STAT: u32 = bit(13); +pub const INTR_IBI_UPDATED_STAT: u32 = bit(12); +pub const INTR_READ_REQ_RECV_STAT: u32 = bit(11); +pub const INTR_DEFSLV_STAT: u32 = bit(10); +pub const INTR_TRANSFER_ERR_STAT: u32 = bit(9); +pub const INTR_DYN_ADDR_ASSGN_STAT: u32 = bit(8); +pub const INTR_CCC_UPDATED_STAT: u32 = bit(6); +pub const INTR_TRANSFER_ABORT_STAT: u32 = bit(5); +pub const INTR_RESP_READY_STAT: u32 = bit(4); +pub const INTR_CMD_QUEUE_READY_STAT: u32 = bit(3); +pub const INTR_IBI_THLD_STAT: u32 = bit(2); +pub const INTR_RX_THLD_STAT: u32 = bit(1); +pub const INTR_TX_THLD_STAT: u32 = bit(0); + +// BCR bits +pub const I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE: u32 = bit(2); + +// ============================================================================= +// Address Constants +// ============================================================================= + +/// I3C broadcast address +pub const I3C_BROADCAST_ADDR: u8 = 0x7E; +/// Maximum I3C address +pub const I3C_MAX_ADDR: u8 = 0x7F; + +// ============================================================================= +// Hardware Limits +// ============================================================================= + +/// Maximum number of commands in a single transfer (hardware command-FIFO +/// depth). +pub const MAX_CMDS: usize = 32; +/// Maximum number of commands in a single *private* transfer. +/// +/// The command/response transfer-ID field (`COMMAND_PORT_TID` / +/// `RESPONSE_PORT_TID_MASK`) is 4 bits wide, so only 16 distinct IDs exist. +/// A batch using the message index as the TID must stay below this bound: +/// indices >= 16 alias earlier commands once `field_prep` masks the TID, +/// which mis-routes responses. Necessarily smaller than [`MAX_CMDS`]. +pub const MAX_PRIV_XFER_CMDS: usize = 16; +/// Maximum data length encodable in a command. +/// +/// `COMMAND_PORT_ARG_DATA_LEN` is a 16-bit field; a longer length truncates +/// silently in `field_prep`, so transfers must validate against this bound. +pub const MAX_XFER_DATA_LEN: usize = 0xffff; +/// Maximum number of I3C buses supported +pub const MAX_BUSES: usize = 4; +/// Maximum devices per bus +pub const MAX_DEVICES_PER_BUS: usize = 8; + +// ============================================================================= +// Driver Policy / Bring-up Defaults +// ============================================================================= + +/// Default static address programmed into the controller during init. +pub const I3C_DEFAULT_STATIC_ADDR: u8 = 0x74; +/// One-second operation timeout expressed in microseconds. +pub const I3C_OP_TIMEOUT_US: u32 = USEC_PER_SEC; +/// Bring-up reset poll delay between iterations in nanoseconds. +pub const I3C_INIT_POLL_DELAY_NS: u32 = 100_000; +/// Generic bounded-poll iteration ceiling used by controller bring-up waits. +pub const I3C_POLL_MAX_ITERS: u32 = 1_000_000; +/// Queue reset / halt / IBI enable poll delay in nanoseconds. +pub const I3C_CTRL_POLL_DELAY_NS: u32 = 10_000; +/// Program the maximum IBI data threshold supported by the controller. +pub const I3C_IBI_DATA_THRESHOLD_MAX: u8 = 31; +/// Global I3C reset deassert bit in `SCU054`. +pub const I3C_GLOBAL_RESET_DEASSERT_MASK: u32 = 0x80; +/// Write-one-to-clear mask for all interrupt-status bits. +pub const I3C_INTR_STATUS_ALL_BITS: u32 = u32::MAX; +/// Bring-up value for `BUS_FREE_TIMING` (`i3cd0d4`). +pub const I3C_BUS_FREE_TIMING_RESET: u32 = 0xffff_007c; +/// AST10x0 target MIPI manufacturer identifier. +pub const I3C_AST10X0_MIPI_MANUF_ID: u16 = 0x03f6; + +// ============================================================================= +// CCC (Common Command Code) Constants +// ============================================================================= + +pub const I3C_CCC_RSTDAA: u8 = 0x06; +pub const I3C_CCC_ENTDAA: u8 = 0x07; +/// SETMWL broadcast form. +pub const I3C_CCC_SETMWL_BC: u8 = 0x09; +/// SETMRL broadcast form. +pub const I3C_CCC_SETMRL_BC: u8 = 0x0A; +pub const I3C_CCC_SETHID: u8 = 0x61; +pub const I3C_CCC_DEVCTRL: u8 = 0x62; +pub const I3C_CCC_SETDASA: u8 = 0x87; +pub const I3C_CCC_SETNEWDA: u8 = 0x88; +/// SETMWL direct form. +pub const I3C_CCC_SETMWL: u8 = 0x89; +/// SETMRL direct form. +pub const I3C_CCC_SETMRL: u8 = 0x8A; +pub const I3C_CCC_GETMWL: u8 = 0x8B; +pub const I3C_CCC_GETMRL: u8 = 0x8C; +pub const I3C_CCC_GETPID: u8 = 0x8D; +pub const I3C_CCC_GETBCR: u8 = 0x8E; +pub const I3C_CCC_GETDCR: u8 = 0x8F; +pub const I3C_CCC_GETSTATUS: u8 = 0x90; +pub const I3C_CCC_GETMXDS: u8 = 0x94; + +// CCC event bits +pub const I3C_CCC_EVT_INTR: u8 = 1 << 0; +pub const I3C_CCC_EVT_CR: u8 = 1 << 1; +pub const I3C_CCC_EVT_HJ: u8 = 1 << 3; +pub const I3C_CCC_EVT_ALL: u8 = I3C_CCC_EVT_INTR | I3C_CCC_EVT_CR | I3C_CCC_EVT_HJ; + +// ============================================================================= +// Helper Functions +// ============================================================================= + +/// Create a single bit mask at position `n` +#[inline] +#[must_use] +pub const fn bit(n: u32) -> u32 { + 1 << n +} + +/// Create a bit mask from bit `l` to bit `h` (inclusive) +#[inline] +#[must_use] +pub const fn bits(h: u32, l: u32) -> u32 { + ((1u32 << (h - l + 1)) - 1) << l +} + +/// Prepare a value for a masked field +#[inline] +#[must_use] +pub const fn field_prep(mask: u32, val: u32) -> u32 { + (val << mask.trailing_zeros()) & mask +} + +/// Extract a value from a masked field +#[inline] +#[must_use] +pub const fn field_get(val: u32, mask: u32, shift: u32) -> u32 { + (val & mask) >> shift +} + +/// Generate a mask from MSB to LSB +#[inline] +#[must_use] +pub const fn genmask(msb: u32, lsb: u32) -> u32 { + let width = msb - lsb + 1; + if width >= 32 { + u32::MAX + } else { + ((1u32 << width) - 1) << lsb + } +} diff --git a/target/ast10x0/peripherals/i3c/controller.rs b/target/ast10x0/peripherals/i3c/controller.rs new file mode 100644 index 00000000..663e7f45 --- /dev/null +++ b/target/ast10x0/peripherals/i3c/controller.rs @@ -0,0 +1,1236 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! I3C Controller +//! +//! Main hardware abstraction for I3C bus controller. +//! +//! # Lifecycle +//! +//! Two states, matching the SMC peripheral's `Uninitialized -> Ready` +//! precedent: +//! +//! | State | Entered by | Available operations | +//! |-------|-----------|----------------------| +//! | [`Uninitialized`] | [`I3cController::new`] | [`start()`](I3cController::start) | +//! | [`Ready`] | `start()` (IRQ trampoline claimed + hardware programmed) | bus operations | +//! +//! After `start()` the integration layer unmasks the NVIC line it owns (it +//! selected the bus, so it knows the matching platform interrupt line); +//! the driver never touches the NVIC. +//! +//! # ISR decoupling +//! +//! The ISR shares **no** `&mut` state with this controller: at `start()` the +//! driver parks an ISR-owned register handle plus the role flag in the +//! per-bus registry (`hardware::register_i3c_irq_handler`), and the ISR +//! communicates back exclusively through per-bus atomics and the global IBI +//! work rings (the SMC flag-and-defer model). The controller is therefore a +//! plain owned value — no pinning, no `'static` storage, no raw context +//! pointer. +//! +//! # Example +//! +//! ```rust,ignore +//! // === BOOT/INIT CODE (runs once) === +//! // Platform init first (clocks, resets - not part of i3c_core) +//! scu.enable_i3c_clock(bus); +//! scu.deassert_i3c_reset(bus); +//! +//! let hw = unsafe { Ast1060I3c::new(bus, yield_fn) }.ok_or(...)?; +//! let mut ctrl = I3cController::new(hw, &mut config) +//! .start()?; // register ISR ctx (single-shot) + program hardware +//! +//! // Integration layer owns the NVIC line; unmask it now. +//! unsafe { NVIC::unmask(integration_owned_irq_line) }; +//! +//! ctrl.priv_write(pid, &mut data)?; +//! ``` + +use core::marker::PhantomData; + +use super::ccc; +use super::config::{DaState, DeviceEntry, I3cConfig, I3cTargetConfig, IbiState}; +use super::constants::{I3C_BROADCAST_ADDR, MAX_PRIV_XFER_CMDS, MAX_XFER_DATA_LEN}; +use super::error::I3cError; +use super::hardware::HardwareInterface; +use super::types::{DevKind, I2cOp, I3cIbi, I3cIbiType, I3cMsg}; +use embedded_hal::i2c::SevenBitAddress; + +// ============================================================================= +// Lifecycle states +// ============================================================================= + +/// Initial state: nothing registered, no I/O done. +pub struct Uninitialized; +/// IRQ trampoline claimed and hardware programmed; bus operations available. +/// The integration layer unmasks the NVIC line it owns after entering this +/// state. +pub struct Ready; + +// ============================================================================= +// Controller shell +// ============================================================================= + +/// I3C controller: a plain owned value over the hardware driver, borrowing +/// the caller's configuration. No pinning or `'static` storage is required — +/// the ISR never holds a pointer into this object (see the module docs). +/// +/// The configuration is **borrowed** (`&'c mut I3cConfig`), not owned: the +/// config embeds the device tables (~0.5 KiB), and the typestate transition +/// (`start(self) -> Self`) moves the controller by value — owning the +/// config would transiently stack two copies inside one frame, which the +/// 2 KiB kernel bootstrap stack cannot afford. Borrowing keeps exactly one +/// config alive, wherever the caller placed it. +pub struct I3cController<'c, H: HardwareInterface, S = Uninitialized> { + hw: H, + config: &'c mut I3cConfig, + _state: PhantomData, +} + +impl<'c, H: HardwareInterface, S> I3cController<'c, H, S> { + /// Split-borrow helper for operations that drive `hw` with `config`. + #[inline] + fn parts(&mut self) -> (&mut H, &mut I3cConfig) { + (&mut self.hw, &mut *self.config) + } + + /// Return this controller's bus number. + #[inline] + #[must_use] + pub fn bus_num(&self) -> u8 { + self.hw.bus_num() + } +} + +impl<'c, H: HardwareInterface> I3cController<'c, H, Uninitialized> { + /// Bundle hardware and a borrowed configuration. No I/O, no registration. + #[must_use] + pub fn new(hw: H, config: &'c mut I3cConfig) -> Self { + Self { + hw, + config, + _state: PhantomData, + } + } + + /// Bring the controller up: park this bus's ISR context in the registry + /// (single-shot per bus) and program the hardware. + /// + /// The target/kernel owns the top-level interrupt vector; its ISR calls + /// [`dispatch_i3c_irq`](super::hardware::dispatch_i3c_irq), which services + /// the bus through the registered context. On return the device may + /// assert its IRQ line; nothing is delivered until the integration layer + /// unmasks the NVIC line it owns. + /// + /// Returns [`I3cError::Busy`] if the bus's IRQ slot was already claimed by + /// another controller, or [`I3cError::Timeout`] if the hardware's initial + /// queue-reset poll timed out. + pub fn start(mut self) -> Result, I3cError> { + // Reject invalid timing before programming hardware. + self.config.validate_clock()?; + if let Some(static_addr) = self + .config + .target_config + .as_ref() + .and_then(|target| target.static_addr) + && (static_addr >= I3C_BROADCAST_ADDR || self.config.addrbook.is_reserved(static_addr)) + { + return Err(I3cError::InvalidArgs); + } + + let bus = self.hw.bus_num() as usize; + let ctx = self.hw.isr_ctx(self.config.is_secondary); + if !super::hardware::register_i3c_irq_handler(bus, ctx) { + return Err(I3cError::Busy); + } + + if let Err(e) = self.hw.init(self.config) { + // Release the just-claimed slot, or every retry of `start()` + // would fail with `Busy` against a controller that never came up. + super::hardware::unregister_i3c_irq_handler(bus); + return Err(e); + } + // Memory barrier so init writes are visible before the integration + // layer unmasks the IRQ line. + cortex_m::asm::dmb(); + + Ok(I3cController { + hw: self.hw, + config: self.config, + _state: PhantomData, + }) + } +} + +// ============================================================================= +// Bus operations (Ready) +// ============================================================================= + +impl<'c, H: HardwareInterface> I3cController<'c, H, Ready> { + #[inline] + fn ensure_primary(&self) -> Result<(), I3cError> { + if self.config.is_secondary { + Err(I3cError::Access) + } else { + Ok(()) + } + } + + // ========================================================================= + // Device Management + // ========================================================================= + + /// Attach an I3C device to the bus + /// + /// # Arguments + /// * `pid` - Provisional ID of the device + /// * `desired_da` - Desired dynamic address + /// * `slot` - DAT slot to use + pub fn attach_i3c_dev(&mut self, pid: u64, desired_da: u8, slot: u8) -> Result<(), I3cError> { + self.ensure_primary()?; + let (hw, config) = self.parts(); + if desired_da == 0 || desired_da >= I3C_BROADCAST_ADDR { + return Err(I3cError::InvalidArgs); + } + // GETPID returns a 48-bit value. + if pid >= (1u64 << 48) { + return Err(I3cError::InvalidArgs); + } + // Enforce both software and hardware DAT limits. + if usize::from(slot) >= super::constants::MAX_DEVICES_PER_BUS + || u16::from(slot) >= config.maxdevs + { + return Err(I3cError::InvalidArgs); + } + if config + .attached + .by_pos + .get(usize::from(slot)) + .copied() + .flatten() + .is_some() + { + return Err(I3cError::DevAlreadyAttached); + } + if config.addrbook.is_reserved(desired_da) { + return Err(I3cError::InvalidArgs); + } + if !config.addrbook.is_free(desired_da) { + return Err(I3cError::AddrInUse); + } + if config + .attached + .devices + .iter() + .any(|d| d.dyn_addr == desired_da) + { + return Err(I3cError::AddrInUse); + } + // PID lookups require uniqueness. + if config.attached.devices.iter().any(|d| d.pid == Some(pid)) { + return Err(I3cError::DevAlreadyAttached); + } + + // Program hardware before committing bookkeeping. + hw.attach_i3c_dev(slot.into(), desired_da) + .map_err(|_| I3cError::AddrInUse)?; + + let dev = DeviceEntry { + kind: DevKind::I3c, + pid: Some(pid), + static_addr: 0, + dyn_addr: desired_da, + desired_da, + bcr: 0, + dcr: 0, + maxrd: 0, + maxwr: 0, + mrl: 0, + mwl: 0, + max_ibi: 0, + ibi_state: IbiState::Disabled, + pos: Some(slot), + da_state: DaState::Unassigned, + }; + + let idx = match config.attached.attach(dev) { + Ok(idx) => idx, + Err(_) => { + hw.detach_i3c_dev(slot.into()); + return Err(I3cError::NoFreeSlot); + } + }; + let idx_u8 = match u8::try_from(idx) { + Ok(idx) => idx, + Err(_) => { + config.attached.detach(idx); + hw.detach_i3c_dev(slot.into()); + return Err(I3cError::InvalidArgs); + } + }; + if !config.attached.map_pos(slot, idx_u8) { + config.attached.detach(idx); + hw.detach_i3c_dev(slot.into()); + return Err(I3cError::NoDatPos); + } + config.addrbook.mark_use(desired_da, true); + Ok(()) + } + + /// Attach a legacy I2C device to the bus. + /// + /// The DAT slot is programmed with the device's static address and the + /// legacy-I2C marker; transfers then go through + /// [`i2c_write`](Self::i2c_write)/[`i2c_read`](Self::i2c_read)/ + /// [`i2c_write_read`](Self::i2c_write_read) or the + /// `embedded_hal::i2c::I2c` impl. Detach with + /// [`detach_i3c_dev`](Self::detach_i3c_dev) (by slot) or + /// [`detach_i3c_dev_by_idx`](Self::detach_i3c_dev_by_idx). + pub fn attach_i2c_dev(&mut self, static_addr: u8, slot: u8) -> Result<(), I3cError> { + self.ensure_primary()?; + let (hw, config) = self.parts(); + if static_addr == 0 || static_addr >= I3C_BROADCAST_ADDR { + return Err(I3cError::InvalidArgs); + } + // Reject positions outside the implemented DAT. + if usize::from(slot) >= super::constants::MAX_DEVICES_PER_BUS + || u16::from(slot) >= config.maxdevs + { + return Err(I3cError::InvalidArgs); + } + if config + .attached + .by_pos + .get(usize::from(slot)) + .copied() + .flatten() + .is_some() + { + return Err(I3cError::DevAlreadyAttached); + } + if config.i2c_scl_hz == 0 { + return Err(I3cError::InvalidParam); + } + if !config.addrbook.is_free(static_addr) { + return Err(if config.addrbook.is_reserved(static_addr) { + I3cError::InvalidArgs + } else { + I3cError::AddrInUse + }); + } + if config + .attached + .devices + .iter() + .any(|d| d.dyn_addr == static_addr) + { + return Err(I3cError::AddrInUse); + } + + // Program hardware before committing bookkeeping. + hw.attach_i2c_dev(slot.into(), static_addr)?; + + let mut dev = DeviceEntry::new_i2c(static_addr); + dev.pos = Some(slot); + let idx = match config.attached.attach(dev) { + Ok(idx) => idx, + Err(e) => { + hw.detach_i3c_dev(slot.into()); + return Err(e); + } + }; + let idx_u8 = match u8::try_from(idx) { + Ok(idx) => idx, + Err(_) => { + config.attached.detach(idx); + hw.detach_i3c_dev(slot.into()); + return Err(I3cError::InvalidArgs); + } + }; + if !config.attached.map_pos(slot, idx_u8) { + config.attached.detach(idx); + hw.detach_i3c_dev(slot.into()); + return Err(I3cError::NoDatPos); + } + // The static address occupies the same 7-bit space as dynamic ones. + config.addrbook.mark_use(static_addr, true); + Ok(()) + } + + /// Write to a legacy I2C device (by static address). + pub fn i2c_write(&mut self, static_addr: u8, data: &[u8]) -> Result<(), I3cError> { + self.ensure_primary()?; + let (hw, config) = self.parts(); + let pos = config + .attached + .pos_of_static_addr(static_addr) + .ok_or(I3cError::NoSuchDev)?; + let mut ops = [I2cOp::Write(data)]; + hw.i2c_priv_xfer(config, pos, &mut ops) + } + + /// Read from a legacy I2C device (by static address). `out` is filled + /// completely on success. + pub fn i2c_read(&mut self, static_addr: u8, out: &mut [u8]) -> Result<(), I3cError> { + self.ensure_primary()?; + let (hw, config) = self.parts(); + let pos = config + .attached + .pos_of_static_addr(static_addr) + .ok_or(I3cError::NoSuchDev)?; + let mut ops = [I2cOp::Read(out)]; + hw.i2c_priv_xfer(config, pos, &mut ops) + } + + /// Write then read (repeated START between) on a legacy I2C device. + pub fn i2c_write_read( + &mut self, + static_addr: u8, + data: &[u8], + out: &mut [u8], + ) -> Result<(), I3cError> { + self.ensure_primary()?; + let (hw, config) = self.parts(); + let pos = config + .attached + .pos_of_static_addr(static_addr) + .ok_or(I3cError::NoSuchDev)?; + let mut ops = [I2cOp::Write(data), I2cOp::Read(out)]; + hw.i2c_priv_xfer(config, pos, &mut ops) + } + + /// Detach an I3C device by DAT position + pub fn detach_i3c_dev(&mut self, pos: usize) -> Result<(), I3cError> { + self.ensure_primary()?; + // Never touch an aliased or unimplemented DAT position. + if pos >= super::constants::MAX_DEVICES_PER_BUS || pos >= usize::from(self.config.maxdevs) { + return Ok(()); + } + let (hw, config) = self.parts(); + // Release the dynamic address (parity with `detach_i3c_dev_by_idx`), + // or detaching by position would leak it in the address book forever. + let da = config + .attached + .by_pos + .get(pos) + .copied() + .flatten() + .and_then(|idx| config.attached.devices.get(usize::from(idx))) + .map(|dev| (dev.dyn_addr, dev.da_state)); + if da.is_some_and(|(_, state)| state == DaState::Unknown) { + return Err(I3cError::Busy); + } + if let Some((da, _)) = da + && da != 0 + { + config.addrbook.mark_use(da, false); + } + config.attached.detach_by_pos(pos); + hw.detach_i3c_dev(pos); + Ok(()) + } + + /// Detach an I3C device by device index + pub fn detach_i3c_dev_by_idx(&mut self, dev_idx: usize) -> Result<(), I3cError> { + self.ensure_primary()?; + let (hw, config) = self.parts(); + // `get` (not `[dev_idx]`) keeps this panic-free for the `no_panics` + // analysis; an out-of-range index is simply a no-op. + let Some(dev) = config.attached.devices.get(dev_idx) else { + return Ok(()); + }; + if dev.da_state == DaState::Unknown { + return Err(I3cError::Busy); + } + + if dev.dyn_addr != 0 { + let dyn_addr = dev.dyn_addr; + config.addrbook.mark_use(dyn_addr, false); + } + + let dev_pos = config.attached.devices.get(dev_idx).and_then(|dev| dev.pos); + if let Some(pos) = dev_pos { + hw.detach_i3c_dev(pos.into()); + } + + config.attached.detach(dev_idx); + Ok(()) + } + + // ========================================================================= + // Bus Recovery + // ========================================================================= + + /// Recover the I3C bus from a stuck state + /// + /// Performs bus recovery sequence: + /// 1. Enter software (bit-bang) mode + /// 2. Toggle SCL to clear stuck slaves + /// 3. Generate STOP condition + /// 4. Exit software mode + /// + /// # Arguments + /// * `scl_toggles` - Number of SCL toggles (typically 9 to clear a stuck byte) + /// + /// # When to Use + /// + /// - Bus appears hung (transfers timing out) + /// - Device not responding after partial transfer + /// - After detecting SDA stuck low + /// + /// # Example + /// + /// ```rust,ignore + /// // Standard recovery with 9 SCL clocks + /// ctrl.recover_bus(9); + /// + /// // More aggressive recovery + /// ctrl.recover_bus(18); + /// ``` + pub fn recover_bus(&mut self, scl_toggles: u32) -> Result<(), I3cError> { + self.ensure_primary()?; + let (hw, _) = self.parts(); + hw.enter_sw_mode(); + hw.i3c_toggle_scl_in(scl_toggles); + hw.gen_internal_stop(); + hw.exit_sw_mode(); + Ok(()) + } + + /// Perform full bus recovery with controller reset + /// + /// More aggressive recovery that also resets controller FIFOs: + /// 1. Bus recovery (SCL toggle + STOP) + /// 2. Reset TX/RX FIFOs + /// 3. Reset command queue + /// + /// # Arguments + /// * `reset_mask` - Controller components to reset (use `RESET_CTRL_*` constants) + /// + /// # Example + /// + /// ```rust,ignore + /// use aspeed_rust::i3c_core::{RESET_CTRL_RX_FIFO, RESET_CTRL_TX_FIFO, RESET_CTRL_CMD_QUEUE}; + /// + /// // Full recovery with FIFO reset + /// let reset = RESET_CTRL_RX_FIFO | RESET_CTRL_TX_FIFO | RESET_CTRL_CMD_QUEUE; + /// ctrl.recover_bus_full(reset)?; + /// ``` + /// + /// # Errors + /// + /// [`I3cError::Timeout`] if the controller reset bits did not self-clear — + /// the engine is wedged beyond what software recovery can fix. + pub fn recover_bus_full(&mut self, reset_mask: u32) -> Result<(), I3cError> { + self.recover_bus(8)?; + let (hw, _) = self.parts(); + let result = hw.reset_ctrl(reset_mask); + if result.is_err() { + // Block transfers until a successful init. + hw.mark_xfer_faulted(); + } + result + } + + // ========================================================================= + // Accessors + // ========================================================================= + + /// Allocate a dynamic address from `start_addr`. + #[inline] + pub fn alloc_dynamic_address_from(&mut self, start_addr: u8) -> Option { + if self.ensure_primary().is_err() { + return None; + } + let (_, config) = self.parts(); + config.addrbook.alloc_from(start_addr) + } + + /// Return the currently assigned target dynamic address, if any. + /// + /// The address is assigned by the bus master and latched by the ISR into + /// the per-bus event block; the locally configured address (if any) is + /// the fallback. + #[inline] + #[must_use] + pub fn target_dynamic_address(&self) -> Option { + let addr = super::hardware::isr_events(self.hw.bus_num() as usize) + .dyn_addr() + .or_else(|| self.config.target_config.as_ref().and_then(|t| t.addr))?; + // Filter stale or reserved values. + (addr != 0 && !self.config.addrbook.is_reserved(addr)).then_some(addr) + } + + /// Max read/write lengths `(mrl, mwl)` the bus master pushed to this + /// target via SETMRL/SETMWL, if any update was observed. + #[inline] + #[must_use] + pub fn target_max_lengths(&self) -> Option<(u16, u16)> { + super::hardware::isr_events(self.hw.bus_num() as usize).max_len() + } + + /// Set the device's IBI mandatory data byte and enable IBI delivery for `addr`. + pub fn enable_ibi(&mut self, addr: u8, mdb: u8) -> Result<(), I3cError> { + self.ensure_primary()?; + let (hw, config) = self.parts(); + hw.set_ibi_mdb(mdb); + let result = hw.ibi_enable(config, addr); + if let Some(dev) = config + .attached + .devices + .iter_mut() + .find(|d| d.dyn_addr == addr) + { + dev.ibi_state = match result { + Ok(()) => IbiState::Enabled, + Err(I3cError::Timeout | I3cError::RespError) => IbiState::Unknown, + Err(_) => dev.ibi_state, + }; + } + result + } + + /// Disable IBI delivery for `addr` (DISEC + reject its SIRs). + pub fn disable_ibi(&mut self, addr: u8) -> Result<(), I3cError> { + self.ensure_primary()?; + let (hw, config) = self.parts(); + let result = hw.ibi_disable(config, addr); + if let Some(dev) = config + .attached + .devices + .iter_mut() + .find(|d| d.dyn_addr == addr) + { + dev.ibi_state = match result { + Ok(()) => IbiState::Disabled, + Err(I3cError::Timeout | I3cError::RespError | I3cError::AddressNack) => { + IbiState::Unknown + } + Err(_) => dev.ibi_state, + }; + } + result + } + + /// Re-run full hardware initialization and rebuild attached DAT entries. + pub fn reinit(&mut self) -> Result<(), I3cError> { + let (hw, config) = self.parts(); + hw.init(config)?; + for dev in &mut config.attached.devices { + dev.ibi_state = IbiState::Disabled; + } + for i in 0..config.attached.devices.len() { + let Some(dev) = config.attached.devices.get(i) else { + continue; + }; + if let Some(pos) = dev.pos { + let result = match dev.kind { + DevKind::I3c => hw.attach_i3c_dev(pos.into(), dev.dyn_addr), + DevKind::I2c => hw.attach_i2c_dev(pos.into(), dev.static_addr), + }; + if result.is_err() { + hw.mark_xfer_faulted(); + } + result?; + } + } + cortex_m::asm::dmb(); + Ok(()) + } + + /// Issue a private read to `pid`, returning the number of received bytes. + pub fn priv_read(&mut self, pid: u64, out: &mut [u8]) -> Result { + self.ensure_primary()?; + let (hw, config) = self.parts(); + let actual_len = u32::try_from(out.len()).map_err(|_| I3cError::InvalidArgs)?; + let mut msgs = [I3cMsg { + buf: Some(out), + actual_len, + num_xfer: 0, + flags: super::constants::I3C_MSG_READ | super::constants::I3C_MSG_STOP, + hdr_mode: 0, + hdr_cmd_mode: 0, + }]; + hw.priv_xfer(config, pid, &mut msgs)?; + Ok(msgs[0].actual_len) + } + + /// Issue a private write to `pid`. + pub fn priv_write(&mut self, pid: u64, data: &mut [u8]) -> Result<(), I3cError> { + self.ensure_primary()?; + let (hw, config) = self.parts(); + let actual_len = u32::try_from(data.len()).map_err(|_| I3cError::InvalidArgs)?; + let mut msgs = [I3cMsg { + buf: Some(data), + actual_len, + num_xfer: 0, + flags: super::constants::I3C_MSG_WRITE | super::constants::I3C_MSG_STOP, + hdr_mode: 0, + hdr_cmd_mode: 0, + }]; + hw.priv_xfer(config, pid, &mut msgs) + } + + /// Raise a hot-join request from the target side. + pub fn target_raise_hot_join(&mut self) -> Result<(), I3cError> { + let (hw, config) = self.parts(); + hw.target_ibi_raise_hj(config) + } + + // ========================================================================= + // Master / Target operations (Delta D1) + // ========================================================================= + // + // The reference exposed these through `proposed_traits::i3c_master::I3c` + // and the `proposed_traits` target traits (`aspeed-rust/src/i3c/hal_impl.rs`). + // That crate is unavailable in openprot and embedded-hal 1.0 defines no I3C + // trait, so — as the I2C port did for `proposed_traits::i2c_target` — the + // logic is preserved verbatim here as **inherent methods**. The only change + // is that `ErrorKind`-mapped errors become direct `I3cError` variants + // (`DynamicAddressConflict` -> `AddrInUse`, `InvalidCcc` -> `Invalid`). + + /// Assign a dynamic address to the device at `static_address` via ENTDAA, + /// then read back PID/BCR and enable IBI. Returns the assigned address. + pub fn assign_dynamic_address( + &mut self, + static_address: SevenBitAddress, + ) -> Result { + self.ensure_primary()?; + let (hw, config) = self.parts(); + let slot = config + .attached + .pos_of_addr(static_address) + .ok_or(I3cError::AddrInUse)?; + + let dev_idx = config + .attached + .find_dev_idx_by_addr(static_address) + .ok_or(I3cError::Other)?; + + // Do not repeat ENTDAA for an address that may already be claimed. + let already_claimed = config + .attached + .devices + .get(dev_idx) + .is_some_and(|d| d.da_state != DaState::Unassigned); + if !already_claimed { + match hw.do_entdaa(config, slot.into()) { + Ok(()) => config.mark_da_unknown(dev_idx, None), + Err(e @ (I3cError::Timeout | I3cError::RespError)) => { + // The target may have latched the DAT address before the + // controller lost completion. + config.mark_da_unknown(dev_idx, None); + return Err(e); + } + Err(e) => return Err(e), + } + } + + let pid = ccc::ccc_getpid(hw, config, static_address)?; + + let old_pid = config + .attached + .devices + .get(dev_idx) + .ok_or(I3cError::Other)? + .pid; + + if let Some(op) = old_pid + && pid != op + { + // Preserve the claimed state after a PID mismatch. + if let Some(dev) = config.attached.devices.get_mut(dev_idx) { + dev.da_state = DaState::Unknown; + } + return Err(I3cError::Other); + } + + let bcr = ccc::ccc_getbcr(hw, config, static_address)?; + // DCR is optional; only an address NACK is benign. + let dcr = match ccc::ccc_getdcr(hw, config, static_address) { + Ok(dcr) => dcr, + Err(I3cError::AddressNack) => 0, + Err(e) => return Err(e), + }; + + { + let dev = config + .attached + .devices + .get_mut(dev_idx) + .ok_or(I3cError::Other)?; + + dev.pid = Some(pid); + dev.bcr = bcr; + dev.dcr = dcr; + dev.da_state = DaState::Verified; + } + + let dyn_addr: SevenBitAddress = config + .attached + .devices + .get(dev_idx) + .ok_or(I3cError::Other)? + .dyn_addr; + + let ibi_result = hw.ibi_enable(config, dyn_addr); + if let Some(dev) = config.attached.devices.get_mut(dev_idx) { + dev.ibi_state = match ibi_result { + Ok(()) => IbiState::Enabled, + Err(I3cError::Timeout | I3cError::RespError) => IbiState::Unknown, + Err(_) => dev.ibi_state, + }; + } + ibi_result?; + + Ok(dyn_addr) + } + + /// Run dynamic address assignment for every attached I3C device. + /// + /// Multi-device ENTDAA orchestration ported from the vendor C driver's + /// `aspeed_i3c_do_daa`. Walks the DAT slots that still need a verified + /// assignment, lets one device win each ENTDAA, reads its PID back and + /// corrects the two failure shapes the single-device + /// [`assign_dynamic_address`](Self::assign_dynamic_address) cannot: + /// + /// - **Mis-assignment**: with several unassigned targets on the bus, any + /// of them may answer the ENTDAA issued for another device's slot (bus + /// arbitration picks the winner). The winner is moved to its own + /// expected address via SETNEWDA and the slot is retried for its + /// intended owner. + /// - **Unsolicited device**: a target whose PID matches no attached entry + /// is parked on a freshly allocated address so it stops answering + /// subsequent ENTDAAs. + /// + /// Returns the number of devices verified in this run, but only when every + /// attached device that needed an address was verified. If ENTDAA reports + /// no more responders while entries are still pending, returns + /// [`I3cError::DaaNack`] instead of reporting a partial success. IBIs are + /// not enabled here — call [`enable_ibi`](Self::enable_ibi) per device + /// afterwards. + pub fn bus_daa(&mut self) -> Result { + self.ensure_primary()?; + let (hw, config) = self.parts(); + let ndevs = config.attached.by_pos.len(); + + // DAT positions still needing a verified assignment. + let mut need: u32 = 0; + for idx in 0..config.attached.devices.len() { + let Some(dev) = config.attached.devices.get(idx) else { + continue; + }; + if dev.kind == DevKind::I3c + && dev.pid.is_some() + && dev.da_state == DaState::Unassigned + && let Some(pos) = dev.pos + { + // pos < 8 enforced by attach_i3c_dev. + need |= 1u32 << pos; + } + } + + let mut verified = 0u32; + let mut pos = 0usize; + let mut normal_nack = false; + // Hang guard only: every lap either clears a `need` bit, parks an + // unsolicited device (finite), or exits via the ENTDAA break below. + let mut budget = 8 * (ndevs as u32); + while need != 0 && budget != 0 { + budget -= 1; + + if need & (1u32 << pos) == 0 { + pos = (pos + 1) % ndevs; + continue; + } + + // The address the ENTDAA winner will latch: the DAT slot was + // programmed with its owner's desired address at attach time. + let Some(addr) = config + .attached + .by_pos + .get(pos) + .copied() + .flatten() + .and_then(|idx| config.attached.devices.get(usize::from(idx))) + .map(|d| d.desired_da) + else { + // Stale bit with no mapped device — drop it. + need &= !(1u32 << pos); + pos = (pos + 1) % ndevs; + continue; + }; + + let provisional_idx = config + .attached + .by_pos + .get(pos) + .copied() + .flatten() + .map(usize::from); + + match hw.do_entdaa(config, pos as u32) { + Ok(()) => {} + // Address NACK normally ends DAA. + Err(I3cError::DaaNack) => { + normal_nack = true; + break; + } + Err(e @ (I3cError::Timeout | I3cError::RespError)) => { + // ENTDAA may have assigned this slot before completion was + // lost. Never retry it as unassigned. + if let Some(idx) = provisional_idx { + config.mark_da_unknown(idx, None); + } + return Err(e); + } + Err(e) => return Err(e), + } + + // Mark the claimed address unknown until GETPID identifies it. + if let Some(idx) = provisional_idx { + config.mark_da_unknown(idx, None); + } + + let pid = match ccc::ccc_getpid(hw, config, addr) { + Ok(pid) => pid, + // The address is claimed; retrying ENTDAA could collide. + Err(e) => { + // Only RSTDAA can safely clear this unknown owner. + if let Some(dev) = + provisional_idx.and_then(|idx| config.attached.devices.get_mut(idx)) + { + dev.da_state = DaState::Unknown; + } + return Err(e); + } + }; + + let owner = config + .attached + .devices + .iter() + .position(|d| d.pid == Some(pid)); + match owner { + Some(idx) => { + let expected = config + .attached + .devices + .get(idx) + .map_or(addr, |d| d.desired_da); + if expected == addr { + // The intended device answered its own slot. + let bcr = ccc::ccc_getbcr(hw, config, addr)?; + let dcr = match ccc::ccc_getdcr(hw, config, addr) { + Ok(dcr) => dcr, + Err(I3cError::AddressNack) => 0, + Err(e) => return Err(e), + }; + if let Some(dev) = config.attached.devices.get_mut(idx) { + dev.bcr = bcr; + dev.dcr = dcr; + dev.da_state = DaState::Verified; + } + need &= !(1u32 << pos); + verified += 1; + } else { + let setnewda_result = + ccc::ccc_setnewda_bus_only(hw, config, addr, expected); + // Probe ambiguous moves before freeing the old slot. + let move_ambiguous = matches!( + setnewda_result, + Err(I3cError::Timeout | I3cError::RespError) + ); + if setnewda_result.is_ok() || move_ambiguous { + if setnewda_result.is_ok() + && let Some(dev) = + provisional_idx.and_then(|i| config.attached.devices.get_mut(i)) + { + dev.da_state = DaState::Unassigned; + } + if let Some(dev) = config.attached.devices.get_mut(idx) { + dev.da_state = DaState::Unknown; + } + // Verify the winner at its expected address. + let bcr = ccc::ccc_getbcr(hw, config, expected)?; + let dcr = match ccc::ccc_getdcr(hw, config, expected) { + Ok(dcr) => dcr, + Err(I3cError::AddressNack) => 0, + Err(e) => return Err(e), + }; + if move_ambiguous + && let Some(dev) = + provisional_idx.and_then(|i| config.attached.devices.get_mut(i)) + { + // The probe confirmed the move. + dev.da_state = DaState::Unassigned; + } + if let Some(dev) = config.attached.devices.get_mut(idx) { + dev.bcr = bcr; + dev.dcr = dcr; + dev.da_state = DaState::Verified; + } + if let Some(own_pos) = config + .attached + .pos_of(idx) + .or_else(|| config.attached.devices.get(idx).and_then(|d| d.pos)) + { + need &= !(1u32 << u32::from(own_pos)); + } + verified += 1; + // Retry this slot for its intended owner. + } else { + // A definite move failure leaves the slot occupied. + return Err(setnewda_result.err().unwrap_or(I3cError::Other)); + } + } + } + None => { + // Unknown PID: park it on a fresh address so it stops + // answering ENTDAA for slots it does not own. + let Some(park) = config.addrbook.alloc_from(8) else { + return Err(I3cError::AddrExhausted); + }; + config.addrbook.mark_use(park, true); + match ccc::ccc_setnewda_bus_only(hw, config, addr, park) { + Ok(()) => { + if let Some(dev) = + provisional_idx.and_then(|i| config.attached.devices.get_mut(i)) + { + dev.da_state = DaState::Unassigned; + } + } + Err(e @ (I3cError::Timeout | I3cError::RespError)) => { + // Keep an ambiguously adopted parking address reserved. + if let Some(idx) = provisional_idx { + config.mark_da_unknown(idx, Some(park)); + } + return Err(e); + } + Err(e) => { + // Release a definitely unused parking address. + config.addrbook.mark_use(park, false); + return Err(e); + } + } + // Retry this slot without advancing. + continue; + } + } + + pos = (pos + 1) % ndevs; + } + + if need == 0 { + Ok(verified) + } else if normal_nack { + // A normal ENTDAA NACK ends discovery, but attached devices are + // still pending. Do not report a partial assignment as success. + Err(I3cError::DaaNack) + } else { + // The retry budget expired with assignments pending. + Err(I3cError::AddrExhausted) + } + } + + /// Acknowledge an IBI from `address` (validates the device is known). + pub fn acknowledge_ibi(&mut self, address: SevenBitAddress) -> Result<(), I3cError> { + self.ensure_primary()?; + let (_, config) = self.parts(); + let dev_idx = config + .attached + .find_dev_idx_by_addr(address) + .ok_or(I3cError::Other)?; + + // `get` (not `[dev_idx]`) keeps this panic-free for the `no_panics` + // analysis; `find_dev_idx_by_addr` already returns a valid index. + let dev = config + .attached + .devices + .get(dev_idx) + .ok_or(I3cError::Other)?; + if dev.pid.is_none() || dev.da_state != DaState::Verified { + return Err(I3cError::Other); + } + + Ok(()) + } + + /// Hot-join handler hook. Call [`assign_dynamic_address`](Self::assign_dynamic_address) + /// after receiving a hot-join IBI; nothing else is required here. + #[allow(clippy::unused_self)] + pub fn handle_hot_join(&mut self) -> Result<(), I3cError> { + self.ensure_primary()?; + Ok(()) + } + + /// Bus speed is fixed on the AST1060 controller; this is a no-op. + #[allow(clippy::unused_self)] + pub fn set_bus_speed(&mut self) -> Result<(), I3cError> { + self.ensure_primary()?; + Ok(()) + } + + /// Multi-master mode is unsupported. + #[allow(clippy::unused_self)] + pub fn request_mastership(&mut self) -> Result<(), I3cError> { + Err(I3cError::Access) + } + + // --- Target (secondary) mode callbacks --- + + /// Initialize target-mode software state with `own_addr`. + pub fn target_init(&mut self, own_addr: u8) { + let (_, config) = self.parts(); + if let Some(target) = config.target_config.as_mut() { + if target.addr.is_none() { + target.addr = Some(own_addr); + } + } else { + let mut target = I3cTargetConfig::new(0, Some(own_addr), /* mdb */ 0xae); + target.addr = Some(own_addr); + config.target_config = Some(target); + } + } + + /// Returns `true` if `addr` matches this target's assigned address. + #[must_use] + pub fn target_on_address_match(&self, addr: u8) -> bool { + self.target_dynamic_address() == Some(addr) + } + + /// Record that the controller assigned this target a dynamic address; SIRs + /// are then permitted by software. Also syncs the ISR-latched address into + /// the thread-owned target config. + /// + /// **Timing caveat (vendor C driver parity):** the C driver delays this + /// permission by one second after the DA assignment (`target_worker`), + /// because a controller that has not yet finished ENTDAA/DISEC sequencing + /// can be confused by an immediate SIR. This port has no timer, so the + /// caller owns that delay — wait ~1 s after the `TargetDaAssignment` work + /// item before calling this if the bus master is slow to settle. + pub fn target_on_dynamic_address_assigned(&mut self) { + // Require an ISR-confirmed dynamic address. + let Some(da) = super::hardware::isr_events(self.hw.bus_num() as usize).dyn_addr() else { + return; + }; + if let Some(tc) = self.config.target_config.as_mut() { + tc.addr = Some(da); + } + self.config.sir_allowed_by_sw = true; + } + + /// This target always wants to raise IBIs when it has data. + #[must_use] + #[allow(clippy::unused_self)] + pub fn target_wants_ibi(&self) -> bool { + true + } + + /// Build and submit the IBI payload `[mdb, crc8_ccitt(addr_rnw, mdb)]` for a + /// pending target read, returning the number of bytes made available. + pub fn target_get_ibi_payload(&mut self, buffer: &mut [u8]) -> Result { + let (hw, config) = self.parts(); + let (da, mdb) = match config.target_config.as_ref() { + Some(t) => ( + match t.addr { + Some(da) => da, + None => return Ok(0), + }, + t.mdb, + ), + None => return Ok(0), + }; + + let addr_rnw = (da << 1) | 0x1; + let mut crc = crc8_ccitt(0, &[addr_rnw]); + crc = crc8_ccitt(crc, &[mdb]); + + let payload = [mdb, crc]; + let mut ibi = I3cIbi { + ibi_type: I3cIbiType::TargetIntr, + payload: Some(&payload), + }; + let rc = hw.target_pending_read_notify(config, buffer, &mut ibi); + + match rc { + Ok(()) => Ok(buffer.len() + payload.len()), + Err(e) => Err(e), + } + } +} + +// ============================================================================= +// embedded-hal I2C bus implementation (legacy I2C devices on the I3C bus) +// ============================================================================= + +impl<'c, H: HardwareInterface> embedded_hal::i2c::ErrorType for I3cController<'c, H, Ready> { + type Error = I3cError; +} + +impl<'c, H: HardwareInterface> embedded_hal::i2c::I2c for I3cController<'c, H, Ready> { + /// Execute an I2C transaction against an attached legacy I2C device. + /// + /// The device must have been attached with + /// [`attach_i2c_dev`](Self::attach_i2c_dev) first (the controller + /// addresses devices through DAT slots, not free-form). Consecutive + /// operations are joined by repeated START; the last one ends with STOP. + fn transaction( + &mut self, + address: SevenBitAddress, + operations: &mut [embedded_hal::i2c::Operation<'_>], + ) -> Result<(), I3cError> { + self.ensure_primary()?; + let (hw, config) = self.parts(); + let pos = config + .attached + .pos_of_static_addr(address) + .ok_or(I3cError::NoSuchDev)?; + + if operations.is_empty() { + return Ok(()); + } + if operations.len() > MAX_PRIV_XFER_CMDS { + return Err(I3cError::TooManyMsgs); + } + // Validate before borrowing caller buffers. + for op in operations.iter() { + let len = match op { + embedded_hal::i2c::Operation::Write(buf) => buf.len(), + embedded_hal::i2c::Operation::Read(buf) => buf.len(), + }; + if len == 0 || len > MAX_XFER_DATA_LEN { + return Err(I3cError::InvalidArgs); + } + } + + let mut ops: heapless::Vec, MAX_PRIV_XFER_CMDS> = heapless::Vec::new(); + for op in operations.iter_mut() { + let mapped = match op { + embedded_hal::i2c::Operation::Write(buf) => I2cOp::Write(&**buf), + embedded_hal::i2c::Operation::Read(buf) => I2cOp::Read(&mut **buf), + }; + ops.push(mapped).map_err(|_| I3cError::TooManyMsgs)?; + } + + hw.i2c_priv_xfer(config, pos, ops.as_mut_slice()) + } +} + +/// CRC-8 CCITT calculation (ported from `hal_impl.rs`). +#[inline] +fn crc8_ccitt(mut crc: u8, data: &[u8]) -> u8 { + for &b in data { + let mut x = crc ^ b; + for _ in 0..8 { + x = if (x & 0x80) != 0 { + (x << 1) ^ 0x07 + } else { + x << 1 + }; + } + crc = x; + } + crc +} diff --git a/target/ast10x0/peripherals/i3c/error.rs b/target/ast10x0/peripherals/i3c/error.rs new file mode 100644 index 00000000..ac79e3ce --- /dev/null +++ b/target/ast10x0/peripherals/i3c/error.rs @@ -0,0 +1,129 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! I3C error types +//! +//! Consolidated error types for the I3C subsystem. +//! +//! Ported from `aspeed-rust/src/i3c/error.rs` @ ce3b567. The +//! `proposed_traits::i3c_master::Error` impl is dropped (Delta D1): that trait +//! is unavailable in openprot, and the master operations are exposed as +//! inherent methods that return `I3cError` directly. + +use core::fmt; + +/// Primary error type for I3C operations +#[derive(Debug, Copy, Clone, PartialEq, Eq)] +pub enum I3cError { + /// No DAT (Device Address Table) position available + NoDatPos, + /// No messages provided for transfer + NoMsgs, + /// Too many messages for single transfer + TooManyMsgs, + /// Invalid arguments provided + InvalidArgs, + /// Operation timed out + Timeout, + /// Device not found + NoSuchDev, + /// Access denied or not permitted + Access, + /// Generic I/O error + IoError, + /// Invalid operation or state + Invalid, + /// Transfer completed but response status indicated failure; unlike + /// `Timeout`, it may already have taken effect at the target. + RespError, + /// ENTDAA address-phase NACK: no unassigned device answered (expected + /// end of a DAA walk, not a fault like other `RespError` cases). + DaaNack, + /// Target-address phase NACK on a direct transfer, e.g. unsupported + /// optional CCC — kept distinct from other response failures. + AddressNack, + /// Address already in use + AddrInUse, + /// Address space exhausted + AddrExhausted, + /// No free slot available + NoFreeSlot, + /// Device not found in attached list + DevNotFound, + /// Device already attached + DevAlreadyAttached, + /// Invalid parameter + InvalidParam, + /// CCC (Common Command Code) error + CccError(CccErrorKind), + /// Resource (bus IRQ slot) already claimed by another controller + Busy, + /// Other unspecified error + Other, +} + +impl fmt::Display for I3cError { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + match self { + Self::NoDatPos => write!(f, "no DAT position available"), + Self::NoMsgs => write!(f, "no messages provided"), + Self::TooManyMsgs => write!(f, "too many messages"), + Self::InvalidArgs => write!(f, "invalid arguments"), + Self::Timeout => write!(f, "operation timed out"), + Self::NoSuchDev | Self::DevNotFound => write!(f, "device not found"), + Self::Access => write!(f, "access denied"), + Self::IoError => write!(f, "I/O error"), + Self::Invalid => write!(f, "invalid operation"), + Self::RespError => write!(f, "transfer response indicated failure"), + Self::DaaNack => write!(f, "ENTDAA: no unassigned device answered"), + Self::AddressNack => write!(f, "target address was not acknowledged"), + Self::AddrInUse => write!(f, "address in use"), + Self::AddrExhausted => write!(f, "address space exhausted"), + Self::NoFreeSlot => write!(f, "no free slot"), + Self::DevAlreadyAttached => write!(f, "device already attached"), + Self::InvalidParam => write!(f, "invalid parameter"), + Self::CccError(kind) => write!(f, "CCC error: {kind:?}"), + Self::Busy => write!(f, "resource busy"), + Self::Other => write!(f, "other error"), + } + } +} + +/// CCC-specific error kinds +#[derive(Debug, Copy, Clone, PartialEq, Eq)] +pub enum CccErrorKind { + /// Invalid parameter for CCC + InvalidParam, + /// Target not found + NotFound, + /// No free slot for CCC operation + NoFreeSlot, + /// Invalid CCC response or operation + Invalid, +} + +/// Convenience Result type for I3C operations +pub type Result = core::result::Result; + +impl From for I3cError { + #[inline] + fn from(kind: CccErrorKind) -> Self { + Self::CccError(kind) + } +} + +/// Implement embedded-hal I2C error trait for interoperability +impl embedded_hal::i2c::Error for I3cError { + fn kind(&self) -> embedded_hal::i2c::ErrorKind { + match self { + Self::Timeout => embedded_hal::i2c::ErrorKind::NoAcknowledge( + embedded_hal::i2c::NoAcknowledgeSource::Unknown, + ), + Self::NoSuchDev | Self::DevNotFound => embedded_hal::i2c::ErrorKind::NoAcknowledge( + embedded_hal::i2c::NoAcknowledgeSource::Address, + ), + Self::IoError | Self::Access => embedded_hal::i2c::ErrorKind::Bus, + _ => embedded_hal::i2c::ErrorKind::Other, + } + } +} diff --git a/target/ast10x0/peripherals/i3c/hardware.rs b/target/ast10x0/peripherals/i3c/hardware.rs new file mode 100644 index 00000000..9e9612c2 --- /dev/null +++ b/target/ast10x0/peripherals/i3c/hardware.rs @@ -0,0 +1,2404 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! I3C Hardware Interface +//! +//! Defines the hardware abstraction traits and IRQ handling infrastructure. +//! +//! # Trait Hierarchy +//! +//! The hardware interface is split into focused sub-traits: +//! +//! ```text +//! HardwareInterface (supertrait) +//! ├── HardwareCore - Init, IRQ, enable/disable +//! ├── HardwareClock - Clock configuration +//! ├── HardwareFifo - FIFO operations +//! ├── HardwareTransfer - Transfers, CCC, device management +//! ├── HardwareRecovery - SW mode, bus recovery +//! └── HardwareTarget - Target mode operations +//! ``` +//! +//! # Platform Initialization +//! +//! SCU operations (clock enable, reset control) are **not** part of these traits. +//! They should be performed by the platform/board layer before creating the +//! I3C controller. + +use core::cell::UnsafeCell; +use critical_section::Mutex; + +use super::ccc::{ccc_events_set, CccPayload}; +use super::config::{DaState, I3cConfig, I3C_MIN_CORE_CLK_SDR}; +use super::constants::{ + bit, field_get, field_prep, CM_TFR_STS_MASTER_HALT, CM_TFR_STS_TARGET_HALT, + COMMAND_ATTR_ADDR_ASSGN_CMD, COMMAND_ATTR_SLAVE_DATA_CMD, COMMAND_ATTR_XFER_ARG, + COMMAND_ATTR_XFER_CMD, COMMAND_PORT_ARG_DATA_LEN, COMMAND_PORT_ARG_DB, COMMAND_PORT_ATTR, + COMMAND_PORT_CMD, COMMAND_PORT_CP, COMMAND_PORT_DBP, COMMAND_PORT_DEV_COUNT, + COMMAND_PORT_DEV_INDEX, COMMAND_PORT_READ_TRANSFER, COMMAND_PORT_ROC, COMMAND_PORT_SPEED, + COMMAND_PORT_TID, COMMAND_PORT_TOC, DEV_ADDR_TABLE_IBI_MDB, DEV_ADDR_TABLE_IBI_PEC, + DEV_ADDR_TABLE_LEGACY_I2C_DEV, DEV_ADDR_TABLE_MR_REJECT, DEV_ADDR_TABLE_SIR_REJECT, + DEV_ADDR_TABLE_STATIC_ADDR, I3CG_REG1_SCL_IN_SW_MODE_EN, I3CG_REG1_SCL_IN_SW_MODE_VAL, + I3CG_REG1_SDA_IN_SW_MODE_EN, I3CG_REG1_SDA_IN_SW_MODE_VAL, I3C_AST10X0_MIPI_MANUF_ID, + I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE, I3C_BUS_FREE_TIMING_RESET, I3C_BUS_I2C_FMP_TF_MAX_NS, + I3C_BUS_I2C_FMP_THIGH_MIN_NS, I3C_BUS_I2C_FMP_TLOW_MIN_NS, I3C_BUS_I2C_FMP_TR_MAX_NS, + I3C_BUS_I2C_FM_TF_MAX_NS, I3C_BUS_I2C_FM_THIGH_MIN_NS, I3C_BUS_I2C_FM_TLOW_MIN_NS, + I3C_BUS_I2C_FM_TR_MAX_NS, I3C_BUS_I2C_STD_TF_MAX_NS, I3C_BUS_I2C_STD_THIGH_MIN_NS, + I3C_BUS_I2C_STD_TLOW_MIN_NS, I3C_BUS_I2C_STD_TR_MAX_NS, I3C_BUS_THIGH_MAX_NS, I3C_CCC_DEVCTRL, + I3C_CCC_ENTDAA, I3C_CCC_EVT_INTR, I3C_CCC_GETBCR, I3C_CCC_GETDCR, I3C_CCC_GETMRL, + I3C_CCC_GETMWL, I3C_CCC_GETMXDS, I3C_CCC_GETPID, I3C_CCC_GETSTATUS, I3C_CCC_SETHID, + I3C_CCC_SETNEWDA, I3C_CTRL_POLL_DELAY_NS, I3C_DEFAULT_STATIC_ADDR, + I3C_GLOBAL_RESET_DEASSERT_MASK, I3C_IBI_DATA_THRESHOLD_MAX, I3C_INIT_POLL_DELAY_NS, + I3C_INTR_STATUS_ALL_BITS, I3C_MSG_READ, I3C_OP_TIMEOUT_US, I3C_POLL_MAX_ITERS, + IBIQ_STATUS_IBI_DATA_LEN, IBIQ_STATUS_IBI_DATA_LEN_SHIFT, IBIQ_STATUS_IBI_ID, + IBIQ_STATUS_IBI_ID_SHIFT, INTR_CCC_UPDATED_STAT, INTR_DYN_ADDR_ASSGN_STAT, INTR_IBI_THLD_STAT, + INTR_RESP_READY_STAT, INTR_TRANSFER_ABORT_STAT, INTR_TRANSFER_ERR_STAT, MAX_CMDS, + MAX_DEVICES_PER_BUS, MAX_PRIV_XFER_CMDS, MAX_XFER_DATA_LEN, NSEC_PER_SEC, RESET_CTRL_ALL, + RESET_CTRL_QUEUES, RESET_CTRL_XFER_QUEUES, RESPONSE_ERROR_ADDRESS_NACK, + RESPONSE_ERROR_IBA_NACK, RESPONSE_PORT_DATA_LEN_MASK, RESPONSE_PORT_DATA_LEN_SHIFT, + RESPONSE_PORT_ERR_STATUS_MASK, RESPONSE_PORT_ERR_STATUS_SHIFT, RESPONSE_PORT_TID_MASK, + RESPONSE_PORT_TID_SHIFT, SDA_TX_HOLD_MASK, SDA_TX_HOLD_MAX, SDA_TX_HOLD_MIN, SLV_DCR_MASK, + SLV_EVENT_CTRL_MRL_UPD, SLV_EVENT_CTRL_MWL_UPD, SLV_EVENT_CTRL_SIR_EN, +}; +use super::error::I3cError as I3cDrvError; +use super::error::I3cError; +use super::ibi as ibi_workq; +use super::types::{ + Completion, DevKind, I2cOp, I3cCmd, I3cIbi, I3cMsg, I3cXfer, SpeedI2c, SpeedI3c, Tid, +}; + +use super::registers::I3cRegisters; +use core::sync::atomic::{AtomicBool, AtomicU32, Ordering}; + +// ============================================================================= +// IRQ Handler Infrastructure +// ============================================================================= +// +// The ISR fabricates NO `&mut` over any thread-owned object. It works only +// with: +// - its own `I3cRegisters` handle (all methods take `&self`), stored in the +// per-bus registry below; +// - the per-bus `ISR_EVENTS` atomics; +// - the global IBI work rings (`ibi.rs`). +// Master transfer completion is flag-and-defer (the ISR masks the sources and +// latches the status; the polling thread drains the response queue itself), +// so there is no ISR/thread `&mut` aliasing and no transfer-pointer handoff. + +/// Everything the ISR needs for one bus. Built by +/// [`Ast1060I3c::isr_ctx`] and parked in the per-bus registry at +/// [`I3cController::start`](super::controller::I3cController::start). +pub struct IsrCtx { + /// ISR-side register handle. A second `I3cRegisters` for the same bus as + /// the driver's own — sound for MMIO (no Rust memory is aliased), and + /// device-access serialization holds because the single-core ISR runs + /// atomically with respect to the thread. + regs: I3cRegisters, + /// Role selected at `start()` (the ISR must not read the thread-owned + /// config). + is_secondary: bool, +} + +// SAFETY: `IsrCtx` holds raw MMIO pointers (valid from any execution context +// on this single-address-space target) and a bool; parking it in the +// critical-section-guarded registry below is sound. +unsafe impl Send for IsrCtx {} + +// INTENTIONAL EXCEPTION to borrow-arbitrated exclusivity: this per-bus +// dispatch table is process-global mutable state, because an ISR cannot +// borrow a stack-owned controller — the global registry is the structural +// price of IRQ dispatch (same rationale as `IBI_RINGS` in `ibi.rs`, ADR-3). +// It is bounded (one slot per bus, claimed once via the single-shot +// `register_i3c_irq_handler`) and serialized by the critical section. +// +// `UnsafeCell` (not `RefCell`): mutual exclusion comes from the critical +// section, and the access helpers below are leaf functions (no caller code +// runs while the reference is live), so the `RefCell` runtime borrow flag +// would only add a reachable panic path that the `no_panics` analysis must +// reject. +static BUS_ISR: [Mutex>>; 4] = [ + Mutex::new(UnsafeCell::new(None)), + Mutex::new(UnsafeCell::new(None)), + Mutex::new(UnsafeCell::new(None)), + Mutex::new(UnsafeCell::new(None)), +]; + +/// Per-bus ISR↔thread signal block: plain atomics, written by the ISR and +/// consumed by the polling thread. Part of the same intentional global-state +/// exception as the registry above. +pub(crate) struct IsrEvents { + /// Latched interrupt-status bits deferred to the thread (master + /// completion path). + pending: AtomicU32, + /// Dynamic address assigned by the bus master; bit 8 = valid. + dyn_addr: AtomicU32, + /// Raw `SLV_MAX_LEN` (MRL in bits 31:16, MWL in bits 15:0). + slv_max_len: AtomicU32, + slv_max_len_valid: AtomicBool, + /// A deferred fault: the ISR observed a halted/errored engine and left + /// recovery (halt/resume sequencing needs the wait policy) to the thread. + fault: AtomicBool, + /// Target mode: the SIR (IBI) command completed. + pub(crate) target_ibi_done: Completion, + /// Target mode: the pending-read data was fetched by the master. + pub(crate) target_data_done: Completion, +} + +impl IsrEvents { + const fn new() -> Self { + Self { + pending: AtomicU32::new(0), + dyn_addr: AtomicU32::new(0), + slv_max_len: AtomicU32::new(0), + slv_max_len_valid: AtomicBool::new(false), + fault: AtomicBool::new(false), + target_ibi_done: Completion::new(), + target_data_done: Completion::new(), + } + } + + /// Atomically take (read-and-clear) the latched status bits. + pub(crate) fn take_pending(&self) -> u32 { + self.pending.swap(0, Ordering::AcqRel) + } + + pub(crate) fn clear_pending(&self) { + self.pending.store(0, Ordering::Release); + } + + /// Atomically take (read-and-clear) the deferred-fault flag. + pub(crate) fn take_fault(&self) -> bool { + self.fault.swap(false, Ordering::AcqRel) + } + + /// Dynamic address assigned by the master, if any. + pub(crate) fn dyn_addr(&self) -> Option { + let v = self.dyn_addr.load(Ordering::Acquire); + if v & 0x100 != 0 { + Some((v & 0x7f) as u8) + } else { + None + } + } + + pub(crate) fn max_len(&self) -> Option<(u16, u16)> { + if !self.slv_max_len_valid.load(Ordering::Acquire) { + return None; + } + let value = self.slv_max_len.load(Ordering::Acquire); + Some(((value >> 16) as u16, (value & 0xffff) as u16)) + } + + /// Clear all ISR-latched state after reinitialization. + pub(crate) fn reset(&self) { + self.pending.store(0, Ordering::Release); + self.dyn_addr.store(0, Ordering::Release); + self.slv_max_len.store(0, Ordering::Release); + self.slv_max_len_valid.store(false, Ordering::Release); + self.fault.store(false, Ordering::Release); + self.target_ibi_done.reset(); + self.target_data_done.reset(); + } +} + +static ISR_EVENTS: [IsrEvents; 4] = [ + IsrEvents::new(), + IsrEvents::new(), + IsrEvents::new(), + IsrEvents::new(), +]; + +/// Per-bus ISR event block (clamps an out-of-range bus to 0, which a +/// constructed driver can never pass). +#[inline] +pub(crate) fn isr_events(bus: usize) -> &'static IsrEvents { + ISR_EVENTS.get(bus).unwrap_or(&ISR_EVENTS[0]) +} + +/// Register the ISR context for an I3C bus. +/// +/// Single-shot per bus: the first registration claims the slot, mirroring the +/// one-controller-per-physical-bus contract of [`Ast1060I3c::new`]. Returns +/// `false` (and leaves the existing context in place) if `bus` is out of range +/// or the slot is already claimed. +/// +/// Once claimed the slot is normally held for the program's lifetime; the only +/// release is the bring-up failure path via [`unregister_i3c_irq_handler`], so +/// a subsequent registration can succeed after a failed `start()`. +#[must_use] +pub fn register_i3c_irq_handler(bus: usize, ctx: IsrCtx) -> bool { + let Some(slot) = BUS_ISR.get(bus) else { + return false; + }; + critical_section::with(|cs| { + // SAFETY: the critical section excludes ISR/thread concurrency, and + // the `&mut` never escapes this leaf function, so this is the only + // live reference to the slot. + let parked: &mut Option = unsafe { &mut *slot.borrow(cs).get() }; + if parked.is_some() { + return false; + } + *parked = Some(ctx); + true + }) +} + +/// Release a bus's ISR slot. +/// +/// Only for the bring-up failure path: `I3cController::start` claims the slot +/// *before* programming the hardware (the claim is the exclusivity gate), so +/// if `init` then fails the claim must be released or every retry would see +/// [`I3cError::Busy`](super::error::I3cError::Busy) forever. +/// +/// # Caution +/// +/// This clears the slot by bus alone — it does *not* verify which controller +/// owns the parked context. Call it only from the failure path of the same +/// `start()` that claimed the slot; calling it once a controller is live would +/// drop the in-use ISR context. Kept `pub(crate)` for that reason. +pub(crate) fn unregister_i3c_irq_handler(bus: usize) { + let Some(slot) = BUS_ISR.get(bus) else { + return; + }; + critical_section::with(|cs| { + // SAFETY: same argument as `register_i3c_irq_handler` — the critical + // section excludes ISR/thread concurrency and the `&mut` never + // escapes this leaf function. + let parked: &mut Option = unsafe { &mut *slot.borrow(cs).get() }; + *parked = None; + }); +} + +// NVIC ownership (Delta D6): the driver does not touch the NVIC and exposes +// no interrupt-line mapping. The kernel/integration layer owns the top-level +// vector *and* the line mask; it selects the bus, so it also knows the line +// (the platform interrupt line) to unmask after `start()` and to mask on +// teardown. This keeps the driver above the register facade entirely free of +// PAC types. + +/// Dispatch IRQ for a specific bus. +/// +/// Called by the actual IRQ entry points (defined in the kernel integration +/// layer). Runs the service routine inside the critical section: we are +/// already in interrupt context, so no thread can be blocked by it, and the +/// section guarantees the registry slot is not concurrently replaced. +#[inline] +pub fn dispatch_i3c_irq(bus: usize) { + critical_section::with(|cs| { + let Some(slot) = BUS_ISR.get(bus) else { + return; + }; + // SAFETY: the critical section excludes the writer + // (`register_i3c_irq_handler`); the shared reference never escapes + // this leaf closure. + let parked: &Option = unsafe { &*slot.borrow(cs).get() }; + if let Some(ctx) = parked { + isr_service(ctx); + } + }); +} + +// ============================================================================= +// ISR service routines — `&self`/atomics only, no `&mut` anywhere +// ============================================================================= + +/// Top-level I3C interrupt service. Touches only the ISR-side register +/// handle, the per-bus atomics, and the global IBI rings. +fn isr_service(ctx: &IsrCtx) { + let regs = &ctx.regs; + let status = regs.read_intr_status(); + if status == 0 { + return; + } + let bus = regs.bus() as usize; + let events = isr_events(bus); + + if ctx.is_secondary { + if status & INTR_DYN_ADDR_ASSGN_STAT != 0 { + let da = u32::from(regs.dynamic_addr()); + events.dyn_addr.store(0x100 | da, Ordering::Release); + if !ibi_workq::i3c_ibi_work_enqueue_target_da_assignment(bus) { + events.fault.store(true, Ordering::Release); + } + } + + if (status & INTR_RESP_READY_STAT) != 0 { + isr_target_responses(regs, events, bus); + } + + if (status & INTR_CCC_UPDATED_STAT) != 0 { + // Read-and-clear the event; if the engine halted, defer the + // resume sequencing (it needs the wait policy) to the thread. + let event = regs.read_slv_event_ctrl(); + if event & (SLV_EVENT_CTRL_MRL_UPD | SLV_EVENT_CTRL_MWL_UPD) != 0 { + events + .slv_max_len + .store(regs.read_slv_max_len(), Ordering::Release); + events.slv_max_len_valid.store(true, Ordering::Release); + } + regs.write_slv_event_ctrl(event); + if regs.xfer_status() == CM_TFR_STS_TARGET_HALT { + events.fault.store(true, Ordering::Release); + } + } + } else { + if (status & (INTR_RESP_READY_STAT | INTR_TRANSFER_ERR_STAT | INTR_TRANSFER_ABORT_STAT)) + != 0 + { + // Flag-and-defer (the SMC model): mask the sources so the level + // status cannot refire, latch the bits; the polling thread drains + // the response queue itself and re-enables the sources. + regs.mask_master_xfer_irqs(); + events.pending.fetch_or( + status & (INTR_RESP_READY_STAT | INTR_TRANSFER_ERR_STAT | INTR_TRANSFER_ABORT_STAT), + Ordering::AcqRel, + ); + } + + if (status & INTR_IBI_THLD_STAT) != 0 { + isr_master_ibis(regs, bus); + } + } + + regs.clear_intr_status(status); +} + +/// Target mode: service the response queue from the ISR (master writes and +/// SIR/read completions arrive whether or not a thread is waiting, and the +/// hardware queues are shallow — this is the IBI plane that cannot defer). +fn isr_target_responses(regs: &I3cRegisters, events: &IsrEvents, bus: usize) { + let nresp = regs.resp_buf_level(); + + for _ in 0..nresp { + let resp = regs.pop_response(); + + let tid = field_get(resp, RESPONSE_PORT_TID_MASK, RESPONSE_PORT_TID_SHIFT) as usize; + let rx_len = field_get( + resp, + RESPONSE_PORT_DATA_LEN_MASK, + RESPONSE_PORT_DATA_LEN_SHIFT, + ) as usize; + let err = field_get( + resp, + RESPONSE_PORT_ERR_STATUS_MASK, + RESPONSE_PORT_ERR_STATUS_SHIFT, + ); + + if err != 0 { + // Recovery needs halt/resume sequencing (wait policy) — defer. + // The errored response's data must still be drained here: the + // deferred recovery may run much later (next SIR attempt), and + // leftover words would misalign every subsequent RX FIFO read. + events.fault.store(true, Ordering::Release); + if rx_len != 0 { + regs.rx_fifo_drain(rx_len); + } + continue; + } + + if rx_len != 0 { + // Bounce buffer sized to the work-item payload (NOT 256): this + // runs on the kernel handler stack, and together with the + // by-value `IbiWork` copies in the enqueue path a larger buffer + // HardFaulted the AST1060 ISR stack. Anything beyond the + // work-item capacity would be truncated at enqueue anyway; the + // drain below keeps the FIFO aligned for the excess. + let mut buf = [0u8; ibi_workq::IBI_MWR_DATA_MAX]; + // Bound `rx_len` (a raw hardware field) to the buffer via `get`: + // an oversized length must not panic in handler mode. + let n = rx_len.min(buf.len()); + if let Some(dst) = buf.get_mut(..n) { + regs.rx_fifo_read(dst); + } + // An oversized write leaves words beyond the bounce buffer in the + // RX FIFO; pop them so the next response's data stays aligned + // (`n` is word-aligned at 256, so the byte count maps 1:1). + if rx_len > n { + regs.rx_fifo_drain(rx_len - n); + } + if !ibi_workq::i3c_ibi_work_enqueue_target_master_write( + bus, + buf.get(..n).unwrap_or(&[]), + ) { + events.fault.store(true, Ordering::Release); + } + } + + if tid == Tid::TargetIbi as usize { + events.target_ibi_done.complete(); + } + + if tid == Tid::TargetRdData as usize { + events.target_data_done.complete(); + } + } +} + +/// Master mode: drain the IBI status queue into the global work rings. +/// +/// Porting delta: the reference validated the SIR address against the +/// attached-device table here; that table is thread-owned, so the check moves +/// to the consumer (`acknowledge_ibi` already validates before acting). +fn isr_master_ibis(regs: &I3cRegisters, bus: usize) { + let nibis = regs.ibi_status_count(); + if nibis == 0 { + return; + } + let events = isr_events(bus); + + for _ in 0..nibis { + let reg = regs.ibi_fifo_pop(); + + let ibi_id = field_get(reg, IBIQ_STATUS_IBI_ID, IBIQ_STATUS_IBI_ID_SHIFT); + let ibi_data_len = field_get( + reg, + IBIQ_STATUS_IBI_DATA_LEN, + IBIQ_STATUS_IBI_DATA_LEN_SHIFT, + ) as usize; + let ibi_addr = (ibi_id >> 1) & 0x7F; + let rnw = (ibi_id & 1) != 0; + + if ibi_addr != 2 && rnw { + // Preserve the full supported SIR payload. + let mut ibi_buf = [0u8; ibi_workq::IBI_DATA_MAX as usize]; + let take = core::cmp::min(ibi_data_len, ibi_buf.len()); + if let Some(dst) = ibi_buf.get_mut(..take) { + regs.ibi_fifo_read(dst); + } + // The read above consumed `take` rounded up to a whole queue word; + // a payload longer than the bounce buffer leaves further words in + // the IBI queue, where they would be misparsed as the next entry's + // status word. Pop the remainder to keep the queue aligned. + let consumed = take.div_ceil(4) * 4; + if ibi_data_len > consumed { + regs.ibi_fifo_drain(ibi_data_len - consumed); + } + if !ibi_workq::i3c_ibi_work_enqueue_target_irq( + bus, + ibi_addr as u8, + ibi_buf.get(..take).unwrap_or(&[]), + ) { + events.fault.store(true, Ordering::Release); + } + } else if ibi_addr == 2 && !rnw { + // hot-join + if !ibi_workq::i3c_ibi_work_enqueue_hotjoin(bus) { + events.fault.store(true, Ordering::Release); + } + } else { + // normal ibi + regs.ibi_fifo_drain(ibi_data_len); + } + } +} + +// ============================================================================= +// Sub-trait: Core Operations +// ============================================================================= + +/// Core hardware operations: init, IRQ, enable/disable +pub trait HardwareCore { + /// Initialize the I3C controller hardware. + /// `Err(I3cError::Timeout)` if the initial queue-reset poll timed out. + fn init(&mut self, config: &mut I3cConfig) -> Result<(), I3cError>; + + /// Get the bus number for this instance + fn bus_num(&self) -> u8; + + /// Enable the I3C controller + fn i3c_enable(&mut self, config: &I3cConfig); + + /// Disable the I3C controller + fn i3c_disable(&mut self, is_secondary: bool); + + /// Set the controller role (primary/secondary) + fn set_role(&mut self, is_secondary: bool); + + /// Build the ISR context to park in the per-bus registry + /// (see [`register_i3c_irq_handler`]). + fn isr_ctx(&self, is_secondary: bool) -> IsrCtx; +} + +// ============================================================================= +// Sub-trait: Clock Configuration +// ============================================================================= + +/// Clock and timing configuration +pub trait HardwareClock { + /// Initialize clock timing parameters + /// + /// Implementations should use `config.core_clk_hz` if set, falling back + /// to [`get_clock_rate()`](Self::get_clock_rate) for auto-detection. + fn init_clock(&mut self, config: &mut I3cConfig); + + /// Calculate I2C clock dividers for given SCL frequency + fn calc_i2c_clk(&mut self, fscl_hz: u32) -> (u32, u32); + + /// Initialize the PID (Provisional ID) for this controller + fn init_pid(&mut self, config: &mut I3cConfig); +} + +// ============================================================================= +// Sub-trait: FIFO Operations +// ============================================================================= + +/// FIFO read/write operations +pub trait HardwareFifo { + /// Write to TX FIFO + fn wr_tx_fifo(&mut self, bytes: &[u8]); + + /// Read `out.len()` bytes from the RX FIFO + fn rd_rx_fifo(&mut self, out: &mut [u8]); + + /// Read `out.len()` bytes from the IBI FIFO + fn rd_ibi_fifo(&mut self, out: &mut [u8]); +} + +// ============================================================================= +// Sub-trait: Transfer Operations +// ============================================================================= + +/// Transfer, CCC, and device management operations +pub trait HardwareTransfer { + /// Set the IBI Mandatory Data Byte + fn set_ibi_mdb(&mut self, mdb: u8); + + /// Exit halt state. `Err(I3cError::Timeout)` if the engine did not leave + /// the halt state within the poll budget. + fn exit_halt(&mut self, config: &mut I3cConfig) -> Result<(), I3cError>; + + /// Enter halt state. `Err(I3cError::Timeout)` if the engine did not reach + /// the halt state within the poll budget. + fn enter_halt(&mut self, by_sw: bool, config: &mut I3cConfig) -> Result<(), I3cError>; + + /// Reset controller components (FIFOs, queues, etc.). + /// `Err(I3cError::Timeout)` if the reset bits did not self-clear within + /// the poll budget. + fn reset_ctrl(&mut self, reset: u32) -> Result<(), I3cError>; + + /// Enable IBI for a device + fn ibi_enable(&mut self, config: &mut I3cConfig, addr: u8) -> Result<(), I3cError>; + + /// Disable IBI for a device (DISEC + reject its SIRs at the controller) + fn ibi_disable(&mut self, config: &mut I3cConfig, addr: u8) -> Result<(), I3cError>; + + /// Start a transfer. Overlap is structurally impossible: the transfer is + /// thread-owned for its whole life (`&mut` exclusivity), and the ISR only + /// latches completion flags — there is no in-flight pointer to clobber. + fn start_xfer(&mut self, config: &mut I3cConfig, xfer: &mut I3cXfer); + + /// Wait (bounded, cooperative-yield) for the transfer the ISR flagged, + /// then drain the response queue into `xfer` on the thread side. + /// Returns `false` on timeout (after halt/reset recovery). + fn wait_xfer_complete( + &mut self, + config: &mut I3cConfig, + xfer: &mut I3cXfer, + timeout_us: u32, + ) -> bool; + + /// Detach a device by DAT position + fn detach_i3c_dev(&mut self, pos: usize); + + /// Attach a device to a DAT position + fn attach_i3c_dev(&mut self, pos: usize, addr: u8) -> Result<(), I3cError>; + + /// Attach a legacy I2C device to a DAT position (static address, + /// `LEGACY_I2C_DEV` marked, SIR/MR rejected). + fn attach_i2c_dev(&mut self, pos: usize, static_addr: u8) -> Result<(), I3cError>; + + /// Execute a legacy-I2C transaction against the device at DAT `pos`. + /// + /// Consecutive operations are joined by repeated START; the last ends + /// with STOP. **Consumes each `Read` buffer** (left empty in the slice, + /// same contract as [`priv_xfer`](HardwareTransfer::priv_xfer)); the data + /// lands in the caller-owned memory the reborrow came from. + fn i2c_priv_xfer<'a>( + &mut self, + config: &mut I3cConfig, + pos: u8, + ops: &mut [I2cOp<'a>], + ) -> Result<(), I3cError>; + + /// Execute a CCC + fn do_ccc(&mut self, config: &mut I3cConfig, ccc: &mut CccPayload) -> Result<(), I3cError>; + + /// Execute ENTDAA (Enter Dynamic Address Assignment) + fn do_entdaa(&mut self, config: &mut I3cConfig, index: u32) -> Result<(), I3cError>; + + /// Build commands for private transfer. + /// + /// **Consumes each message's buffer.** On success every `msgs[i].buf` is + /// moved into the corresponding command and left `None`; the caller must + /// re-fill the descriptor (`buf`) before reusing the same `msgs` slice for + /// another transfer. On error no buffer is taken (all-or-nothing): the + /// whole `msgs` slice is left untouched. The underlying caller-owned + /// memory is never modified — only the descriptor's `Option` is cleared. + fn priv_xfer_build_cmds<'a>( + &mut self, + cmds: &mut [I3cCmd<'a>], + msgs: &mut [I3cMsg<'a>], + pos: u8, + ) -> Result<(), I3cError>; + + /// Execute a private transfer. + /// + /// **Consumes each message's buffer** (see [`priv_xfer_build_cmds`]): once + /// the command build succeeds every `msgs[i].buf` is left `None` and stays + /// `None` for the rest of the call, *including the error paths* below + /// (timeout / non-zero response status). Only a failure in the build step + /// itself leaves the slice untouched (the build is all-or-nothing). The + /// buffers are not restored on a transfer error — the TX side downgrades + /// the caller's `&mut` to a shared borrow during build and cannot be put + /// back — so a caller retrying the same descriptors must re-fill `buf` + /// first regardless of how the previous call returned. + /// + /// [`priv_xfer_build_cmds`]: HardwareTransfer::priv_xfer_build_cmds + fn priv_xfer( + &mut self, + config: &mut I3cConfig, + pid: u64, + msgs: &mut [I3cMsg], + ) -> Result<(), I3cError>; + + /// Block transfers until a successful [`HardwareCore::init`]. + fn mark_xfer_faulted(&mut self); +} + +// ============================================================================= +// Sub-trait: Recovery / Software Mode +// ============================================================================= + +/// Software mode and bus recovery operations +pub trait HardwareRecovery { + /// Enter software mode for manual bus control + fn enter_sw_mode(&mut self); + + /// Exit software mode + fn exit_sw_mode(&mut self); + + /// Toggle SCL line in software mode + fn i3c_toggle_scl_in(&mut self, count: u32); + + /// Generate an internal STOP condition + fn gen_internal_stop(&mut self); + + /// Calculate even parity for a byte + fn even_parity(byte: u8) -> bool; +} + +// ============================================================================= +// Sub-trait: Target Mode Operations +// ============================================================================= + +/// Target (secondary) mode operations +pub trait HardwareTarget { + /// Write data to target TX buffer + fn target_tx_write(&mut self, config: &I3cConfig, buf: &[u8]) -> Result<(), I3cError>; + + /// Raise a Hot-Join IBI (target mode) + fn target_ibi_raise_hj(&self, config: &mut I3cConfig) -> Result<(), I3cError>; + + /// Notify pending read in target mode + fn target_pending_read_notify( + &mut self, + config: &mut I3cConfig, + buf: &[u8], + notifier: &mut I3cIbi, + ) -> Result<(), I3cError>; +} + +// ============================================================================= +// Supertrait: Full Hardware Interface +// ============================================================================= + +/// Complete hardware abstraction for I3C controllers +/// +/// This is a supertrait combining all sub-traits. Implementors must provide +/// all operations. +/// +/// # Sub-traits +/// +/// - [`HardwareCore`] - Init, IRQ, enable/disable +/// - [`HardwareClock`] - Clock configuration +/// - [`HardwareFifo`] - FIFO operations +/// - [`HardwareTransfer`] - Transfers, CCC, device management +/// - [`HardwareRecovery`] - SW mode, bus recovery +/// - [`HardwareTarget`] - Target mode operations +pub trait HardwareInterface: + HardwareCore + HardwareClock + HardwareFifo + HardwareTransfer + HardwareRecovery + HardwareTarget +{ +} + +// Blanket implementation: any type implementing all sub-traits implements HardwareInterface +impl HardwareInterface for T where + T: HardwareCore + + HardwareClock + + HardwareFifo + + HardwareTransfer + + HardwareRecovery + + HardwareTarget +{ +} +/// I3C bus 0 interrupt handler - call this from your ISR +#[inline] +pub fn i3c_irq_handler() { + dispatch_i3c_irq(0); +} + +/// I3C bus 1 interrupt handler - call this from your ISR +#[inline] +pub fn i3c1_irq_handler() { + dispatch_i3c_irq(1); +} + +/// I3C bus 2 interrupt handler - call this from your ISR +#[inline] +pub fn i3c2_irq_handler() { + dispatch_i3c_irq(2); +} + +/// I3C bus 3 interrupt handler - call this from your ISR +#[inline] +pub fn i3c3_irq_handler() { + dispatch_i3c_irq(3); +} + +// Delta D6: the reference's `#[cfg(feature = "isr-handlers")] #[no_mangle] +// extern "C" fn i3c{,1,2,3}()` symbol exports are dropped here. openprot is the +// kernel-integration target: the kernel owns the interrupt vector and calls +// `dispatch_i3c_irq(bus)` (via the `i3c*_irq_handler` helpers above), which is +// exactly the case the reference gated those exports OFF for. Carrying a +// never-enabled `isr-handlers` feature would only risk a symbol clash with the +// kernel ISR and an `unexpected_cfgs` lint, with no observable difference in +// the deployed (feature-off) build. + +/// Concrete AST1060 I3C hardware implementation: the per-bus +/// [`I3cRegisters`] façade (Delta D3 — all MMIO `unsafe` confined there) +/// plus a Cooperative-Yield wait policy (Delta D2). +/// +/// One driver type manages any of the bus instances — the bus is selected at +/// **runtime** in [`new`](Self::new), so several controllers (one per bus) +/// share this single type. `Y` is the caller-injected yield closure invoked +/// between completion polls (see [`super::types::Completion::wait_for_us`]); +/// pass `|_| core::hint::spin_loop()` for a bare-metal busy-wait. +/// +/// Not `Copy`/`Clone`: this value owns the (also non-`Copy`) registers +/// wrapper, so bus exclusivity follows from ownership. +pub struct Ast1060I3c { + regs: I3cRegisters, + /// Cooperative yield hook invoked between status polls. Argument is the + /// suggested wait window in nanoseconds (advisory). Private so external + /// code cannot swap the wait policy out from under an active driver. + yield_fn: Y, + /// Sticky fault cleared by successful initialization. + xfer_faulted: AtomicBool, +} + +impl Ast1060I3c { + /// Create the I3C hardware driver for `bus` (0..=3). Returns `None` if + /// `bus` is out of range. + /// + /// # Safety + /// + /// Delegates the [`I3cRegisters::new`] contract — the entire MMIO + /// `unsafe` perimeter: + /// - the AST1060 PAC singleton pointers are valid for the program's + /// lifetime (they are on AST1060 hardware); + /// - access to the returned instance is serialized by the caller (the + /// device is `!Sync`); only one `Ast1060I3c` per physical bus may be + /// active at a time. + pub unsafe fn new(bus: u8, yield_fn: Y) -> Option { + // SAFETY: forwarded — see this function's contract above. + let regs = unsafe { I3cRegisters::new(bus) }?; + Some(Self { + regs, + yield_fn, + xfer_faulted: AtomicBool::new(false), + }) + } + + /// Bus index this driver was constructed for. + #[inline] + fn bus(&self) -> u8 { + self.regs.bus() + } +} + +/// Debug logging is dropped in the openprot port (Delta D4): the reference's +/// `Logger`/`heapless::String` path is removed. This no-op still evaluates the +/// format arguments (via `format_args!`) so the surrounding `let reg = …` +/// bindings stay "used", but performs no formatting or I/O. The leading +/// `$logger` fragment is captured and ignored (never expanded), so the absent +/// `logger` field is never referenced. +#[inline] +fn consume_debug_args(_args: core::fmt::Arguments<'_>) {} + +macro_rules! i3c_debug { + ($logger:expr, $($arg:tt)*) => {{ + consume_debug_args(format_args!($($arg)*)); + }}; +} + +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +pub enum PollError { + Timeout, +} + +/// Bounded poll loop (Cooperative-Yield Bounded-Poll Device, Delta D2). +/// +/// The reference took a `&mut D: DelayNs`; here the wait policy is the +/// caller-injected, type-erased `yield_fn`, invoked once per non-completing +/// poll with an advisory wait window (`delay_ns`). Exhausting `max_iters` +/// returns a typed [`PollError::Timeout`] — never an unbounded spin. +pub fn poll_with_timeout( + mut read_reg: F, + mut condition: C, + yield_fn: &mut dyn FnMut(u32), + delay_ns: u32, + max_iters: u32, +) -> Result +where + F: FnMut() -> u32, + C: FnMut(u32) -> bool, +{ + for _ in 0..max_iters { + let val = read_reg(); + if condition(val) { + return Ok(val); + } + yield_fn(delay_ns); + } + Err(PollError::Timeout) +} + +impl Ast1060I3c { + #[inline] + fn ensure_xfer_ready(&self) -> Result<(), I3cDrvError> { + if self.xfer_faulted.load(Ordering::Acquire) { + return Err(I3cDrvError::IoError); + } + Ok(()) + } + + /// Recover a timed-out transfer and re-arm its IRQs. + fn recover_timeout_xfer(&mut self, config: &mut I3cConfig) { + i3c_debug!(self.logger, "wait_xfer_complete: timeout"); + // enter_halt isn't expected to fail; reset_ctrl still runs + // unconditionally, and a halt failure is caught below via halt_ok. + let halt_ok = self.enter_halt(true, config).is_ok(); + let reset_ok = self.reset_ctrl(RESET_CTRL_XFER_QUEUES).is_ok(); + let exit_ok = self.exit_halt(config).is_ok(); + if !(halt_ok && reset_ok && exit_ok) { + // Recovery failure is sticky until init. + self.xfer_faulted.store(true, Ordering::Release); + } + self.regs.clear_intr_status( + INTR_RESP_READY_STAT | INTR_TRANSFER_ERR_STAT | INTR_TRANSFER_ABORT_STAT, + ); + isr_events(self.bus() as usize).clear_pending(); + self.regs.unmask_master_xfer_irqs(); + } + + fn toggle_scl_in(&mut self, count: u32) { + for _ in 0..count { + self.regs.i3cg_reg1_clear_bits(I3CG_REG1_SCL_IN_SW_MODE_VAL); + self.regs.i3cg_reg1_set_bits(I3CG_REG1_SCL_IN_SW_MODE_VAL); + } + } + + fn gen_internal_stop(&mut self) { + self.regs.i3cg_reg1_clear_bits(I3CG_REG1_SCL_IN_SW_MODE_VAL); + self.regs.i3cg_reg1_clear_bits(I3CG_REG1_SDA_IN_SW_MODE_VAL); + self.regs.i3cg_reg1_set_bits(I3CG_REG1_SCL_IN_SW_MODE_VAL); + self.regs.i3cg_reg1_set_bits(I3CG_REG1_SDA_IN_SW_MODE_VAL); + } + + fn enter_sw_mode(&mut self) { + i3c_debug!(self.logger, "enter sw mode"); + let mut reg = self.regs.i3cg_read_reg1(); + reg |= I3CG_REG1_SCL_IN_SW_MODE_VAL | I3CG_REG1_SDA_IN_SW_MODE_VAL; + self.regs.i3cg_reg1_overwrite(reg); + reg |= I3CG_REG1_SCL_IN_SW_MODE_EN | I3CG_REG1_SDA_IN_SW_MODE_EN; + self.regs.i3cg_reg1_overwrite(reg); + } + + fn exit_sw_mode(&mut self) { + let mut reg = self.regs.i3cg_read_reg1(); + reg &= !(I3CG_REG1_SCL_IN_SW_MODE_EN | I3CG_REG1_SDA_IN_SW_MODE_EN); + self.regs.i3cg_reg1_overwrite(reg); + } + + /// Thread-side response drain — the old ISR `end_xfer`, minus the + /// transfer-pointer handoff: the ISR only latched completion (see + /// [`isr_service`]), so this runs with the thread's own `&mut xfer` and + /// no `unsafe`. + fn process_responses(&mut self, config: &mut I3cConfig, xfer: &mut I3cXfer) { + let nresp = self.regs.resp_buf_level(); + let mut ret = 0; + + for _ in 0..nresp { + let resp = self.regs.pop_response(); + + let tid = field_get(resp, RESPONSE_PORT_TID_MASK, RESPONSE_PORT_TID_SHIFT) as usize; + let rx_len = field_get( + resp, + RESPONSE_PORT_DATA_LEN_MASK, + RESPONSE_PORT_DATA_LEN_SHIFT, + ) as usize; + let err = field_get( + resp, + RESPONSE_PORT_ERR_STATUS_MASK, + RESPONSE_PORT_ERR_STATUS_SHIFT, + ); + + i3c_debug!( + self.logger, + "process_responses: tid={}, rx_len={}, err={}", + tid, + rx_len, + err + ); + if tid >= xfer.cmds.len() { + if rx_len > 0 { + self.regs.rx_fifo_drain(rx_len); + } + // Reject an out-of-sync response TID. + ret = -1; + continue; + } + + // `get_mut` (not `[tid]`) keeps the scatter path panic-free for the + // `no_panics` analysis; `tid < len` is already guaranteed above. + let Some(cmd) = xfer.cmds.get_mut(tid) else { + continue; + }; + cmd.rx_len = u32::try_from(rx_len).unwrap_or(0); + cmd.ret = i32::try_from(err).unwrap_or(-1); + // Accumulate errors by response TID. + if cmd.ret != 0 { + ret = cmd.ret; + } + + if rx_len == 0 { + continue; + } + + if err == 0 { + // `get_mut(..rx_len)` guards a malformed hardware length that + // would otherwise panic on `rx_buf[..rx_len]`; on mismatch the + // bytes are drained instead. + if let Some(dst) = cmd.rx.as_deref_mut().and_then(|b| b.get_mut(..rx_len)) { + self.regs.rx_fifo_read(dst); + } else { + self.regs.rx_fifo_drain(rx_len); + // Reject responses larger than the caller's buffer. + cmd.ret = -1; + cmd.rx_len = 0; + ret = -1; + } + } else if rx_len > 0 { + self.regs.rx_fifo_drain(rx_len); + } + } + + if ret != 0 { + // Keep the IBI queue while recovering transfer queues. + // enter_halt isn't expected to fail; reset_ctrl still runs + // unconditionally, and a halt failure is caught below via halt_ok. + let halt_ok = self.enter_halt(false, config).is_ok(); + let reset_ok = self.reset_ctrl(RESET_CTRL_XFER_QUEUES).is_ok(); + let exit_ok = self.exit_halt(config).is_ok(); + if !(halt_ok && reset_ok && exit_ok) { + self.xfer_faulted.store(true, Ordering::Release); + } + } + + xfer.ret = ret; + } +} + +impl HardwareCore for Ast1060I3c { + fn init(&mut self, config: &mut I3cConfig) -> Result<(), I3cError> { + i3c_debug!(self.logger, "i3c init"); + + // Block transfers while hardware is partially initialized. + self.xfer_faulted.store(true, Ordering::Release); + + self.regs + .global_reset_deassert(I3C_GLOBAL_RESET_DEASSERT_MASK); + + self.regs.i3cg_program_reg1(I3C_DEFAULT_STATIC_ADDR); + let reg = self.regs.i3cg_read_reg1(); + i3c_debug!(self.logger, "i3cg_reg1: {:#x}", reg); + + self.regs.i3cg_write_reg0(0x0); + let reg = self.regs.i3cg_read_reg0(); + i3c_debug!(self.logger, "i3cg_reg0: {:#x}", reg); + + self.regs.core_reset_assert(); + self.regs.clock_on(); + self.regs.core_reset_deassert(); + self.i3c_disable(config.is_secondary); + + // Drop pre-reset ISR and work-queue state while IRQs are disabled. + isr_events(self.bus() as usize).reset(); + ibi_workq::i3c_ibi_workq_clear(self.bus() as usize); + + // Invalidate the software target-address cache too. + if let Some(tc) = config.target_config.as_mut() { + tc.addr = None; + } + + i3c_debug!( + self.logger, + "bus num: {}, is_secondary: {}", + self.bus(), + config.is_secondary + ); + + self.regs.assert_all_queue_resets(); + + let regs = &self.regs; + poll_with_timeout( + || regs.read_reset_ctrl(), + |val| val == 0, + &mut self.yield_fn, + I3C_INIT_POLL_DELAY_NS, + I3C_POLL_MAX_ITERS, + ) + .map_err(|_| I3cError::Timeout)?; + + self.set_role(config.is_secondary); + self.init_clock(config); + + self.regs.clear_intr_status(I3C_INTR_STATUS_ALL_BITS); + if config.is_secondary { + self.regs.enable_target_irqs(); + } else { + self.regs.enable_master_irqs(); + } + + config.sir_allowed_by_sw = false; + + self.regs.set_ibi_data_threshold(I3C_IBI_DATA_THRESHOLD_MAX); + self.regs.set_rx_buf_threshold(0); + + self.init_pid(config); + + // Clamp hardware depth to the software DAT capacity. + config.maxdevs = self.regs.dat_depth().min(MAX_DEVICES_PER_BUS as u16); + config.free_pos = if config.maxdevs == 32 { + u32::MAX + } else { + (1u32 << config.maxdevs) - 1 + }; + config.need_da = 0; + + for i in 0..(config.maxdevs) { + self.regs.dat_set_reject(i.into()); + } + + self.regs.write_mr_reject(I3C_INTR_STATUS_ALL_BITS); + self.regs.write_sir_reject(I3C_INTR_STATUS_ALL_BITS); + self.regs.set_hot_join_nack(true); + + if config.is_secondary { + // Apply the configured target static address. + let static_addr = config + .target_config + .as_ref() + .and_then(|t| t.static_addr) + .unwrap_or(9); + self.regs.program_secondary_static_addr(static_addr); + } else { + self.regs.program_primary_dynamic_addr(8); + } + + self.i3c_enable(config); + + i3c_debug!(self.logger, "i3c enabled"); + if !config.is_secondary { + self.regs.enable_ibi_thld_irq(); + } + self.regs.set_hot_join_nack(false); + i3c_debug!(self.logger, "i3c init done"); + + // Initialization completed; transfers are safe again. + self.xfer_faulted.store(false, Ordering::Release); + + // Safety: Ensure memory barrier and init completion before interrupts are enabled by the caller + core::sync::atomic::compiler_fence(Ordering::SeqCst); + Ok(()) + } + + fn bus_num(&self) -> u8 { + self.bus() + } + + fn i3c_disable(&mut self, is_secondary: bool) { + i3c_debug!(self.logger, "i3c disable"); + if !self.regs.controller_enabled() { + return; + } + + if is_secondary { + self.enter_sw_mode(); + } + self.regs.disable_controller(); + + if is_secondary { + self.toggle_scl_in(8); + self.gen_internal_stop(); + self.exit_sw_mode(); + } + } + + fn i3c_enable(&mut self, config: &I3cConfig) { + i3c_debug!(self.logger, "i3c enable"); + if config.is_secondary { + i3c_debug!(self.logger, "i3c enable as secondary"); + self.regs.write_slv_event_ctrl(0); + self.enter_sw_mode(); + self.regs.enable_controller_secondary(); + let wait_cnt = self.regs.ibi_free_cycles(); + let wait_ns = wait_cnt * config.core_period; + (self.yield_fn)(wait_ns * 100_u32); + self.toggle_scl_in(8); + if self.regs.controller_enabled() { + self.gen_internal_stop(); + } + self.exit_sw_mode(); + } else { + self.regs.enable_controller_primary(); + } + } + + fn set_role(&mut self, is_secondary: bool) { + self.regs.set_dev_op_mode(u8::from(is_secondary)); + } + + fn isr_ctx(&self, is_secondary: bool) -> IsrCtx { + // SAFETY: the ISR runs atomically with respect to the thread on this + // single-core target, so device access through the alias stays + // serialized (see `I3cRegisters::isr_alias`). + let regs = unsafe { self.regs.isr_alias() }; + IsrCtx { regs, is_secondary } + } +} + +impl HardwareClock for Ast1060I3c { + fn init_clock(&mut self, config: &mut I3cConfig) { + // `unwrap_or` + `.max(1)` (not `.expect()` / raw divides) keep this + // panic-free for the `no_panics` analysis: a missing/zero core clock + // cannot trigger an `expect` panic or a divide-by-zero. For a valid + // config the values are unchanged. `period` is a local clamped `>= 1` + // so the compiler proves every `div_ceil(period)` divisor non-zero. + let clk_rate = config.core_clk_hz.unwrap_or(I3C_MIN_CORE_CLK_SDR).max(1); + i3c_debug!(self.logger, "i3c clock rate: {} Hz", clk_rate); + config.core_period = (NSEC_PER_SEC).div_ceil(clk_rate); + let period = config.core_period.max(1); + + let ns_to_cnt_u8 = |ns: u32| -> u8 { u8::try_from(ns.div_ceil(period)).unwrap_or(u8::MAX) }; + let ns_to_cnt_u16 = + |ns: u32| -> u16 { u16::try_from(ns.div_ceil(period)).unwrap_or(u16::MAX) }; + + // I2C FM + let (fm_hi_ns, fm_lo_ns) = self.calc_i2c_clk(config.i2c_scl_hz); + self.regs + .set_i2c_fm_timing(ns_to_cnt_u16(fm_hi_ns), ns_to_cnt_u16(fm_lo_ns)); + + // Program FMP at the requested rate above 400 kHz. + let fmp_target_hz = if config.i2c_scl_hz > 400_000 { + config.i2c_scl_hz + } else { + 1_000_000 + }; + let (i2c_fmp_hi_ns, i2c_fmp_lo_ns) = self.calc_i2c_clk(fmp_target_hz); + self.regs + .set_i2c_fmp_timing(ns_to_cnt_u8(i2c_fmp_hi_ns), ns_to_cnt_u16(i2c_fmp_lo_ns)); + + // I3C OD + let (od_hi_ns, od_lo_ns) = + if config.i3c_od_scl_hi_period_ns != 0 && config.i3c_od_scl_lo_period_ns != 0 { + ( + config.i3c_od_scl_hi_period_ns, + config.i3c_od_scl_lo_period_ns, + ) + } else { + (i2c_fmp_hi_ns, i2c_fmp_lo_ns) + }; + self.regs + .set_od_timing(ns_to_cnt_u8(od_hi_ns), ns_to_cnt_u8(od_lo_ns)); + + // I3C PP + let (i3c_pp_hi_ns, i3c_pp_lo_ns) = + if config.i3c_pp_scl_hi_period_ns != 0 && config.i3c_pp_scl_lo_period_ns != 0 { + ( + config.i3c_pp_scl_hi_period_ns, + config.i3c_pp_scl_lo_period_ns, + ) + } else { + let total_ns = NSEC_PER_SEC.div_ceil(config.i3c_scl_hz.max(1)); + let hi_ns = core::cmp::min(I3C_BUS_THIGH_MAX_NS, total_ns.saturating_sub(1)); + let lo_ns = total_ns.saturating_sub(hi_ns).max(1); + (hi_ns, lo_ns) + }; + self.regs + .set_pp_timing(ns_to_cnt_u8(i3c_pp_hi_ns), ns_to_cnt_u8(i3c_pp_lo_ns)); + + // SDA TX hold time (`period` is the clamped, provably-non-zero divisor) + let hold_steps = (config.sda_tx_hold_ns) + .div_ceil(period) + .clamp(SDA_TX_HOLD_MIN, SDA_TX_HOLD_MAX); + let mut reg = self.regs.read_sda_hold(); + reg = (reg & !SDA_TX_HOLD_MASK) | ((hold_steps & 0x7) << 16); + self.regs.write_sda_hold(reg); + + // BUS_FREE_TIMING + self.regs.write_bus_free_timing(I3C_BUS_FREE_TIMING_RESET); + } + + fn calc_i2c_clk(&mut self, fscl_hz: u32) -> (u32, u32) { + // `.max(1)` on both the SCL frequency and the resulting period keeps the + // downstream `div_ceil(period_ns)` divisors provably non-zero (panic-free + // for the `no_panics` analysis); a valid `fscl_hz` is unaffected. + let period_ns: u32 = (1_000_000_000u32).div_ceil(fscl_hz.max(1)).max(1); + + let (lo_min, hi_min): (u32, u32) = if fscl_hz <= 100_000 { + ( + I3C_BUS_I2C_STD_TLOW_MIN_NS + I3C_BUS_I2C_STD_TF_MAX_NS, + I3C_BUS_I2C_STD_THIGH_MIN_NS + I3C_BUS_I2C_STD_TR_MAX_NS, + ) + } else if fscl_hz <= 400_000 { + ( + I3C_BUS_I2C_FM_TLOW_MIN_NS + I3C_BUS_I2C_FM_TF_MAX_NS, + I3C_BUS_I2C_FM_THIGH_MIN_NS + I3C_BUS_I2C_FM_TR_MAX_NS, + ) + } else { + ( + I3C_BUS_I2C_FMP_TLOW_MIN_NS + I3C_BUS_I2C_FMP_TF_MAX_NS, + I3C_BUS_I2C_FMP_THIGH_MIN_NS + I3C_BUS_I2C_FMP_TR_MAX_NS, + ) + }; + + // Split the period remaining after timing minima. + let leftover = period_ns.saturating_sub(lo_min.saturating_add(hi_min)); + let lo = lo_min + leftover / 2; + let hi = hi_min + leftover.saturating_sub(leftover / 2); + + (hi, lo) + } + + fn init_pid(&mut self, config: &mut I3cConfig) { + let bus = self.bus(); + self.regs.set_pid_mfg_id(I3C_AST10X0_MIPI_MANUF_ID); + + let rev_id: u32 = self.regs.hw_rev_id(); + let mut reg: u32 = rev_id << 16 | u32::from(bus) << 12; + reg |= 0xa000_0000; + self.regs.write_slv_pid_value(reg); + let mut reg: u32 = self.regs.read_slv_char_ctrl(); + reg &= !SLV_DCR_MASK; + reg |= (config.dcr << 8) | 0x66; + self.regs.write_slv_char_ctrl(reg); + } +} + +impl HardwareFifo for Ast1060I3c { + fn wr_tx_fifo(&mut self, bytes: &[u8]) { + self.regs.tx_fifo_write(bytes); + } + + fn rd_rx_fifo(&mut self, out: &mut [u8]) { + self.regs.rx_fifo_read(out); + } + + fn rd_ibi_fifo(&mut self, out: &mut [u8]) { + self.regs.ibi_fifo_read(out); + } +} + +impl HardwareRecovery for Ast1060I3c { + fn enter_sw_mode(&mut self) { + self.enter_sw_mode(); + } + + fn exit_sw_mode(&mut self) { + self.exit_sw_mode(); + } + + fn i3c_toggle_scl_in(&mut self, count: u32) { + self.toggle_scl_in(count); + } + + fn gen_internal_stop(&mut self) { + self.gen_internal_stop(); + } + + fn even_parity(byte: u8) -> bool { + let mut parity = false; + let mut b = byte; + + while b != 0 { + parity = !parity; + b &= b - 1; + } + + !parity + } +} + +impl HardwareTransfer for Ast1060I3c { + fn set_ibi_mdb(&mut self, mdb: u8) { + self.regs.set_ibi_mdb(mdb); + } + + fn exit_halt(&mut self, config: &mut I3cConfig) -> Result<(), I3cError> { + let state = self.regs.xfer_status(); + let expected = if config.is_secondary { + CM_TFR_STS_TARGET_HALT + } else { + CM_TFR_STS_MASTER_HALT + }; + + if state != expected { + return Ok(()); + } + + self.regs.resume(); + + let regs = &self.regs; + let rc = poll_with_timeout( + || u32::from(regs.xfer_status()), + |val| val != u32::from(expected), + &mut self.yield_fn, + I3C_CTRL_POLL_DELAY_NS, + I3C_POLL_MAX_ITERS, + ); + + if rc.is_err() { + i3c_debug!(self.logger, "exit_halt: timeout"); + return Err(I3cError::Timeout); + } + Ok(()) + } + + fn enter_halt(&mut self, by_sw: bool, config: &mut I3cConfig) -> Result<(), I3cError> { + let expected = if config.is_secondary { + CM_TFR_STS_TARGET_HALT + } else { + CM_TFR_STS_MASTER_HALT + }; + + if by_sw { + self.regs.abort(); + } + + let regs = &self.regs; + let rc = poll_with_timeout( + || u32::from(regs.xfer_status()), + |val| val == u32::from(expected), + &mut self.yield_fn, + I3C_CTRL_POLL_DELAY_NS, + I3C_POLL_MAX_ITERS, + ); + + if rc.is_err() { + i3c_debug!(self.logger, "enter_halt: timeout"); + return Err(I3cError::Timeout); + } + Ok(()) + } + + fn reset_ctrl(&mut self, reset: u32) -> Result<(), I3cError> { + let reg = reset & RESET_CTRL_ALL; + + if reg == 0 { + return Ok(()); + } + + self.regs.write_reset_ctrl(reg); + let regs = &self.regs; + let rc = poll_with_timeout( + || regs.read_reset_ctrl(), + |val| val == 0, + &mut self.yield_fn, + I3C_CTRL_POLL_DELAY_NS, + I3C_POLL_MAX_ITERS, + ); + + if rc.is_err() { + i3c_debug!(self.logger, "reset_ctrl: timeout"); + return Err(I3cError::Timeout); + } + Ok(()) + } + + fn ibi_enable(&mut self, config: &mut I3cConfig, addr: u8) -> Result<(), I3cDrvError> { + self.ensure_xfer_ready()?; + // Enforce the role at the hardware boundary. + if config.is_secondary { + return Err(I3cDrvError::Access); + } + let dev_idx = config + .attached + .find_dev_idx_by_addr(addr) + .ok_or(I3cDrvError::NoSuchDev)?; + i3c_debug!(self.logger, "ibi_enable: dev_idx={}", dev_idx); + // `get(dev_idx)` (not `[dev_idx]`) keeps this path panic-free for the + // `no_panics` analysis; `find_dev_idx_by_addr` already returns a valid + // index. + let pos_opt = config + .attached + .pos_of(dev_idx) + .or_else(|| config.attached.devices.get(dev_idx).and_then(|d| d.pos)); + + let pos: u8 = pos_opt.ok_or(I3cDrvError::NoDatPos)?; + i3c_debug!(self.logger, "ibi_enable: pos={}", pos); + let dev = config + .attached + .devices + .get(dev_idx) + .ok_or(I3cDrvError::NoSuchDev)?; + if dev.kind != DevKind::I3c || dev.da_state != DaState::Verified { + return Err(I3cDrvError::Access); + } + let tgt_bcr: u32 = u32::from(dev.bcr); + let dyn_addr = dev.dyn_addr; + + // Accept locally before sending ENEC. + let orig_reg = self.regs.dat_read(pos.into()); + let mut reg = orig_reg; + reg &= !DEV_ADDR_TABLE_SIR_REJECT; + if tgt_bcr & I3C_BCR_IBI_PAYLOAD_HAS_DATA_BYTE != 0 { + reg |= DEV_ADDR_TABLE_IBI_MDB | DEV_ADDR_TABLE_IBI_PEC; + } + + self.regs.dat_write_raw(pos.into(), reg); + + let orig_sir_reject = self.regs.read_sir_reject(); + let mut sir_reject = orig_sir_reject; + sir_reject &= !bit(pos.into()); + self.regs.write_sir_reject(sir_reject); + + self.regs.enable_ibi_thld_irq(); + + let events = I3C_CCC_EVT_INTR; + if let Err(e) = ccc_events_set(self, config, dyn_addr, true, events) { + // Preserve local acceptance after an ambiguous ENEC result. + if !matches!(e, I3cDrvError::Timeout | I3cDrvError::RespError) { + self.regs.dat_write_raw(pos.into(), orig_reg); + self.regs.write_sir_reject(orig_sir_reject); + } + return Err(e); + } + + i3c_debug!(self.logger, "i3cd030 (SIR reject) = {:#x}", sir_reject); + i3c_debug!( + self.logger, + "i3cd040 (IBI thld) = {:#x}", + self.regs.read_intr_status_en() + ); + i3c_debug!( + self.logger, + "i3cd044 (IBI thld sig) = {:#x}", + self.regs.read_intr_signal_en() + ); + i3c_debug!( + self.logger, + "i3cd280 dat_addr[{}] = {:#x}", + pos, + self.regs.dat_read(pos.into()) + ); + i3c_debug!(self.logger, "ibi_enable done"); + Ok(()) + } + + fn ibi_disable(&mut self, config: &mut I3cConfig, addr: u8) -> Result<(), I3cDrvError> { + self.ensure_xfer_ready()?; + if config.is_secondary { + return Err(I3cDrvError::Access); + } + let dev_idx = config + .attached + .find_dev_idx_by_addr(addr) + .ok_or(I3cDrvError::NoSuchDev)?; + let pos_opt = config + .attached + .pos_of(dev_idx) + .or_else(|| config.attached.devices.get(dev_idx).and_then(|d| d.pos)); + let pos: u8 = pos_opt.ok_or(I3cDrvError::NoDatPos)?; + let dyn_addr = config + .attached + .devices + .get(dev_idx) + .ok_or(I3cDrvError::NoSuchDev) + .and_then(|dev| { + if dev.kind == DevKind::I3c && dev.da_state == DaState::Verified { + Ok(dev.dyn_addr) + } else { + Err(I3cDrvError::Access) + } + })?; + + // Send DISEC before rejecting locally. + let disec_result = ccc_events_set(self, config, dyn_addr, false, I3C_CCC_EVT_INTR); + + // Reject locally even if DISEC fails. + let mut reg = self.regs.dat_read(pos.into()); + reg |= DEV_ADDR_TABLE_SIR_REJECT; + reg &= !(DEV_ADDR_TABLE_IBI_MDB | DEV_ADDR_TABLE_IBI_PEC); + self.regs.dat_write_raw(pos.into(), reg); + + let mut sir_reject = self.regs.read_sir_reject(); + sir_reject |= bit(pos.into()); + self.regs.write_sir_reject(sir_reject); + + disec_result + } + + fn start_xfer(&mut self, _config: &mut I3cConfig, xfer: &mut I3cXfer) { + xfer.ret = -1; + + // Clear stale completion and response state. + if isr_events(self.bus() as usize).take_pending() != 0 { + i3c_debug!(self.logger, "cleared stale transfer completion"); + } + let nresp = self.regs.resp_buf_level(); + for _ in 0..nresp { + let resp = self.regs.pop_response(); + // Drain stale response data with its descriptor. + let rx_len = field_get( + resp, + RESPONSE_PORT_DATA_LEN_MASK, + RESPONSE_PORT_DATA_LEN_SHIFT, + ) as usize; + if rx_len > 0 { + self.regs.rx_fifo_drain(rx_len); + } + } + // Re-arm IRQs masked by a late response. + self.regs.unmask_master_xfer_irqs(); + + for cmd in xfer.cmds.iter() { + if let Some(tx) = cmd.tx { + let take = tx.len().min(cmd.tx_len as usize); + if take > 0 { + i3c_debug!(self.logger, "start_xfer: write {} bytes", take); + self.wr_tx_fifo(&tx[..take]); + } + } + } + self.regs + .set_resp_buf_threshold(u8::try_from(xfer.cmds.len().saturating_sub(1)).unwrap_or(0)); + + for cmd in xfer.cmds.iter() { + i3c_debug!( + self.logger, + "start_xfer: cmd: cmd_hi={:#x}, cmd_lo={:#x}", + cmd.cmd_hi, + cmd.cmd_lo + ); + self.regs.push_cmd(cmd.cmd_hi); + self.regs.push_cmd(cmd.cmd_lo); + } + } + + fn wait_xfer_complete( + &mut self, + config: &mut I3cConfig, + xfer: &mut I3cXfer, + timeout_us: u32, + ) -> bool { + let events = isr_events(self.bus() as usize); + + // Cooperative-yield bounded poll (Delta D2) on the ISR's latched + // status; the ISR masked the sources, so on a hit this thread owns + // the response queue and drains it into its own `xfer` — no `&mut` + // ever crosses the ISR boundary. + let mut left = timeout_us; + loop { + let pending = events.take_pending(); + if pending & (INTR_RESP_READY_STAT | INTR_TRANSFER_ERR_STAT | INTR_TRANSFER_ABORT_STAT) + != 0 + { + self.process_responses(config, xfer); + if xfer.ret == 0 + && pending & (INTR_TRANSFER_ERR_STAT | INTR_TRANSFER_ABORT_STAT) != 0 + { + // Recover transfer-level errors lacking a response. + xfer.ret = -1; + // enter_halt isn't expected to fail; reset_ctrl still runs + // unconditionally, and a halt failure is caught below via + // halt_ok. + let halt_ok = self.enter_halt(false, config).is_ok(); + let reset_ok = self.reset_ctrl(RESET_CTRL_XFER_QUEUES).is_ok(); + let exit_ok = self.exit_halt(config).is_ok(); + if !(halt_ok && reset_ok && exit_ok) { + self.xfer_faulted.store(true, Ordering::Release); + } + } + self.regs.unmask_master_xfer_irqs(); + return true; + } + if left == 0 { + break; + } + (self.yield_fn)(1_000); + left -= 1; + } + + // Recover and re-arm after timeout. + self.recover_timeout_xfer(config); + false + } + + fn detach_i3c_dev(&mut self, pos: usize) { + self.regs.dat_set_reject(pos); + } + + fn attach_i3c_dev(&mut self, pos: usize, addr: u8) -> Result<(), I3cDrvError> { + let mut da_with_parity = addr; + if Self::even_parity(addr) { + da_with_parity |= 1 << 7; + } + + self.regs.dat_program_addr(pos, da_with_parity); + + Ok(()) + } + + fn attach_i2c_dev(&mut self, pos: usize, static_addr: u8) -> Result<(), I3cDrvError> { + // Legacy I2C entry: static address in the low field, the LEGACY bit + // routes transfers through the controller's I2C engine; SIR/MR stay + // rejected (an I2C device cannot raise them). + let raw = DEV_ADDR_TABLE_LEGACY_I2C_DEV + | DEV_ADDR_TABLE_SIR_REJECT + | DEV_ADDR_TABLE_MR_REJECT + | field_prep(DEV_ADDR_TABLE_STATIC_ADDR, u32::from(static_addr)); + self.regs.dat_write_raw(pos, raw); + Ok(()) + } + + fn i2c_priv_xfer<'a>( + &mut self, + config: &mut I3cConfig, + pos: u8, + ops: &mut [I2cOp<'a>], + ) -> Result<(), I3cDrvError> { + self.ensure_xfer_ready()?; + // Enforce the role at the hardware boundary. + if config.is_secondary { + return Err(I3cDrvError::Access); + } + if ops.is_empty() { + return Ok(()); + } + // Same TID-width bound as private I3C transfers. + if ops.len() > MAX_PRIV_XFER_CMDS { + return Err(I3cDrvError::TooManyMsgs); + } + // Pre-validate every length before consuming any buffer + // (all-or-nothing, mirroring priv_xfer_build_cmds). + for op in ops.iter() { + let len = match op { + I2cOp::Write(b) => b.len(), + I2cOp::Read(b) => b.len(), + }; + if len == 0 || len > MAX_XFER_DATA_LEN { + return Err(I3cDrvError::Invalid); + } + } + + // The DAT entry marks the device as legacy I2C, so the SPEED field + // selects between the I2C timing sets programmed by init_clock. + let speed = if config.i2c_scl_hz > 400_000 { + SpeedI2c::Fmp + } else { + SpeedI2c::Fm + } as u32; + + let mut cmds: heapless::Vec, MAX_CMDS> = heapless::Vec::new(); + // Save requested lengths before responses overwrite `rx_len`. + let mut requested_rx_len: [usize; MAX_PRIV_XFER_CMDS] = [0; MAX_PRIV_XFER_CMDS]; + let nops = ops.len(); + for (i, op) in ops.iter_mut().enumerate() { + let mut cmd = I3cCmd::new(); + let len = match op { + I2cOp::Write(b) => b.len(), + I2cOp::Read(b) => { + if let Some(slot) = requested_rx_len.get_mut(i) { + *slot = b.len(); + } + b.len() + } + }; + cmd.cmd_hi = field_prep(COMMAND_PORT_ATTR, COMMAND_ATTR_XFER_ARG) + | field_prep( + COMMAND_PORT_ARG_DATA_LEN, + u32::try_from(len).map_err(|_| I3cDrvError::Invalid)?, + ); + cmd.cmd_lo = field_prep( + COMMAND_PORT_TID, + u32::try_from(i).map_err(|_| I3cDrvError::Invalid)?, + ) | field_prep(COMMAND_PORT_DEV_INDEX, u32::from(pos)) + | field_prep(COMMAND_PORT_SPEED, speed) + | COMMAND_PORT_ROC; + + match op { + I2cOp::Write(b) => { + cmd.tx = Some(*b); + cmd.tx_len = u32::try_from(len).map_err(|_| I3cDrvError::Invalid)?; + } + I2cOp::Read(b) => { + // Move the caller's reborrow into the command (same + // consume contract as priv_xfer); `take` leaves an empty + // slice behind. + let buf: &'a mut [u8] = core::mem::take(b); + cmd.rx = Some(buf); + cmd.rx_len = u32::try_from(len).map_err(|_| I3cDrvError::Invalid)?; + cmd.cmd_lo |= COMMAND_PORT_READ_TRANSFER; + } + } + + if i + 1 == nops { + cmd.cmd_lo |= COMMAND_PORT_TOC; + } + cmds.push(cmd).map_err(|_| I3cDrvError::TooManyMsgs)?; + } + + let mut xfer = I3cXfer::new(cmds.as_mut_slice()); + self.start_xfer(config, &mut xfer); + + if !self.wait_xfer_complete(config, &mut xfer, I3C_OP_TIMEOUT_US) { + return Err(I3cDrvError::Timeout); + } + + match xfer.ret { + 0 => { + // Detect per-command short reads. + for (i, requested) in requested_rx_len.iter().enumerate().take(nops) { + if *requested == 0 { + continue; + } + let Some(cmd) = cmds.get(i) else { continue }; + if cmd.ret == 0 && (cmd.rx_len as usize) < *requested { + return Err(I3cDrvError::RespError); + } + } + Ok(()) + } + // Completion with a failed response. + _ => Err(I3cDrvError::RespError), + } + } + + #[allow(clippy::too_many_lines)] + fn do_ccc( + &mut self, + config: &mut I3cConfig, + payload: &mut CccPayload<'_, '_>, + ) -> Result<(), I3cDrvError> { + self.ensure_xfer_ready()?; + // Enforce the role at the hardware boundary. + if config.is_secondary { + return Err(I3cDrvError::Access); + } + let mut cmds = [I3cCmd { + cmd_lo: 0, + cmd_hi: 0, + tx: None, + rx: None, + tx_len: 0, + rx_len: 0, + ret: 0, + }]; + + let mut pos = 0; + let mut rnw: bool = false; + let mut is_broadcast = false; + let mut requested_rx_len: usize = 0; + + let (id, data_len) = { + let Some(ccc) = payload.ccc.as_ref() else { + return Err(I3cDrvError::Invalid); + }; + (ccc.id, ccc.data.as_deref().map_or(0, <[u8]>::len)) + }; + // Reject lengths that exceed the command field. + if data_len > MAX_XFER_DATA_LEN { + return Err(I3cDrvError::Invalid); + } + + let dbp_is_direct = id > 0x7F; + let db: u8 = if dbp_is_direct && data_len > 0 { + // Avoid indexing caller data. + payload + .ccc + .as_ref() + .and_then(|c| c.data.as_deref()) + .and_then(|d| d.first()) + .copied() + .unwrap_or(0) + } else { + 0 + }; + + { + let cmd = &mut cmds[0]; + + if id <= 0x7F { + is_broadcast = true; + + if data_len > 0 + && let Some(d) = payload.ccc.as_ref().and_then(|c| c.data.as_deref()) + { + cmd.tx = Some(d); + cmd.tx_len = u32::try_from(data_len).map_err(|_| I3cDrvError::Invalid)?; + } + } else { + let Some(tgt_addr) = payload + .targets + .as_ref() + .and_then(|ts| ts.first()) + .map(|t| t.addr) + else { + return Err(I3cDrvError::Invalid); + }; + let target_state = config + .attached + .devices + .iter() + .find(|dev| dev.kind == DevKind::I3c && dev.dyn_addr == tgt_addr) + .map(|dev| dev.da_state); + // Unknown targets allow only discovery and DAA operations. + let allowed_for_unknown = matches!( + id, + I3C_CCC_GETPID + | I3C_CCC_GETBCR + | I3C_CCC_GETDCR + | I3C_CCC_GETMWL + | I3C_CCC_GETMRL + | I3C_CCC_GETSTATUS + | I3C_CCC_GETMXDS + | I3C_CCC_SETNEWDA + ); + if !matches!(target_state, Some(DaState::Verified)) + && !(matches!(target_state, Some(DaState::Unknown)) && allowed_for_unknown) + { + return Err(I3cDrvError::Access); + } + let pos_ops = config.attached.pos_of_addr(tgt_addr); + i3c_debug!( + self.logger, + "do_ccc: tgt_addr=0x{:02x}, pos_ops={:?}", + tgt_addr, + pos_ops + ); + pos = match pos_ops { + Some(p) => p, + None => return Err(I3cDrvError::Invalid), + }; + i3c_debug!( + self.logger, + "do_ccc: tgt_addr=0x{:02x}, pos={}", + tgt_addr, + pos + ); + + let Some(tp) = payload.targets.as_deref_mut().and_then(|ts| ts.first_mut()) else { + return Err(I3cDrvError::Invalid); + }; + + rnw = tp.rnw; + + if rnw { + let len = tp.data.as_deref().map_or(0, <[u8]>::len); + if len == 0 || len > MAX_XFER_DATA_LEN { + return Err(I3cDrvError::Invalid); + } + requested_rx_len = len; + cmd.rx_len = u32::try_from(len).map_err(|_| I3cDrvError::Invalid)?; + cmd.rx = tp.data.as_deref_mut(); + } else { + let (d_opt, len) = match tp.data.as_deref() { + Some(d) => (Some(d), d.len()), + None => (None, 0), + }; + if len > MAX_XFER_DATA_LEN { + return Err(I3cDrvError::Invalid); + } + cmd.tx = d_opt; + cmd.tx_len = u32::try_from(len).map_err(|_| I3cDrvError::Invalid)?; + tp.num_xfer = len; + } + } + } + + let cmd = &mut cmds[0]; + cmd.cmd_hi = field_prep(COMMAND_PORT_ATTR, COMMAND_ATTR_XFER_ARG); + + if dbp_is_direct && data_len > 0 { + cmd.cmd_lo |= COMMAND_PORT_DBP; + cmd.cmd_hi |= field_prep(COMMAND_PORT_ARG_DB, db.into()); + } + + if rnw { + cmd.cmd_hi |= field_prep(COMMAND_PORT_ARG_DATA_LEN, cmd.rx_len); + } else { + cmd.cmd_hi |= field_prep(COMMAND_PORT_ARG_DATA_LEN, cmd.tx_len); + } + + cmd.cmd_lo |= field_prep(COMMAND_PORT_ATTR, COMMAND_ATTR_XFER_CMD) + | field_prep(COMMAND_PORT_CMD, id.into()) + | field_prep(COMMAND_PORT_READ_TRANSFER, u32::from(rnw)) + | COMMAND_PORT_CP + | COMMAND_PORT_ROC + | COMMAND_PORT_TOC; + + if !is_broadcast { + cmd.cmd_lo |= field_prep(COMMAND_PORT_DEV_INDEX, u32::from(pos)); + } + + if id == I3C_CCC_SETHID || id == I3C_CCC_DEVCTRL { + cmd.cmd_lo |= field_prep(COMMAND_PORT_SPEED, SpeedI3c::I2cFmAsI3c as u32); + } + + let mut xfer = I3cXfer::new(&mut cmds[..]); + self.start_xfer(config, &mut xfer); + + if !self.wait_xfer_complete(config, &mut xfer, I3C_OP_TIMEOUT_US) { + return Err(I3cDrvError::Timeout); + } + + let ret = xfer.ret; + // Copy before mutably borrowing the payload below. + let actual_rx_len = cmds[0].rx_len as usize; + // IBA_NACK is benign only for broadcast CCCs. + if is_broadcast + && ret == i32::try_from(RESPONSE_ERROR_IBA_NACK).map_err(|_| I3cDrvError::Invalid)? + { + return Ok(()); + } + + if is_broadcast && let Some(ccc_rw) = payload.ccc.as_mut() { + let num_xfer = ccc_rw.data.as_deref().map(<[u8]>::len); + if let Some(n) = num_xfer { + ccc_rw.num_xfer = n; + } + } + + if !is_broadcast && rnw { + let actual = actual_rx_len; + if let Some(tp) = payload.targets.as_deref_mut().and_then(|ts| ts.first_mut()) { + // Report the actual response length. + tp.num_xfer = actual; + } + if ret == 0 && actual < requested_rx_len { + // Reject short direct-read responses. + return Err(I3cDrvError::RespError); + } + } + + match ret { + 0 => Ok(()), + r if r == i32::try_from(RESPONSE_ERROR_ADDRESS_NACK).unwrap_or(-1) => { + Err(I3cDrvError::AddressNack) + } + // The CCC completed with a response error. + _ => Err(I3cDrvError::RespError), + } + } + + fn do_entdaa(&mut self, config: &mut I3cConfig, pos: u32) -> Result<(), I3cDrvError> { + self.ensure_xfer_ready()?; + // Enforce the role at the hardware boundary. + if config.is_secondary { + return Err(I3cDrvError::Access); + } + i3c_debug!(self.logger, "do_entdaa: pos={}", pos); + let cmd = I3cCmd { + cmd_lo: field_prep(COMMAND_PORT_ATTR, COMMAND_ATTR_ADDR_ASSGN_CMD) + | field_prep(COMMAND_PORT_CMD, u32::from(I3C_CCC_ENTDAA)) + | field_prep(COMMAND_PORT_DEV_COUNT, 1) + | field_prep(COMMAND_PORT_DEV_INDEX, pos) + | COMMAND_PORT_ROC + | COMMAND_PORT_TOC, + cmd_hi: field_prep(COMMAND_PORT_ATTR, COMMAND_ATTR_XFER_ARG), + tx: None, + rx: None, + tx_len: 0, + rx_len: 0, + ret: 0, + }; + + i3c_debug!( + self.logger, + "do_entdaa: cmd_lo=0x{:08x}, cmd_hi=0x{:08x}", + cmd.cmd_lo, + cmd.cmd_hi + ); + let mut cmds = [cmd]; + let mut xfer = I3cXfer::new(&mut cmds[..]); + xfer.ret = -1; + + self.start_xfer(config, &mut xfer); + + // Full operation budget — NOT the C driver's 10 ms. The C timeout is + // wall-clock (`k_sem_take(K_MSEC(10))`); this driver's timeout unit is + // cooperative-yield ticks, and a fast `yield_fn` makes the nominal + // value run far shorter in real time. A short budget here aborts a + // live ENTDAA mid-flight (halt + queue reset), wedging the DAA + // handshake. An ENTDAA nobody answers still exits early via NACK. + if !self.wait_xfer_complete(config, &mut xfer, I3C_OP_TIMEOUT_US) { + return Err(I3cDrvError::Timeout); + } + + i3c_debug!(self.logger, "do_entdaa: xfer done"); + match xfer.ret { + 0 => Ok(()), + // Address NACK normally ends DAA. + r if r == i32::try_from(RESPONSE_ERROR_ADDRESS_NACK).unwrap_or(-1) => { + Err(I3cDrvError::DaaNack) + } + _ => Err(I3cDrvError::RespError), + } + } + + fn priv_xfer_build_cmds<'a>( + &mut self, + cmds: &mut [I3cCmd<'a>], + msgs: &mut [I3cMsg<'a>], + pos: u8, + ) -> Result<(), I3cDrvError> { + let cmds_len = cmds.len(); + if cmds_len != msgs.len() { + return Err(I3cDrvError::Invalid); + } + + // The transfer-ID field is 4 bits, so the message index used as the TID + // must stay below `MAX_PRIV_XFER_CMDS`. A larger batch would see indices + // >= 16 alias earlier commands once `field_prep` masks the TID, routing + // their responses onto the wrong message. Reject before consuming any + // buffer so the build stays all-or-nothing. + if cmds_len > MAX_PRIV_XFER_CMDS { + return Err(I3cDrvError::TooManyMsgs); + } + + // Pre-validate every message before taking any buffer, so the build is + // all-or-nothing: a bad message late in the batch must not leave the + // earlier messages' `buf` already moved out to `None`. Non-consuming + // (`as_deref`) — purely a length/presence check. The upper bound is the + // 16-bit `COMMAND_PORT_ARG_DATA_LEN` field width; a longer buffer would + // truncate silently in `field_prep` (the per-command `u32::try_from` + // below only catches lengths above `u32::MAX`). + for m in msgs.iter() { + match m.buf.as_deref() { + Some(b) if !b.is_empty() && b.len() <= MAX_XFER_DATA_LEN => {} + _ => return Err(I3cDrvError::Invalid), + } + } + + // Zip (not parallel `cmds[i]`/`msgs[i]` indexing) so the build loop is + // panic-free for the `no_panics` analysis; lengths are equal (checked). + for (i, (cmd, m)) in cmds.iter_mut().zip(msgs.iter_mut()).enumerate() { + let is_read = (m.flags & I3C_MSG_READ) != 0; + + // Move (`Option::take`) — never alias — the caller's buffer out of + // the message and into the command: the one `&'a mut` reborrow is + // transferred, so the FIFO scatter path in `process_responses` + // holds the only live reference. No `unsafe`, no second `&mut` to + // the same memory. The message keeps only the transfer lengths + // (`num_xfer`/`actual_len`); `m.buf` is `None` after this call and + // no caller reads it post-transfer (the caller still owns the real + // buffer the reborrow came from). Pre-validation above guarantees + // the `Some(non-empty)` arm here, so no message is ever left with a + // half-built (taken) buffer on the error path. + let buf = match m.buf.take() { + Some(b) if !b.is_empty() => b, + other => { + m.buf = other; + return Err(I3cDrvError::Invalid); + } + }; + let len = buf.len(); + + *cmd = I3cCmd { + cmd_hi: field_prep(COMMAND_PORT_ATTR, COMMAND_ATTR_XFER_ARG) + | field_prep( + COMMAND_PORT_ARG_DATA_LEN, + u32::try_from(len).map_err(|_| I3cDrvError::Invalid)?, + ), + cmd_lo: field_prep( + COMMAND_PORT_TID, + u32::try_from(i).map_err(|_| I3cDrvError::Invalid)?, + ) | field_prep(COMMAND_PORT_DEV_INDEX, u32::from(pos)) + | COMMAND_PORT_ROC, + tx: None, + rx: None, + tx_len: 0, + rx_len: 0, + ret: 0, + }; + + if is_read { + cmd.rx = Some(buf); + cmd.rx_len = u32::try_from(len).map_err(|_| I3cDrvError::Invalid)?; + cmd.cmd_lo |= COMMAND_PORT_READ_TRANSFER; + } else { + m.num_xfer = u32::try_from(len).map_err(|_| I3cDrvError::Invalid)?; + // Downgrade the moved `&'a mut [u8]` to `&'a [u8]` for the TX + // side (a move-coercion, not a reborrow — keeps lifetime `'a`). + let tx_slice: &'a [u8] = buf; + cmd.tx = Some(tx_slice); + cmd.tx_len = u32::try_from(len).map_err(|_| I3cDrvError::Invalid)?; + } + + let is_last = i + 1 == cmds_len; + if is_last { + cmd.cmd_lo |= COMMAND_PORT_TOC; + } + } + + Ok(()) + } + + fn priv_xfer( + &mut self, + config: &mut I3cConfig, + pid: u64, + msgs: &mut [I3cMsg], + ) -> Result<(), I3cDrvError> { + self.ensure_xfer_ready()?; + // Enforce the role at the hardware boundary. + if config.is_secondary { + return Err(I3cDrvError::Access); + } + let pos_opt = config + .attached + .devices + .iter() + .position(|dev| { + dev.kind == DevKind::I3c + && dev.pid == Some(pid) + && dev.da_state == DaState::Verified + }) + .and_then(|idx| config.attached.pos_of(idx)); + let pos: u8 = pos_opt.ok_or(I3cDrvError::NoDatPos)?; + + if msgs.len() == 1 { + let mut cmd = I3cCmd::new(); + let cmds = core::slice::from_mut(&mut cmd); + + self.priv_xfer_build_cmds(cmds, msgs, pos)?; + + let mut xfer = I3cXfer::new(cmds); + self.start_xfer(config, &mut xfer); + + if !self.wait_xfer_complete(config, &mut xfer, I3C_OP_TIMEOUT_US) { + return Err(I3cDrvError::Timeout); + } + + if let Some(m) = msgs.first_mut() + && (m.flags & I3C_MSG_READ) != 0 + { + m.actual_len = xfer.cmds.first().map_or(0, |c| c.rx_len); + } + + return match xfer.ret { + 0 => Ok(()), + // Completion with a failed response. + _ => Err(I3cDrvError::RespError), + }; + } + + let mut cmds: heapless::Vec = heapless::Vec::new(); + for _ in 0..msgs.len() { + // `?` (not `.unwrap()`) keeps this panic-free; > MAX_CMDS msgs is a + // typed error, not a panic. + cmds.push(I3cCmd { + cmd_lo: 0, + cmd_hi: 0, + tx: None, + rx: None, + tx_len: 0, + rx_len: 0, + ret: 0, + }) + .map_err(|_| I3cDrvError::TooManyMsgs)?; + } + + self.priv_xfer_build_cmds(cmds.as_mut_slice(), msgs, pos)?; + + let mut xfer = I3cXfer::new(cmds.as_mut_slice()); + self.start_xfer(config, &mut xfer); + + if !self.wait_xfer_complete(config, &mut xfer, I3C_OP_TIMEOUT_US) { + return Err(I3cDrvError::Timeout); + } + + for (i, m) in msgs.iter_mut().enumerate() { + if (m.flags & I3C_MSG_READ) != 0 + && let Some(c) = xfer.cmds.get(i) + { + m.actual_len = c.rx_len; + } + } + + match xfer.ret { + 0 => Ok(()), + // Completion with a failed response. + _ => Err(I3cDrvError::RespError), + } + } + + fn mark_xfer_faulted(&mut self) { + self.xfer_faulted.store(true, Ordering::Release); + } +} + +impl HardwareTarget for Ast1060I3c { + fn target_tx_write(&mut self, config: &I3cConfig, buf: &[u8]) -> Result<(), I3cDrvError> { + self.ensure_xfer_ready()?; + if !config.is_secondary { + return Err(I3cDrvError::Access); + } + if buf.len() > MAX_XFER_DATA_LEN { + return Err(I3cDrvError::Invalid); + } + let len = buf.len(); + self.wr_tx_fifo(buf); + let cmd = field_prep(COMMAND_PORT_ATTR, COMMAND_ATTR_SLAVE_DATA_CMD) + | field_prep( + COMMAND_PORT_ARG_DATA_LEN, + u32::try_from(len).map_err(|_| I3cDrvError::Invalid)?, + ) + | field_prep(COMMAND_PORT_TID, Tid::TargetRdData as u32); + + self.regs.push_cmd(cmd); + Ok(()) + } + + fn target_ibi_raise_hj(&self, config: &mut I3cConfig) -> Result<(), I3cDrvError> { + self.ensure_xfer_ready()?; + if !config.is_secondary { + return Err(I3cDrvError::Invalid); + } + if !self.regs.hj_capable() { + return Err(I3cDrvError::Invalid); + } + + if self.regs.dynamic_addr_valid() { + return Err(I3cDrvError::Access); + } + + self.regs.raise_hot_join_request(); + + Ok(()) + } + + fn target_pending_read_notify( + &mut self, + config: &mut I3cConfig, + buf: &[u8], + notifier: &mut I3cIbi, + ) -> Result<(), I3cDrvError> { + self.ensure_xfer_ready()?; + if !config.is_secondary { + return Err(I3cDrvError::Access); + } + let events = isr_events(self.bus() as usize); + + // A fault the ISR deferred (errored response / halted engine after a + // CCC): recover here on the thread, where the wait policy lives. + if events.take_fault() { + i3c_debug!(self.logger, "recovering deferred target fault"); + // enter_halt isn't expected to fail; reset_ctrl still runs + // unconditionally, and a halt failure is caught below via halt_ok. + let halt_ok = self.enter_halt(false, config).is_ok(); + let reset_ok = self.reset_ctrl(RESET_CTRL_QUEUES).is_ok(); + let exit_ok = self.exit_halt(config).is_ok(); + if !(halt_ok && reset_ok && exit_ok) { + // Block I/O after failed recovery. + self.xfer_faulted.store(true, Ordering::Release); + return Err(I3cDrvError::IoError); + } + } + + let reg = self.regs.read_slv_event_ctrl(); + if !(config.sir_allowed_by_sw && (reg & SLV_EVENT_CTRL_SIR_EN != 0)) { + return Err(I3cDrvError::Access); + } + + let Some(mdb) = notifier.first_byte() else { + return Err(I3cDrvError::Invalid); + }; + + // Validate command lengths before writing the FIFO. + if buf.len() > MAX_XFER_DATA_LEN + || notifier + .payload + .is_some_and(|p| p.len() > MAX_XFER_DATA_LEN) + { + return Err(I3cDrvError::Invalid); + } + + self.set_ibi_mdb(mdb); + if let Some(p) = notifier.payload + && !p.is_empty() + { + self.wr_tx_fifo(p); + } + + let payload_len = u32::try_from(notifier.payload.map_or(0, <[u8]>::len)) + .map_err(|_| I3cDrvError::Invalid)?; + let cmd: u32 = field_prep(COMMAND_PORT_ATTR, COMMAND_ATTR_SLAVE_DATA_CMD) + | field_prep(COMMAND_PORT_ARG_DATA_LEN, payload_len) + | field_prep(COMMAND_PORT_TID, Tid::TargetIbi as u32); + events.target_ibi_done.reset(); + self.regs.push_cmd(cmd); + + self.regs.set_resp_buf_threshold(0); + + events.target_data_done.reset(); + self.target_tx_write(config, buf)?; + + self.regs.raise_sir(); + + if !events + .target_ibi_done + .wait_for_us(I3C_OP_TIMEOUT_US, &mut self.yield_fn) + { + // Vendor C driver parity (`target_rst_worker`): an unanswered SIR + // means the engine may be wedged beyond a queue reset — re-run the + // full controller init. Side effects match the C driver: the + // dynamic address is dropped (the bus master must re-run DAA) and + // `sir_allowed_by_sw` is cleared until the next DA assignment. + i3c_debug!(self.logger, "SIR timeout! Reset I3C controller"); + if let Err(e) = self.init(config) { + // Keep the controller faulted after failed recovery. + i3c_debug!(self.logger, "SIR timeout recovery init failed: {:?}", e); + self.xfer_faulted.store(true, Ordering::Release); + } + return Err(I3cDrvError::IoError); + } + + if !events + .target_data_done + .wait_for_us(I3C_OP_TIMEOUT_US, &mut self.yield_fn) + { + i3c_debug!(self.logger, "wait master read timeout! Reset queues"); + self.i3c_disable(config.is_secondary); + if self.reset_ctrl(RESET_CTRL_QUEUES).is_err() { + // Leave the engine disabled and faulted. + i3c_debug!(self.logger, "target-data timeout: queue reset failed"); + self.xfer_faulted.store(true, Ordering::Release); + } else { + self.i3c_enable(config); + } + return Err(I3cDrvError::Timeout); + } + + Ok(()) + } +} diff --git a/target/ast10x0/peripherals/i3c/ibi.rs b/target/ast10x0/peripherals/i3c/ibi.rs new file mode 100644 index 00000000..0b2434a2 --- /dev/null +++ b/target/ast10x0/peripherals/i3c/ibi.rs @@ -0,0 +1,280 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! I3C In-Band Interrupt (IBI) Work Queue +//! +//! Handles IBI events including Hot-Join, SIR (Slave Interrupt Request), +//! and target dynamic address assignment. +//! +//! Ported from `aspeed-rust/src/i3c/ibi.rs` @ ce3b567. +//! +//! **Porting delta (queue mechanism).** The reference uses `heapless::spsc` +//! `Producer`/`Consumer` handles, split once and parked in a global +//! `Mutex>`. On this target (heapless 0.9 + this toolchain) we +//! observed unstable behavior when those handles were stored in a `static` and +//! later re-accessed across separate critical sections: a split that read back +//! `prod=Some, cons=Some` in-place would, after the consumer was taken in a +//! later critical section, read back `prod=None, cons=Some`. The root cause was +//! not fully isolated, so this port uses a simpler fixed-size ring buffer whose +//! aliasing and lifetime rules are easier to audit. +//! +//! So the SPSC split is replaced by a plain fixed-size ring buffer of +//! `Option` (`IbiWork` is `Copy`, no niche pointers), guarded by the +//! same `critical_section`. The process-global queue/handler design (goal.md +//! ADR-3) is preserved — an ISR still cannot borrow a stack-owned device, so +//! the IBI plane stays global and uses one consumer per bus. + +use core::cell::UnsafeCell; +use core::sync::atomic::{AtomicBool, Ordering}; +use critical_section::Mutex; + +/// IBI queue depth +const IBIQ_DEPTH: usize = 16; +/// Maximum IBI payload data size +pub const IBI_DATA_MAX: u8 = 16; +/// Maximum private-write payload captured per [`IbiWork::TargetMasterWrite`]. +/// +/// The vendor C driver delivers the full write (heap-allocated per response); +/// this port has no heap, so the work item carries an inline buffer instead. +/// Writes longer than this are truncated (`len` reports the captured length); +/// the ISR drains the excess so the FIFO stays aligned. +/// +/// **Sizing is ISR-stack-bound, not RAM-bound.** `IbiWork` is passed by value +/// through the enqueue path, so the ISR transiently stacks roughly +/// `2 * (IBI_MWR_DATA_MAX + 8)` bytes per enqueue on top of the ISR's own +/// bounce buffer (also this size, see `isr_target_responses`). 128 was +/// empirically enough to HardFault the kernel handler stack on AST1060; 64 +/// keeps the total below the original 256-byte-bounce-buffer footprint while +/// quadrupling the old 16-byte payload cap. Static cost of the rings is +/// `(IBI_MWR_DATA_MAX + 8) * IBIQ_DEPTH * 4 buses` (~4.6 KiB at 64). +pub const IBI_MWR_DATA_MAX: usize = 64; + +// ============================================================================= +// IBI Work Item +// ============================================================================= + +/// IBI work item representing an interrupt event +#[derive(Debug, Clone, Copy)] +pub enum IbiWork { + /// One or more older work items were dropped because the queue was full. + Overflow, + /// Hot-Join request from a device + HotJoin, + /// Slave Interrupt Request + Sirq { + /// Address of requesting device + addr: u8, + /// Length of payload data + len: u8, + /// Payload data + data: [u8; IBI_DATA_MAX as usize], + }, + /// Target dynamic address assignment notification + TargetDaAssignment, + /// Private write received by this target from the controller. + TargetMasterWrite { + /// Number of received bytes captured in `data`. + len: u8, + /// Received data, truncated to [`IBI_MWR_DATA_MAX`]. + data: [u8; IBI_MWR_DATA_MAX], + }, +} + +// ============================================================================= +// Static Ring-Buffer Storage +// ============================================================================= + +/// Fixed-size single-producer/single-consumer ring of IBI work items. +/// +/// All access is serialized by the per-bus `critical_section::Mutex`, so the +/// indices need no atomics; the producer is the I3C ISR and the consumer is the +/// owning test/driver loop. +struct IbiRing { + buf: [Option; IBIQ_DEPTH], + head: usize, + len: usize, + overflowed: bool, +} + +impl IbiRing { + const fn new() -> Self { + Self { + buf: [None; IBIQ_DEPTH], + head: 0, + len: 0, + overflowed: false, + } + } + + fn push(&mut self, work: IbiWork) -> bool { + self.head %= IBIQ_DEPTH; + if self.len >= IBIQ_DEPTH { + // Keep the newest IRQ information when the consumer falls behind. + self.head = (self.head + 1) % IBIQ_DEPTH; + self.len = IBIQ_DEPTH - 1; + self.overflowed = true; + } + let idx = (self.head + self.len) % IBIQ_DEPTH; + let Some(slot) = self.buf.get_mut(idx) else { + return false; + }; + *slot = Some(work); + self.len += 1; + true + } + + fn pop(&mut self) -> Option { + if self.overflowed { + self.overflowed = false; + return Some(IbiWork::Overflow); + } + self.head %= IBIQ_DEPTH; + if self.len == 0 || self.len > IBIQ_DEPTH { + // Empty, or a corrupt length — treat as empty (panic-free). + return None; + } + let work = self.buf.get_mut(self.head).and_then(Option::take); + self.head = (self.head + 1) % IBIQ_DEPTH; + self.len -= 1; + work + } +} + +// INTENTIONAL EXCEPTION to borrow-arbitrated exclusivity (goal.md ADR-3): +// the IBI plane is process-global mutable state because the producer is the +// ISR, which cannot borrow a stack-owned device. Bounded (one fixed-depth +// ring per bus) and serialized by the critical section; access is via the +// leaf `ring_push`/`ring_pop` helpers only. +static IBI_RINGS: [Mutex>; 4] = [ + Mutex::new(UnsafeCell::new(IbiRing::new())), + Mutex::new(UnsafeCell::new(IbiRing::new())), + Mutex::new(UnsafeCell::new(IbiRing::new())), + Mutex::new(UnsafeCell::new(IbiRing::new())), +]; + +/// Enforce the single-consumer side of the per-bus SPSC queue. +static IBI_CONSUMER_CLAIMED: [AtomicBool; 4] = [ + AtomicBool::new(false), + AtomicBool::new(false), + AtomicBool::new(false), + AtomicBool::new(false), +]; + +/// Push work; a full ring drops the oldest item and records an overflow event. +/// +/// The `&mut IbiRing` is confined to this leaf function — no caller-provided +/// code runs while it is live — so the exclusive borrow cannot be re-entered. +fn ring_push(bus: usize, work: IbiWork) -> bool { + let Some(workq) = IBI_RINGS.get(bus) else { + return false; + }; + critical_section::with(|cs| { + // SAFETY: the critical section excludes ISR/thread concurrency, and + // the `&mut IbiRing` never escapes this function (the ring is only + // reachable via `ring_push`/`ring_pop`, neither of which calls back + // into caller code), so this is the only live reference. + let ring: &mut IbiRing = unsafe { &mut *workq.borrow(cs).get() }; + ring.push(work) + }) +} + +/// Pop the next work item from the ring for `bus`, if any. +/// +/// Same confinement argument as [`ring_push`]. +fn ring_pop(bus: usize) -> Option { + let workq = IBI_RINGS.get(bus)?; + critical_section::with(|cs| { + // SAFETY: see `ring_push` — critical section + leaf confinement make + // this the only live reference to the ring. + let ring: &mut IbiRing = unsafe { &mut *workq.borrow(cs).get() }; + ring.pop() + }) +} + +/// Discard pre-reset work for a bus. +pub fn i3c_ibi_workq_clear(bus: usize) { + while ring_pop(bus).is_some() {} +} + +// ============================================================================= +// Consumer Handle +// ============================================================================= + +/// Consumer handle for a bus's IBI work queue. +/// +/// Holds no state beyond the bus index; dequeuing reads the shared ring under +/// the critical section. Returned by [`i3c_ibi_workq_consumer`]. +pub struct IbiConsumer { + bus: usize, +} + +impl Drop for IbiConsumer { + fn drop(&mut self) { + if let Some(claimed) = IBI_CONSUMER_CLAIMED.get(self.bus) { + claimed.store(false, Ordering::Release); + } + } +} + +impl IbiConsumer { + /// Dequeue the next IBI work item, if any. + #[must_use] + pub fn dequeue(&mut self) -> Option { + ring_pop(self.bus) + } +} + +/// Get the IBI work queue consumer for a bus. +/// +/// Returns `None` if the bus index is out of range. +#[must_use] +pub fn i3c_ibi_workq_consumer(bus: usize) -> Option { + let claimed = IBI_CONSUMER_CLAIMED.get(bus)?; + claimed + .compare_exchange(false, true, Ordering::AcqRel, Ordering::Acquire) + .ok()?; + Some(IbiConsumer { bus }) +} + +// ============================================================================= +// Enqueue Functions +// ============================================================================= + +/// Enqueue a target dynamic address assignment notification +#[must_use] +pub fn i3c_ibi_work_enqueue_target_da_assignment(bus: usize) -> bool { + ring_push(bus, IbiWork::TargetDaAssignment) +} + +/// Enqueue a Hot-Join notification +#[must_use] +pub fn i3c_ibi_work_enqueue_hotjoin(bus: usize) -> bool { + ring_push(bus, IbiWork::HotJoin) +} + +/// Enqueue an SIR. +#[must_use] +pub fn i3c_ibi_work_enqueue_target_irq(bus: usize, addr: u8, data: &[u8]) -> bool { + let mut ibi_buf = [0u8; IBI_DATA_MAX as usize]; + let take = core::cmp::min(IBI_DATA_MAX as usize, data.len()); + ibi_buf[..take].copy_from_slice(&data[..take]); + let work = IbiWork::Sirq { + addr, + len: u8::try_from(take).unwrap_or(IBI_DATA_MAX), + data: ibi_buf, + }; + ring_push(bus, work) +} + +/// Enqueue a private write received by this target from the controller. +#[must_use] +pub fn i3c_ibi_work_enqueue_target_master_write(bus: usize, data: &[u8]) -> bool { + let mut buf = [0u8; IBI_MWR_DATA_MAX]; + let take = core::cmp::min(IBI_MWR_DATA_MAX, data.len()); + buf[..take].copy_from_slice(&data[..take]); + let work = IbiWork::TargetMasterWrite { + len: u8::try_from(take).unwrap_or(u8::MAX), + data: buf, + }; + ring_push(bus, work) +} diff --git a/target/ast10x0/peripherals/i3c/mod.rs b/target/ast10x0/peripherals/i3c/mod.rs new file mode 100644 index 00000000..777d9799 --- /dev/null +++ b/target/ast10x0/peripherals/i3c/mod.rs @@ -0,0 +1,94 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! AST1060 I3C bare-metal driver core +//! +//! # Overview +//! +//! This module provides a hardware abstraction layer for I3C controllers, +//! supporting both controller (master) and target (secondary) modes. It is a +//! behavioral-parity port of `aspeed-rust/src/i3c/` @ ce3b567 into the openprot +//! AST10x0 peripheral HAL. See `plans/goal.md` for the parity standard and the +//! deltas ledger (notably: confined-`unsafe` façade + injected yield closure on +//! [`hardware::Ast1060I3c`], and `proposed_traits` replaced by inherent methods +//! on [`controller::I3cController`]). +//! +//! # Architecture +//! +//! - [`controller`]: Main I3C controller abstraction + master/target operations +//! - [`config`]: Configuration types and device management +//! - [`types`]: Core data types (commands, messages, transfers) +//! - [`error`]: Error types +//! - [`constants`]: Hardware register definitions +//! - [`hardware`]: Hardware interface (traits + AST1060 implementation) +//! - [`ccc`]: Common Command Code operations +//! - [`ibi`]: In-Band Interrupt work queue +//! +//! # Features +//! +//! - I3C SDR and HDR modes +//! - Dynamic address assignment (ENTDAA) +//! - In-Band Interrupts (IBI) +//! - Hot-Join support +//! - Target mode operation +//! - Legacy I2C device support + +pub mod ccc; +pub mod config; +pub mod constants; +pub mod controller; +pub mod error; +pub mod hardware; +pub mod ibi; +pub mod registers; +pub mod types; + +// ============================================================================= +// Public Re-exports +// ============================================================================= + +// Controller (two-state lifecycle: Uninitialized -> Ready, matching the SMC +// peripheral's precedent) +pub use controller::{I3cController, Ready, Uninitialized}; + +// Error types +pub use error::{CccErrorKind, I3cError, Result}; + +// Configuration +pub use config::{ + AddrBook, Attached, CommonCfg, CommonState, DeviceEntry, I3cConfig, I3cTargetConfig, IbiState, + ResetSpec, I3C_MAX_CORE_CLK, I3C_MIN_CORE_CLK_HDR, I3C_MIN_CORE_CLK_SDR, +}; + +// Core types +pub use types::{ + Completion, DevKind, I2cOp, I3cCmd, I3cDeviceId, I3cIbi, I3cIbiType, I3cMsg, I3cPid, I3cStatus, + I3cXfer, SpeedI2c, SpeedI3c, Tid, +}; + +// Hardware interface +pub use hardware::{ + dispatch_i3c_irq, register_i3c_irq_handler, Ast1060I3c, HardwareClock, HardwareCore, + HardwareFifo, HardwareInterface, HardwareRecovery, HardwareTarget, HardwareTransfer, IsrCtx, +}; + +// Confined-unsafe MMIO façade (runtime bus selection) +pub use registers::I3cRegisters; + +// CCC operations +pub use ccc::{ + ccc_events_all_set, ccc_events_set, ccc_getbcr, ccc_getdcr, ccc_getmrl, ccc_getmwl, + ccc_getmxds, ccc_getpid, ccc_getstatus, ccc_getstatus_fmt1, ccc_rstact_all, ccc_rstdaa_all, + ccc_setmrl, ccc_setmrl_all, ccc_setmwl, ccc_setmwl_all, ccc_setnewda, Ccc, CccPayload, + CccRstActDefByte, CccTargetPayload, GetStatusDefByte, GetStatusFormat, GetStatusResp, +}; + +// IBI work queue +pub use ibi::{ + i3c_ibi_work_enqueue_hotjoin, i3c_ibi_work_enqueue_target_da_assignment, + i3c_ibi_work_enqueue_target_irq, i3c_ibi_work_enqueue_target_master_write, + i3c_ibi_workq_consumer, IbiConsumer, IbiWork, +}; + +// Constants (wildcard export for convenience) +pub use constants::*; diff --git a/target/ast10x0/peripherals/i3c/registers.rs b/target/ast10x0/peripherals/i3c/registers.rs new file mode 100644 index 00000000..f8913871 --- /dev/null +++ b/target/ast10x0/peripherals/i3c/registers.rs @@ -0,0 +1,885 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Confined-`unsafe` MMIO façade over the per-bus I3C register blocks. +//! +//! One driver manages multiple bus instances: the bus is selected at +//! **runtime** by index (no per-instance type parameter), mirroring the +//! reference `aspeed-rust` driver. Following the `SmcRegisters` precedent, +//! **all register operations go through this single point**: the rest of the +//! driver (`hardware.rs` upward) never touches PAC types or MMIO `unsafe` — +//! it calls the intent-named methods below. +//! +//! Method naming follows the AST1060 PAC convention where an operation maps +//! to one register (`read_reset_ctrl` ↔ `i3cd034`), and the datasheet's +//! vocabulary where an operation is a multi-field sequence +//! (`enable_controller_primary`, `assert_all_queue_resets`). + +use core::marker::PhantomData; + +use super::constants::MAX_BUSES; + +// ----------------------------------------------------------------------------- +// Per-bus register dispatch (private) +// ----------------------------------------------------------------------------- +// +// The I3C-global block packs one reg0/reg1 pair per bus, and the DAT is eight +// identically-shaped registers; the PAC gives each its own accessor, so these +// macros do the bus/position match once, here, inside the façade. The `_` +// arms are unreachable: `I3cRegisters::new` validates `bus`, and DAT +// positions are bounded by `dat_depth()` — kept panic-free regardless. + +macro_rules! i3cg_reg0 { + ($self:expr, $($ops:tt)*) => {{ + match $self.bus { + 0 => $self.i3cg().i3c010().$($ops)*, + 1 => $self.i3cg().i3c020().$($ops)*, + 2 => $self.i3cg().i3c030().$($ops)*, + _ => $self.i3cg().i3c040().$($ops)*, + } + }}; +} + +macro_rules! i3cg_reg1 { + ($self:expr, $($ops:tt)*) => {{ + match $self.bus { + 0 => $self.i3cg().i3c014().$($ops)*, + 1 => $self.i3cg().i3c024().$($ops)*, + 2 => $self.i3cg().i3c034().$($ops)*, + _ => $self.i3cg().i3c044().$($ops)*, + } + }}; +} + +macro_rules! dat_reg { + ($self:expr, $pos:expr, $($ops:tt)*) => {{ + match $pos { + 0 => $self.i3c().i3cd280().$($ops)*, + 1 => $self.i3c().i3cd284().$($ops)*, + 2 => $self.i3c().i3cd288().$($ops)*, + 3 => $self.i3c().i3cd28c().$($ops)*, + 4 => $self.i3c().i3cd290().$($ops)*, + 5 => $self.i3c().i3cd294().$($ops)*, + 6 => $self.i3c().i3cd298().$($ops)*, + _ => $self.i3c().i3cd29c().$($ops)*, + } + }}; +} + +/// Safe wrapper around the I3C / I3C-global / SCU hardware registers of one bus. +/// +/// This struct consolidates all unsafe I3C MMIO access. All register +/// operations go through this single point, making it easy to audit safety +/// invariants — the same shape as `SmcRegisters` in `smc/registers.rs`. +/// +/// Not `Copy`/`Clone`: an `I3cRegisters` represents exclusive ownership of +/// one bus's register blocks. +pub struct I3cRegisters { + i3c: *const ast1060_pac::i3c::RegisterBlock, + i3cg: *const ast1060_pac::i3cglobal::RegisterBlock, + scu: *const ast1060_pac::scu::RegisterBlock, + bus: u8, + // `*const ()` marker keeps the handle `!Send` and `!Sync`. An + // `I3cRegisters` represents exclusive ownership of one bus's register + // blocks; it must not be shared between threads or moved into another + // execution context where it could alias the controller it owns. + _not_send_sync: PhantomData<*const ()>, +} + +impl I3cRegisters { + /// Create the register façade for `bus` (0..[`MAX_BUSES`]). + /// + /// Returns `None` if `bus` is out of range — every accessor below is + /// therefore panic-free: a constructed façade always holds valid pointers + /// and an in-range bus index. + /// + /// `pub(crate)`: the single *public* unsafe gate is + /// [`Ast1060I3c::new`](super::hardware::Ast1060I3c::new), which forwards + /// this contract; external callers cannot construct a second façade for + /// a bus behind the driver's back. + /// + /// # Safety + /// + /// This is the entire `unsafe` perimeter for I3C MMIO (Delta D3): + /// - The AST1060 PAC singleton pointers (`I3c*::ptr()`, + /// `I3cglobal::ptr()`, `Scu::ptr()`) must point to valid register + /// blocks for the program's lifetime (they do on AST1060 hardware). + /// - Access through the returned façade must be serialized by the caller + /// (the type is `!Sync`); only one owner per physical bus may be + /// active at a time. + #[must_use] + pub(crate) const unsafe fn new(bus: u8) -> Option { + let i3c = match bus { + 0 => ast1060_pac::I3c::ptr(), + 1 => ast1060_pac::I3c1::ptr(), + 2 => ast1060_pac::I3c2::ptr(), + 3 => ast1060_pac::I3c3::ptr(), + _ => return None, + }; + // Redundant with the match above, but keeps the invariant explicit if + // MAX_BUSES and the match ever diverge. + if bus as usize >= MAX_BUSES { + return None; + } + Some(Self { + i3c, + i3cg: ast1060_pac::I3cglobal::ptr(), + scu: ast1060_pac::Scu::ptr(), + bus, + _not_send_sync: PhantomData, + }) + } + + /// Bus index this façade was constructed for (always `< MAX_BUSES`). + #[inline] + #[must_use] + pub fn bus(&self) -> u8 { + self.bus + } + + /// Second handle over the same bus for the **ISR side**. + /// + /// This is the one sanctioned exception to "one `I3cRegisters` per bus": + /// the interrupt service routine cannot borrow the thread-owned handle, + /// so it gets its own. No Rust memory is aliased (the pointers target + /// MMIO, not Rust objects). + /// + /// # Safety + /// + /// Device access through the alias must remain serialized with the + /// owning handle — on this single-core target that holds because the ISR + /// runs atomically with respect to the thread. + pub(crate) unsafe fn isr_alias(&self) -> Self { + Self { + i3c: self.i3c, + i3cg: self.i3cg, + scu: self.scu, + bus: self.bus, + _not_send_sync: PhantomData, + } + } + + // ------------------------------------------------------------------------- + // Interior deref helpers — the only repeated `unsafe` + // ------------------------------------------------------------------------- + + /// The only repeated interior `unsafe` for the I3C block. + /// + /// Returns a `'static` reference: the constructor's contract guarantees + /// the pointer is valid for the program lifetime. + #[inline] + fn i3c(&self) -> &'static ast1060_pac::i3c::RegisterBlock { + // SAFETY: `new` guarantees a valid pointer for the program lifetime; + // access is serialized by the caller (the type is `!Sync`). + unsafe { &*self.i3c } + } + + /// The only repeated interior `unsafe` for the I3C-global block. See + /// [`i3c`](Self::i3c). + #[inline] + fn i3cg(&self) -> &'static ast1060_pac::i3cglobal::RegisterBlock { + // SAFETY: see `i3c`. + unsafe { &*self.i3cg } + } + + /// The only repeated interior `unsafe` for the SCU block. See + /// [`i3c`](Self::i3c). + #[inline] + fn scu(&self) -> &'static ast1060_pac::scu::RegisterBlock { + // SAFETY: see `i3c`. + unsafe { &*self.scu } + } + + // ------------------------------------------------------------------------- + // SCU: per-bus reset and clock + // ------------------------------------------------------------------------- + + /// SCU050: assert this bus's controller reset. + pub(crate) fn core_reset_assert(&self) { + match self.bus { + 0 => self + .scu() + .scu050() + .modify(|_, w| w.rst_i3c0ctrl().set_bit()), + 1 => self + .scu() + .scu050() + .modify(|_, w| w.rst_i3c1ctrl().set_bit()), + 2 => self + .scu() + .scu050() + .modify(|_, w| w.rst_i3c2ctrl().set_bit()), + _ => self + .scu() + .scu050() + .modify(|_, w| w.rst_i3c3ctrl().set_bit()), + }; + } + + /// SCU054: deassert this bus's controller reset (write-1-to-clear). + pub(crate) fn core_reset_deassert(&self) { + let mask = 1u32 << (8 + u32::from(self.bus)); + self.scu() + .scu054() + .modify(|_, w| unsafe { w.scu050sys_rst_ctrl_clear_reg2().bits(mask) }); + } + + /// SCU050: assert the shared I3C register/DMA reset. + #[allow(dead_code)] + pub(crate) fn global_reset_assert(&self) { + self.scu() + .scu050() + .modify(|_, w| w.rst_i3cregdmactrl().set_bit()); + } + + /// SCU054: deassert the shared I3C register/DMA reset (write-1-to-clear). + pub(crate) fn global_reset_deassert(&self, mask: u32) { + self.scu() + .scu054() + .modify(|_, w| unsafe { w.scu050sys_rst_ctrl_clear_reg2().bits(mask) }); + } + + /// SCU094: ungate this bus's clock (write-1-to-clear stop bit). + pub(crate) fn clock_on(&self) { + let mask = 1u32 << (8 + u32::from(self.bus)); + self.scu() + .scu094() + .modify(|_, w| unsafe { w.scu090clk_stop_ctrl_clear_reg_set2().bits(mask) }); + } + + /// SCU004: hardware revision ID. + pub(crate) fn hw_rev_id(&self) -> u32 { + self.scu().scu004().read().hw_rev_id().bits().into() + } + + // ------------------------------------------------------------------------- + // I3C-global: this bus's reg0/reg1 pair + // ------------------------------------------------------------------------- + + /// I3CG reg0: raw read. + pub(crate) fn i3cg_read_reg0(&self) -> u32 { + i3cg_reg0!(self, read().bits()) + } + + /// I3CG reg0: raw write. + pub(crate) fn i3cg_write_reg0(&self, val: u32) { + i3cg_reg0!(self, write(|w| unsafe { w.bits(val) })); + } + + /// I3CG reg1: raw read. + pub(crate) fn i3cg_read_reg1(&self) -> u32 { + i3cg_reg1!(self, read().bits()) + } + + /// I3CG reg1: program act-mode 1, instance id = bus, and the bring-up + /// static address. + pub(crate) fn i3cg_program_reg1(&self, static_addr: u8) { + let bus = self.bus; + i3cg_reg1!( + self, + write(|w| unsafe { + w.actmode() + .bits(1) + .instid() + .bits(bus) + .staticaddr() + .bits(static_addr) + }) + ); + } + + /// I3CG reg1: read-modify-write setting `mask` bits. + pub(crate) fn i3cg_reg1_set_bits(&self, mask: u32) { + i3cg_reg1!(self, modify(|r, w| unsafe { w.bits(r.bits() | mask) })); + } + + /// I3CG reg1: read-modify-write clearing `mask` bits. + pub(crate) fn i3cg_reg1_clear_bits(&self, mask: u32) { + i3cg_reg1!(self, modify(|r, w| unsafe { w.bits(r.bits() & !mask) })); + } + + /// I3CG reg1: absolute write via read-modify-write (preserves the + /// reference's RMW bus access pattern). + pub(crate) fn i3cg_reg1_overwrite(&self, val: u32) { + i3cg_reg1!(self, modify(|_r, w| unsafe { w.bits(val) })); + } + + // ------------------------------------------------------------------------- + // I3CD000: device control + // ------------------------------------------------------------------------- + + /// I3CD000: set/clear automatic hot-join NACK. + pub(crate) fn set_hot_join_nack(&self, on: bool) { + self.i3c().i3cd000().modify(|_, w| { + if on { + w.hot_join_ack_nack_ctrl().set_bit() + } else { + w.hot_join_ack_nack_ctrl().clear_bit() + } + }); + } + + /// I3CD000: is the controller enable bit set? + pub(crate) fn controller_enabled(&self) -> bool { + self.i3c().i3cd000().read().enbl_i3cctrl().bit_is_set() + } + + /// I3CD000: clear the controller enable bit. + pub(crate) fn disable_controller(&self) { + self.i3c() + .i3cd000() + .modify(|_, w| w.enbl_i3cctrl().clear_bit()); + } + + /// I3CD000: enable in primary (master) role — include broadcast address. + pub(crate) fn enable_controller_primary(&self) { + self.i3c().i3cd000().modify(|_, w| { + w.i3cbroadcast_addr_include() + .set_bit() + .enbl_i3cctrl() + .set_bit() + }); + } + + /// I3CD000: enable in secondary (target) role — IBI payload on, I2C/I3C + /// mode adaption off. + pub(crate) fn enable_controller_secondary(&self) { + self.i3c().i3cd000().modify(|_, w| { + w.enbl_adaption_of_i2ci3cmode() + .clear_bit() + .ibipayloaden() + .set_bit() + .enbl_i3cctrl() + .set_bit() + }); + } + + /// I3CD000: resume from a halted transfer state. + pub(crate) fn resume(&self) { + self.i3c().i3cd000().modify(|_, w| w.i3cresume().set_bit()); + } + + /// I3CD000: abort the current transfer (software halt request). + pub(crate) fn abort(&self) { + self.i3c().i3cd000().modify(|_, w| w.i3cabort().set_bit()); + } + + /// I3CD000: program the IBI mandatory data byte. + pub(crate) fn set_ibi_mdb(&self, mdb: u8) { + self.i3c() + .i3cd000() + .modify(|_, w| unsafe { w.mdb().bits(mdb) }); + } + + // ------------------------------------------------------------------------- + // I3CD004 / I3CD008: device address & capability + // ------------------------------------------------------------------------- + + /// I3CD004: program the secondary-role static address (and mark valid). + pub(crate) fn program_secondary_static_addr(&self, addr: u8) { + self.i3c() + .i3cd004() + .write(|w| unsafe { w.dev_static_addr().bits(addr).static_addr_valid().set_bit() }); + } + + /// I3CD004: program the primary-role dynamic address (and mark valid). + pub(crate) fn program_primary_dynamic_addr(&self, addr: u8) { + self.i3c().i3cd004().write(|w| unsafe { + w.dev_dynamic_addr() + .bits(addr) + .dynamic_addr_valid() + .set_bit() + }); + } + + /// I3CD004: currently assigned dynamic address. + pub(crate) fn dynamic_addr(&self) -> u8 { + self.i3c().i3cd004().read().dev_dynamic_addr().bits() + } + + /// I3CD004: is the dynamic address valid? + pub(crate) fn dynamic_addr_valid(&self) -> bool { + self.i3c().i3cd004().read().dynamic_addr_valid().bit() + } + + /// I3CD008: does the device advertise hot-join capability? + pub(crate) fn hj_capable(&self) -> bool { + self.i3c().i3cd008().read().slvhjcap().bit() + } + + // ------------------------------------------------------------------------- + // Command / response / data ports + // ------------------------------------------------------------------------- + + /// I3CD00C: push one word into the command queue. + pub(crate) fn push_cmd(&self, val: u32) { + self.i3c().i3cd00c().write(|w| unsafe { w.bits(val) }); + } + + /// I3CD010: pop one word from the response queue. + pub(crate) fn pop_response(&self) -> u32 { + self.i3c().i3cd010().read().bits() + } + + /// I3CD014: write `bytes` into the TX FIFO (LE words; tail zero-padded). + pub(crate) fn tx_fifo_write(&self, bytes: &[u8]) { + let mut chunks = bytes.chunks_exact(4); + for chunk in &mut chunks { + let word = u32::from_le_bytes([chunk[0], chunk[1], chunk[2], chunk[3]]); + self.i3c() + .i3cd014() + .write(|w| unsafe { w.tx_data_port().bits(word) }); + } + + let rem = chunks.remainder(); + if !rem.is_empty() { + let mut tmp = [0u8; 4]; + tmp[..rem.len()].copy_from_slice(rem); + let word = u32::from_le_bytes(tmp); + self.i3c() + .i3cd014() + .write(|w| unsafe { w.tx_data_port().bits(word) }); + } + } + + /// I3CD014: read `out.len()` bytes from the RX FIFO (LE words). + pub(crate) fn rx_fifo_read(&self, out: &mut [u8]) { + Self::fifo_read(|| self.i3c().i3cd014().read().rx_data_port().bits(), out); + } + + /// I3CD014: discard `len` bytes from the RX FIFO. + pub(crate) fn rx_fifo_drain(&self, len: usize) { + Self::fifo_drain(|| self.i3c().i3cd014().read().rx_data_port().bits(), len); + } + + /// I3CD018: pop one word from the IBI queue. + pub(crate) fn ibi_fifo_pop(&self) -> u32 { + self.i3c().i3cd018().read().bits() + } + + /// I3CD018: read `out.len()` bytes from the IBI queue (LE words). + pub(crate) fn ibi_fifo_read(&self, out: &mut [u8]) { + Self::fifo_read(|| self.i3c().i3cd018().read().bits(), out); + } + + /// I3CD018: discard `len` bytes from the IBI queue. + pub(crate) fn ibi_fifo_drain(&self, len: usize) { + Self::fifo_drain(|| self.i3c().i3cd018().read().bits(), len); + } + + /// Word-at-a-time FIFO scatter helper (shared by RX/IBI reads). + fn fifo_read u32>(mut read_word: F, out: &mut [u8]) { + let mut chunks = out.chunks_exact_mut(4); + for chunk in &mut chunks { + let val = read_word(); + chunk.copy_from_slice(&val.to_le_bytes()); + } + + let rem = chunks.into_remainder(); + if !rem.is_empty() { + let val = read_word(); + let bytes = val.to_le_bytes(); + rem.copy_from_slice(&bytes[..rem.len()]); + } + } + + /// Word-at-a-time FIFO discard helper (shared by RX/IBI drains). + fn fifo_drain u32>(mut read_word: F, len: usize) { + let nwords = (len + 3) >> 2; + for _ in 0..nwords { + read_word(); + } + } + + // ------------------------------------------------------------------------- + // Queue thresholds + // ------------------------------------------------------------------------- + + /// I3CD01C: program the IBI data threshold. + pub(crate) fn set_ibi_data_threshold(&self, val: u8) { + self.i3c() + .i3cd01c() + .write(|w| unsafe { w.ibidata_threshold_value().bits(val) }); + } + + /// I3CD01C: program the response-buffer threshold. + pub(crate) fn set_resp_buf_threshold(&self, val: u8) { + self.i3c() + .i3cd01c() + .modify(|_, w| unsafe { w.response_buffer_threshold_value().bits(val) }); + } + + /// I3CD020: program the RX-buffer threshold. + pub(crate) fn set_rx_buf_threshold(&self, val: u8) { + self.i3c() + .i3cd020() + .modify(|_, w| unsafe { w.rx_buffer_threshold_value().bits(val) }); + } + + // ------------------------------------------------------------------------- + // IBI MR/SIR reject masks + // ------------------------------------------------------------------------- + + /// I3CD02C: write the master-request reject mask. + pub(crate) fn write_mr_reject(&self, val: u32) { + self.i3c().i3cd02c().write(|w| unsafe { w.bits(val) }); + } + + /// I3CD030: read the SIR reject mask. + pub(crate) fn read_sir_reject(&self) -> u32 { + self.i3c().i3cd030().read().bits() + } + + /// I3CD030: write the SIR reject mask. + pub(crate) fn write_sir_reject(&self, val: u32) { + self.i3c().i3cd030().write(|w| unsafe { w.bits(val) }); + } + + // ------------------------------------------------------------------------- + // I3CD034: reset control + // ------------------------------------------------------------------------- + + /// I3CD034: assert every queue/buffer/core software reset at once. + pub(crate) fn assert_all_queue_resets(&self) { + self.i3c().i3cd034().write(|w| { + w.ibiqueue_sw_rst() + .set_bit() + .rx_buffer_sw_rst() + .set_bit() + .tx_buffer_sw_rst() + .set_bit() + .response_queue_sw_rst() + .set_bit() + .cmd_queue_sw_rst() + .set_bit() + .core_sw_rst() + .set_bit() + }); + } + + /// I3CD034: raw write (selected reset bits). + pub(crate) fn write_reset_ctrl(&self, val: u32) { + self.i3c().i3cd034().write(|w| unsafe { w.bits(val) }); + } + + /// I3CD034: raw read (0 once all resets have self-cleared). + pub(crate) fn read_reset_ctrl(&self) -> u32 { + self.i3c().i3cd034().read().bits() + } + + // ------------------------------------------------------------------------- + // I3CD038: slave event control + // ------------------------------------------------------------------------- + + /// I3CD038: raw read. + pub(crate) fn read_slv_event_ctrl(&self) -> u32 { + self.i3c().i3cd038().read().bits() + } + + /// I3CD038: raw write. + pub(crate) fn write_slv_event_ctrl(&self, val: u32) { + self.i3c().i3cd038().write(|w| unsafe { w.bits(val) }); + } + + /// I3CD038: request a hot-join (secondary role, no dynamic address yet). + pub(crate) fn raise_hot_join_request(&self) { + self.write_slv_event_ctrl(super::constants::SLV_EVENT_CTRL_HJ_REQ); + } + + // ------------------------------------------------------------------------- + // Interrupt status / enables + // ------------------------------------------------------------------------- + + /// I3CD03C: read the interrupt status. + pub(crate) fn read_intr_status(&self) -> u32 { + self.i3c().i3cd03c().read().bits() + } + + /// I3CD03C: clear the given interrupt-status bits (write-1-to-clear). + pub(crate) fn clear_intr_status(&self, mask: u32) { + self.i3c().i3cd03c().write(|w| unsafe { w.bits(mask) }); + } + + /// I3CD040/I3CD044: enable the primary-role interrupt set + /// (transfer error + response ready), status and signal. + pub(crate) fn enable_master_irqs(&self) { + self.i3c().i3cd040().write(|w| { + w.transfererrstaten() + .set_bit() + .respreadystatintren() + .set_bit() + }); + + self.i3c().i3cd044().write(|w| { + w.transfererrsignalen() + .set_bit() + .respreadysignalintren() + .set_bit() + }); + } + + /// I3CD040/I3CD044: enable the secondary-role interrupt set + /// (transfer error, response ready, CCC update, DA assignment, IBI + /// update, read request), status and signal. + pub(crate) fn enable_target_irqs(&self) { + self.i3c().i3cd040().write(|w| { + w.transfererrstaten() + .set_bit() + .respreadystatintren() + .set_bit() + .cccupdatedstaten() + .set_bit() + .dynaddrassgnstaten() + .set_bit() + .ibiupdatedstaten() + .set_bit() + .readreqrecvstaten() + .set_bit() + }); + + self.i3c().i3cd044().write(|w| { + w.transfererrsignalen() + .set_bit() + .respreadysignalintren() + .set_bit() + .cccupdatedsignalen() + .set_bit() + .dynaddrassgnsignalen() + .set_bit() + .ibiupdatedsignalen() + .set_bit() + .readreqrecvsignalen() + .set_bit() + }); + } + + /// I3CD040/I3CD044: additionally enable the IBI threshold interrupt, + /// status and signal. + pub(crate) fn enable_ibi_thld_irq(&self) { + self.i3c() + .i3cd040() + .modify(|_, w| w.ibithldstaten().set_bit()); + self.i3c() + .i3cd044() + .modify(|_, w| w.ibithldsignalen().set_bit()); + } + + /// I3CD040/I3CD044: mask the master transfer-completion interrupt sources + /// (response ready + transfer error), status and signal. + /// + /// Called by the ISR (flag-and-defer): the response queue stays non-empty + /// until the polling thread drains it, so the level-style status would + /// refire the line forever if left enabled. The thread re-enables via + /// [`unmask_master_xfer_irqs`](Self::unmask_master_xfer_irqs) after + /// draining. `modify` (not `write`) so the IBI-threshold enables are + /// untouched. + pub(crate) fn mask_master_xfer_irqs(&self) { + self.i3c().i3cd040().modify(|_, w| { + w.transfererrstaten() + .clear_bit() + .respreadystatintren() + .clear_bit() + }); + self.i3c().i3cd044().modify(|_, w| { + w.transfererrsignalen() + .clear_bit() + .respreadysignalintren() + .clear_bit() + }); + } + + /// I3CD040/I3CD044: re-enable the master transfer-completion interrupt + /// sources after the thread has drained the response queue. Counterpart + /// of [`mask_master_xfer_irqs`](Self::mask_master_xfer_irqs). + pub(crate) fn unmask_master_xfer_irqs(&self) { + self.i3c().i3cd040().modify(|_, w| { + w.transfererrstaten() + .set_bit() + .respreadystatintren() + .set_bit() + }); + self.i3c().i3cd044().modify(|_, w| { + w.transfererrsignalen() + .set_bit() + .respreadysignalintren() + .set_bit() + }); + } + + /// I3CD040: read the interrupt status-enable mask (debug). + #[allow(dead_code)] + pub(crate) fn read_intr_status_en(&self) -> u32 { + self.i3c().i3cd040().read().bits() + } + + /// I3CD044: read the interrupt signal-enable mask (debug). + #[allow(dead_code)] + pub(crate) fn read_intr_signal_en(&self) -> u32 { + self.i3c().i3cd044().read().bits() + } + + // ------------------------------------------------------------------------- + // Queue / transfer status + // ------------------------------------------------------------------------- + + /// I3CD04C: number of entries in the response buffer. + pub(crate) fn resp_buf_level(&self) -> usize { + self.i3c().i3cd04c().read().respbufblr().bits() as usize + } + + /// I3CD04C: number of pending IBI status entries. + pub(crate) fn ibi_status_count(&self) -> u8 { + self.i3c().i3cd04c().read().ibistatuscnt().bits() + } + + /// I3CD054: current transfer state machine status. + pub(crate) fn xfer_status(&self) -> u8 { + self.i3c().i3cd054().read().cmtfrstatus().bits() + } + + /// I3CD05C: device address table depth. + pub(crate) fn dat_depth(&self) -> u16 { + self.i3c().i3cd05c().read().devaddrtabledepth().bits() + } + + // ------------------------------------------------------------------------- + // PID / characteristics + // ------------------------------------------------------------------------- + + /// I3CD070: program the MIPI manufacturer ID (and select PID[31:0] as + /// the instance value, not DCR). + pub(crate) fn set_pid_mfg_id(&self, id: u16) { + self.i3c() + .i3cd070() + .write(|w| unsafe { w.slvmipimfgid().bits(id).slvpiddcr().clear_bit() }); + } + + /// I3CD074: program the PID instance value word. + pub(crate) fn write_slv_pid_value(&self, val: u32) { + self.i3c().i3cd074().write(|w| unsafe { w.bits(val) }); + } + + /// I3CD078: read the slave characteristics register. + pub(crate) fn read_slv_char_ctrl(&self) -> u32 { + self.i3c().i3cd078().read().bits() + } + + /// I3CD07C: read the max write/read length register (MRL in bits 31:16, + /// MWL in bits 15:0; updated by the bus master via SETMRL/SETMWL). + pub(crate) fn read_slv_max_len(&self) -> u32 { + self.i3c().i3cd07c().read().bits() + } + + /// I3CD078: write the slave characteristics register. + pub(crate) fn write_slv_char_ctrl(&self, val: u32) { + self.i3c().i3cd078().write(|w| unsafe { w.bits(val) }); + } + + // ------------------------------------------------------------------------- + // Misc control + // ------------------------------------------------------------------------- + + /// I3CD08C: raise a slave interrupt request (SIR). + pub(crate) fn raise_sir(&self) { + self.i3c().i3cd08c().write(|w| w.sir().set_bit()); + } + + /// I3CD0B0: program the device operation mode (0 = master, 1 = slave). + pub(crate) fn set_dev_op_mode(&self, mode: u8) { + self.i3c() + .i3cd0b0() + .modify(|_, w| unsafe { w.dev_op_mode().bits(mode) }); + } + + // ------------------------------------------------------------------------- + // Clock / timing + // ------------------------------------------------------------------------- + + /// I3CD0BC: program the I2C Fast-mode SCL high/low counts. + pub(crate) fn set_i2c_fm_timing(&self, hi: u16, lo: u16) { + self.i3c() + .i3cd0bc() + .write(|w| unsafe { w.i2cfmhcnt().bits(hi).i2cfmlcnt().bits(lo) }); + } + + /// I3CD0C0: program the I2C Fast-mode-Plus SCL high/low counts. + pub(crate) fn set_i2c_fmp_timing(&self, hi: u8, lo: u16) { + self.i3c() + .i3cd0c0() + .write(|w| unsafe { w.i2cfmphcnt().bits(hi).i2cfmplcnt().bits(lo) }); + } + + /// I3CD0B4: program the I3C open-drain SCL high/low counts. + pub(crate) fn set_od_timing(&self, hi: u8, lo: u8) { + self.i3c() + .i3cd0b4() + .write(|w| unsafe { w.i3codhcnt().bits(hi).i3codlcnt().bits(lo) }); + } + + /// I3CD0B8: program the I3C push-pull SCL high/low counts. + pub(crate) fn set_pp_timing(&self, hi: u8, lo: u8) { + self.i3c() + .i3cd0b8() + .write(|w| unsafe { w.i3cpphcnt().bits(hi).i3cpplcnt().bits(lo) }); + } + + /// I3CD0D0: read the SDA hold/debounce register. + pub(crate) fn read_sda_hold(&self) -> u32 { + self.i3c().i3cd0d0().read().bits() + } + + /// I3CD0D0: write the SDA hold/debounce register. + pub(crate) fn write_sda_hold(&self, val: u32) { + self.i3c().i3cd0d0().write(|w| unsafe { w.bits(val) }); + } + + /// I3CD0D4: program the bus-free timing register. + pub(crate) fn write_bus_free_timing(&self, val: u32) { + self.i3c().i3cd0d4().write(|w| unsafe { w.bits(val) }); + } + + /// I3CD0D4: IBI-free wait window in core-clock cycles. + pub(crate) fn ibi_free_cycles(&self) -> u32 { + self.i3c().i3cd0d4().read().i3cibifree().bits().into() + } + + // ------------------------------------------------------------------------- + // Device address table (I3CD280..I3CD29C) + // ------------------------------------------------------------------------- + + /// DAT[pos]: raw read. + pub(crate) fn dat_read(&self, pos: usize) -> u32 { + dat_reg!(self, pos, read().bits()) + } + + /// DAT[pos]: raw write. + pub(crate) fn dat_write_raw(&self, pos: usize, val: u32) { + dat_reg!(self, pos, write(|w| unsafe { w.bits(val) })); + } + + /// DAT[pos]: reject SIR and master requests (detached/idle slot). + pub(crate) fn dat_set_reject(&self, pos: usize) { + dat_reg!( + self, + pos, + write(|w| w.sirreject().set_bit().mrreject().set_bit()) + ); + } + + /// DAT[pos]: program a device's dynamic address (with parity bit) while + /// keeping SIR/MR rejected until IBIs are explicitly enabled. + pub(crate) fn dat_program_addr(&self, pos: usize, addr_with_parity: u8) { + dat_reg!( + self, + pos, + write(|w| unsafe { + w.sirreject() + .set_bit() + .mrreject() + .set_bit() + .devdynamicaddr() + .bits(addr_with_parity) + }) + ); + } +} diff --git a/target/ast10x0/peripherals/i3c/types.rs b/target/ast10x0/peripherals/i3c/types.rs new file mode 100644 index 00000000..201fa976 --- /dev/null +++ b/target/ast10x0/peripherals/i3c/types.rs @@ -0,0 +1,413 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! I3C core types +//! +//! This module contains the core data types used throughout the I3C subsystem. + +use core::sync::atomic::{AtomicBool, Ordering}; + +// ============================================================================= +// Speed Enumerations +// ============================================================================= + +/// I3C transfer speed modes +#[repr(u32)] +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +pub enum SpeedI3c { + /// SDR0 - Standard Data Rate 0 (12.5 `MHz` max) + Sdr0 = 0x0, + /// SDR1 - Standard Data Rate 1 (8 `MHz` max) + Sdr1 = 0x1, + /// SDR2 - Standard Data Rate 2 (6 `MHz` max) + Sdr2 = 0x2, + /// SDR3 - Standard Data Rate 3 (4 `MHz` max) + Sdr3 = 0x3, + /// SDR4 - Standard Data Rate 4 (2 `MHz` max) + Sdr4 = 0x4, + /// HDR-TS - High Data Rate Ternary Symbol + HdrTs = 0x5, + /// HDR-DDR - High Data Rate Double Data Rate + HdrDdr = 0x6, + /// I2C FM as I3C fallback + I2cFmAsI3c = 0x7, +} + +/// I2C transfer speed modes +#[repr(u32)] +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +pub enum SpeedI2c { + /// Fast Mode (400 kHz) + Fm = 0x0, + /// Fast Mode Plus (1 `MHz`) + Fmp = 0x1, +} + +// ============================================================================= +// Transaction ID +// ============================================================================= + +/// Transaction ID for tracking transfers +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +pub enum Tid { + /// Target IBI transaction + TargetIbi = 0x1, + /// Target read data transaction + TargetRdData = 0x2, + /// Target master write transaction + TargetMasterWr = 0x8, + /// Target master default transaction + TargetMasterDef = 0xF, +} + +// ============================================================================= +// Transfer Status +// ============================================================================= + +/// I3C operation status +#[derive(Debug, Clone, Copy, PartialEq, Eq)] +pub enum I3cStatus { + /// Operation completed successfully + Ok, + /// Operation timed out + Timeout, + /// Bus is busy + Busy, + /// Operation is pending + /// Invalid operation or parameter + Invalid, + /// Pending status + Pending, +} + +// ============================================================================= +// Transfer Structures +// ============================================================================= + +/// I3C command descriptor +#[derive(Debug)] +pub struct I3cCmd<'a> { + /// Lower 32 bits of command + pub cmd_lo: u32, + /// Upper 32 bits of command + pub cmd_hi: u32, + /// Transmit data buffer (optional) + pub tx: Option<&'a [u8]>, + /// Receive data buffer (optional) + pub rx: Option<&'a mut [u8]>, + /// Transmit length in bytes + pub tx_len: u32, + /// Receive length in bytes + pub rx_len: u32, + /// Return code from hardware + pub ret: i32, +} + +impl I3cCmd<'_> { + /// Create a new command with default values + #[must_use] + pub const fn new() -> Self { + Self { + cmd_lo: 0, + cmd_hi: 0, + tx: None, + rx: None, + tx_len: 0, + rx_len: 0, + ret: 0, + } + } +} + +impl Default for I3cCmd<'_> { + fn default() -> Self { + Self::new() + } +} + +/// I3C message descriptor +pub struct I3cMsg<'a> { + /// Data buffer. + /// + /// **Consumed by the transfer**: `priv_xfer_build_cmds` moves the reborrow + /// into the command descriptor (`Option::take`), so this is `None` after a + /// transfer. Read the result through `actual_len`/`num_xfer`; the caller + /// still owns the underlying buffer. + pub buf: Option<&'a mut [u8]>, + /// Actual bytes transferred + pub actual_len: u32, + /// Number of transfers completed + pub num_xfer: u32, + /// Message flags (read/write/stop) + pub flags: u8, + /// HDR mode + pub hdr_mode: u8, + /// HDR command mode + pub hdr_cmd_mode: u8, +} + +impl I3cMsg<'_> { + /// Create a new message with default values + #[must_use] + pub const fn new() -> Self { + Self { + buf: None, + actual_len: 0, + num_xfer: 0, + flags: 0, + hdr_mode: 0, + hdr_cmd_mode: 0, + } + } + + /// Check if this is a read message + #[inline] + #[must_use] + pub const fn is_read(&self) -> bool { + (self.flags & super::constants::I3C_MSG_READ) != 0 + } + + /// Check if this message should terminate with STOP + #[inline] + #[must_use] + pub const fn has_stop(&self) -> bool { + (self.flags & super::constants::I3C_MSG_STOP) != 0 + } +} + +impl Default for I3cMsg<'_> { + fn default() -> Self { + Self::new() + } +} + +/// I3C transfer descriptor with multiple commands +pub struct I3cXfer<'cmds, 'buf> { + /// Array of commands for this transfer + pub cmds: &'cmds mut [I3cCmd<'buf>], + /// Return code from transfer + pub ret: i32, +} + +impl<'cmds, 'buf> I3cXfer<'cmds, 'buf> { + /// Create a new transfer with the given commands + #[must_use] + pub fn new(cmds: &'cmds mut [I3cCmd<'buf>]) -> Self { + Self { cmds, ret: 0 } + } + + /// Get the number of commands in this transfer + #[inline] + #[must_use] + pub fn ncmds(&self) -> usize { + self.cmds.len() + } +} + +// ============================================================================= +// Legacy I2C Operations +// ============================================================================= + +/// One leg of a legacy-I2C transaction on the I3C bus. +/// +/// Mirrors `embedded_hal::i2c::Operation` without pulling that type into the +/// hardware trait. Consecutive operations are joined by repeated START; the +/// last one ends with STOP. +pub enum I2cOp<'a> { + /// Write the bytes to the device. + Write(&'a [u8]), + /// Read into the buffer (filled completely on success). + Read(&'a mut [u8]), +} + +// ============================================================================= +// Device Identification +// ============================================================================= + +/// I3C Provisional ID (48-bit) +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +pub struct I3cPid(pub u64); + +impl I3cPid { + /// Create a new PID from raw value + #[must_use] + pub const fn new(pid: u64) -> Self { + Self(pid) + } + + /// Get the manufacturer ID (bits 47:33) + #[must_use] + pub const fn manuf_id(self) -> u16 { + ((self.0 >> 33) & 0x1FFF) as u16 + } + + /// Check if lower 32 bits are random (bit 32) + #[must_use] + pub const fn has_random_lower32(self) -> bool { + (self.0 & (1u64 << 32)) != 0 + } + + /// Get raw PID value + #[inline] + #[must_use] + pub const fn raw(self) -> u64 { + self.0 + } +} + +/// I3C device identifier +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +pub struct I3cDeviceId { + /// Provisional ID + pub pid: I3cPid, +} + +impl I3cDeviceId { + /// Create a new device ID from raw PID + #[must_use] + pub const fn new(pid: u64) -> Self { + Self { pid: I3cPid(pid) } + } +} + +// ============================================================================= +// IBI (In-Band Interrupt) Types +// ============================================================================= + +/// Type of In-Band Interrupt +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +pub enum I3cIbiType { + /// Target-initiated interrupt + TargetIntr, + /// Controller role request + ControllerRoleRequest, + /// Hot-join request + HotJoin, + /// Workqueue callback + WorkqueueCb, +} + +/// In-Band Interrupt descriptor +#[derive(Clone, Copy, Debug)] +pub struct I3cIbi<'a> { + /// Type of IBI + pub ibi_type: I3cIbiType, + /// Optional payload data + pub payload: Option<&'a [u8]>, +} + +impl<'a> I3cIbi<'a> { + /// Create a new IBI descriptor + #[must_use] + pub const fn new(ibi_type: I3cIbiType) -> Self { + Self { + ibi_type, + payload: None, + } + } + + /// Create an IBI with payload + #[must_use] + pub const fn with_payload(ibi_type: I3cIbiType, payload: &'a [u8]) -> Self { + Self { + ibi_type, + payload: Some(payload), + } + } + + /// Get payload length + #[inline] + #[must_use] + pub fn payload_len(&self) -> u8 { + self.payload.map_or(0, |p| { + u8::try_from(p.len().min(u8::MAX as usize)).unwrap_or(u8::MAX) + }) + } + + /// Get first byte of payload + #[must_use] + pub fn first_byte(&self) -> Option { + self.payload.and_then(|p| p.first().copied()) + } +} + +// ============================================================================= +// Completion Primitive +// ============================================================================= + +/// Synchronization primitive for signaling completion +pub struct Completion { + done: AtomicBool, +} + +impl Default for Completion { + fn default() -> Self { + Self::new() + } +} + +impl Completion { + /// Create a new completion in non-signaled state + #[must_use] + pub const fn new() -> Self { + Self { + done: AtomicBool::new(false), + } + } + + /// Reset to non-signaled state + #[inline] + pub fn reset(&self) { + self.done.store(false, Ordering::Release); + } + + /// Signal completion + #[inline] + pub fn complete(&self) { + self.done.store(true, Ordering::Release); + // Wake any waiting cores + cortex_m::asm::sev(); + } + + /// Check if completed + #[inline] + #[must_use] + pub fn is_completed(&self) -> bool { + self.done.load(Ordering::Acquire) + } + + /// Wait for completion with timeout. + /// + /// Returns `true` if completed, `false` if timed out. + /// + /// Delta D2 (Cooperative-Yield Bounded-Poll Device): the reference took a + /// `&mut D: DelayNs`; here the wait policy is the caller-injected, + /// type-erased `yield_fn`, invoked once per non-completing poll with an + /// advisory wait window in nanoseconds (1 µs, mirroring the reference's + /// `delay.delay_us(1)`). A bare-metal caller passes + /// `|_| core::hint::spin_loop()`. + pub fn wait_for_us(&self, timeout_us: u32, yield_fn: &mut dyn FnMut(u32)) -> bool { + let mut left = timeout_us; + while !self.is_completed() { + if left == 0 { + return false; + } + yield_fn(1_000); + left -= 1; + } + true + } +} + +// ============================================================================= +// Device Kind +// ============================================================================= + +/// Device type on the I3C bus +#[derive(Clone, Copy, Debug, PartialEq, Eq)] +pub enum DevKind { + /// Native I3C device + I3c, + /// Legacy I2C device + I2c, +} diff --git a/target/ast10x0/peripherals/lib.rs b/target/ast10x0/peripherals/lib.rs index e34dea01..8d2303dd 100644 --- a/target/ast10x0/peripherals/lib.rs +++ b/target/ast10x0/peripherals/lib.rs @@ -3,7 +3,10 @@ #![no_std] +pub mod gpio; +pub mod hace; pub mod i2c; +pub mod i3c; pub mod scu; pub mod sgpiom; pub mod smc; diff --git a/target/ast10x0/peripherals/scu/cache.rs b/target/ast10x0/peripherals/scu/cache.rs new file mode 100644 index 00000000..0e8a20f5 --- /dev/null +++ b/target/ast10x0/peripherals/scu/cache.rs @@ -0,0 +1,41 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! AST10x0 data-cache maintenance. + +use super::registers::ScuRegisters; + +impl ScuRegisters { + /// Invalidate the entire AST10x0 data cache. + /// + /// Toggles `DCACHE_CLEAN` (SCUA58 bit 1) low→high, mirroring the Zephyr + /// authority `cache_data_invd_all()` (`drivers/cache/cache_aspeed.c`, also + /// called after every crypto operation in `hace_aspeed.c:140`). + /// + /// Required after any HACE DMA write into cacheable SRAM (below + /// `0x000A0000`): the engine's writes bypass the CPU cache, so the CPU + /// would read stale pre-operation cache lines without this invalidation. + #[inline] + pub fn dcache_invd_all(&self) { + const DCACHE_CLEAN: u32 = 1 << 1; + // SAFETY: SCU MMIO read-modify-write; DSB only orders memory accesses. + unsafe { + let ctrl = self.regs().scua58().read().bits(); + self.regs().scua58().write(|w| w.bits(ctrl & !DCACHE_CLEAN)); + core::arch::asm!("dsb sy", options(nostack, preserves_flags)); + self.regs().scua58().write(|w| w.bits(ctrl | DCACHE_CLEAN)); + core::arch::asm!("dsb sy", options(nostack, preserves_flags)); + } + } +} + +/// Thin free-function wrapper around [`ScuRegisters::dcache_invd_all`]. +/// +/// Exists solely so the function can be stored as a bare `fn()` pointer in +/// [`HaceDevice::cache_flush`], which is wired at construction by the board +/// crate. All SCU register access goes through [`ScuRegisters`]. +pub fn dcache_invd_all() { + // SAFETY: singleton SCU; single-threaded HACE use is upheld by HaceDevice's + // single-instance contract. + unsafe { ScuRegisters::new_global() }.dcache_invd_all(); +} diff --git a/target/ast10x0/peripherals/scu/mod.rs b/target/ast10x0/peripherals/scu/mod.rs index bc236ed8..bd5cdcf0 100644 --- a/target/ast10x0/peripherals/scu/mod.rs +++ b/target/ast10x0/peripherals/scu/mod.rs @@ -3,6 +3,7 @@ //! AST10x0 System Control Unit (SCU) module. +pub mod cache; pub mod clock; pub mod pinctrl; pub mod registers; diff --git a/target/ast10x0/peripherals/scu/pinctrl.rs b/target/ast10x0/peripherals/scu/pinctrl.rs index d3997168..8e059006 100644 --- a/target/ast10x0/peripherals/scu/pinctrl.rs +++ b/target/ast10x0/peripherals/scu/pinctrl.rs @@ -544,6 +544,261 @@ paste! { /// 1-based naming where "2" means "second bus", matching PAC I2c1. pub const PINCTRL_I2C1: &[PinctrlPin] = &[PIN_SCU414_30, PIN_SCU414_31]; +/// I2C2 pin group: SCL3/SDA3 mux selection on SCU418[0:1]. +/// +/// The SVD names these EnblSCL3FnPin/EnblSDA3FnPin, corresponding to +/// PAC peripheral I2c2 (controller 2, base 0x7e7b_0180). On the Test +/// Harness board, these pins are exposed on J15 and used for inter-device +/// I2C communication between the two AST1060 daughter cards. +pub const PINCTRL_I2C2: &[PinctrlPin] = &[PIN_SCU418_0, PIN_SCU418_1]; + +/// GPIOA pin groups: GPIO mux selection. +pub const PINCTRL_GPIOA0: &[PinctrlPin] = &[CLR_PIN_SCU410_0, CLR_PIN_SCU4B0_0, CLR_PIN_SCU690_0]; +pub const PINCTRL_GPIOA1: &[PinctrlPin] = &[CLR_PIN_SCU410_1, CLR_PIN_SCU4B0_1, CLR_PIN_SCU690_1]; +pub const PINCTRL_GPIOA2: &[PinctrlPin] = &[CLR_PIN_SCU410_2, CLR_PIN_SCU4B0_2, CLR_PIN_SCU690_2]; +pub const PINCTRL_GPIOA3: &[PinctrlPin] = &[CLR_PIN_SCU410_3, CLR_PIN_SCU4B0_3, CLR_PIN_SCU690_3]; +pub const PINCTRL_GPIOA4: &[PinctrlPin] = &[CLR_PIN_SCU410_4, CLR_PIN_SCU4B0_4, CLR_PIN_SCU690_4]; +pub const PINCTRL_GPIOA5: &[PinctrlPin] = &[CLR_PIN_SCU410_5, CLR_PIN_SCU4B0_5, CLR_PIN_SCU690_5]; +pub const PINCTRL_GPIOA6: &[PinctrlPin] = &[CLR_PIN_SCU410_6, CLR_PIN_SCU4B0_6, CLR_PIN_SCU690_6]; +pub const PINCTRL_GPIOA7: &[PinctrlPin] = &[CLR_PIN_SCU410_7, CLR_PIN_SCU4B0_7, CLR_PIN_SCU690_7]; + +/// GPIOB pin groups: GPIO mux selection. +pub const PINCTRL_GPIOB0: &[PinctrlPin] = &[CLR_PIN_SCU410_8, CLR_PIN_SCU4B0_8, CLR_PIN_SCU690_8]; +pub const PINCTRL_GPIOB1: &[PinctrlPin] = &[CLR_PIN_SCU410_9, CLR_PIN_SCU4B0_9, CLR_PIN_SCU690_9]; +pub const PINCTRL_GPIOB2: &[PinctrlPin] = + &[CLR_PIN_SCU410_10, CLR_PIN_SCU4B0_10, CLR_PIN_SCU690_10]; +pub const PINCTRL_GPIOB3: &[PinctrlPin] = + &[CLR_PIN_SCU410_11, CLR_PIN_SCU4B0_11, CLR_PIN_SCU690_11]; +pub const PINCTRL_GPIOB4: &[PinctrlPin] = + &[CLR_PIN_SCU410_12, CLR_PIN_SCU4B0_12, CLR_PIN_SCU690_12]; +pub const PINCTRL_GPIOB5: &[PinctrlPin] = + &[CLR_PIN_SCU410_13, CLR_PIN_SCU4B0_13, CLR_PIN_SCU690_13]; +pub const PINCTRL_GPIOB6: &[PinctrlPin] = + &[CLR_PIN_SCU410_14, CLR_PIN_SCU4B0_14, CLR_PIN_SCU690_14]; +pub const PINCTRL_GPIOB7: &[PinctrlPin] = + &[CLR_PIN_SCU410_15, CLR_PIN_SCU4B0_15, CLR_PIN_SCU690_15]; + +/// GPIOC pin groups: GPIO mux selection. +pub const PINCTRL_GPIOC0: &[PinctrlPin] = + &[CLR_PIN_SCU410_16, CLR_PIN_SCU4B0_16, CLR_PIN_SCU690_16]; +pub const PINCTRL_GPIOC1: &[PinctrlPin] = + &[CLR_PIN_SCU410_17, CLR_PIN_SCU4B0_17, CLR_PIN_SCU690_17]; +pub const PINCTRL_GPIOC2: &[PinctrlPin] = + &[CLR_PIN_SCU410_18, CLR_PIN_SCU4B0_18, CLR_PIN_SCU690_18]; +pub const PINCTRL_GPIOC3: &[PinctrlPin] = + &[CLR_PIN_SCU410_19, CLR_PIN_SCU4B0_19, CLR_PIN_SCU690_19]; +pub const PINCTRL_GPIOC4: &[PinctrlPin] = + &[CLR_PIN_SCU410_20, CLR_PIN_SCU4B0_20, CLR_PIN_SCU690_20]; +pub const PINCTRL_GPIOC5: &[PinctrlPin] = + &[CLR_PIN_SCU410_21, CLR_PIN_SCU4B0_21, CLR_PIN_SCU690_21]; +pub const PINCTRL_GPIOC6: &[PinctrlPin] = + &[CLR_PIN_SCU410_22, CLR_PIN_SCU4B0_22, CLR_PIN_SCU690_22]; +pub const PINCTRL_GPIOC7: &[PinctrlPin] = + &[CLR_PIN_SCU410_23, CLR_PIN_SCU4B0_23, CLR_PIN_SCU690_23]; + +/// GPIOD pin groups: GPIO mux selection. +pub const PINCTRL_GPIOD0: &[PinctrlPin] = + &[CLR_PIN_SCU410_24, CLR_PIN_SCU4B0_24, CLR_PIN_SCU690_24]; +pub const PINCTRL_GPIOD1: &[PinctrlPin] = + &[CLR_PIN_SCU410_25, CLR_PIN_SCU4B0_25, CLR_PIN_SCU690_25]; +pub const PINCTRL_GPIOD2: &[PinctrlPin] = + &[CLR_PIN_SCU410_26, CLR_PIN_SCU4B0_26, CLR_PIN_SCU690_26]; +pub const PINCTRL_GPIOD3: &[PinctrlPin] = + &[CLR_PIN_SCU410_27, CLR_PIN_SCU4B0_27, CLR_PIN_SCU690_27]; +pub const PINCTRL_GPIOD4: &[PinctrlPin] = + &[CLR_PIN_SCU410_28, CLR_PIN_SCU4B0_28, CLR_PIN_SCU690_28]; +pub const PINCTRL_GPIOD5: &[PinctrlPin] = + &[CLR_PIN_SCU410_29, CLR_PIN_SCU4B0_29, CLR_PIN_SCU690_29]; +pub const PINCTRL_GPIOD6: &[PinctrlPin] = + &[CLR_PIN_SCU410_30, CLR_PIN_SCU4B0_30, CLR_PIN_SCU690_30]; +pub const PINCTRL_GPIOD7: &[PinctrlPin] = + &[CLR_PIN_SCU410_31, CLR_PIN_SCU4B0_31, CLR_PIN_SCU690_31]; + +/// GPIOE pin groups: GPIO mux selection. +pub const PINCTRL_GPIOE0: &[PinctrlPin] = &[CLR_PIN_SCU414_0, CLR_PIN_SCU4B4_0, CLR_PIN_SCU694_0]; +pub const PINCTRL_GPIOE1: &[PinctrlPin] = &[CLR_PIN_SCU414_1, CLR_PIN_SCU4B4_1, CLR_PIN_SCU694_1]; +pub const PINCTRL_GPIOE2: &[PinctrlPin] = &[CLR_PIN_SCU414_2, CLR_PIN_SCU4B4_2, CLR_PIN_SCU694_2]; +pub const PINCTRL_GPIOE3: &[PinctrlPin] = &[CLR_PIN_SCU414_3, CLR_PIN_SCU4B4_3, CLR_PIN_SCU694_3]; +pub const PINCTRL_GPIOE4: &[PinctrlPin] = &[CLR_PIN_SCU414_4, CLR_PIN_SCU4B4_4, CLR_PIN_SCU694_4]; +pub const PINCTRL_GPIOE5: &[PinctrlPin] = &[CLR_PIN_SCU414_5, CLR_PIN_SCU4B4_5, CLR_PIN_SCU694_5]; +pub const PINCTRL_GPIOE6: &[PinctrlPin] = &[CLR_PIN_SCU414_6, CLR_PIN_SCU4B4_6, CLR_PIN_SCU694_6]; +pub const PINCTRL_GPIOE7: &[PinctrlPin] = &[CLR_PIN_SCU414_7, CLR_PIN_SCU4B4_7, CLR_PIN_SCU694_7]; + +/// GPIOF pin groups: GPIO mux selection. +pub const PINCTRL_GPIOF0: &[PinctrlPin] = &[CLR_PIN_SCU414_8, CLR_PIN_SCU4B4_8, CLR_PIN_SCU694_8]; +pub const PINCTRL_GPIOF1: &[PinctrlPin] = &[CLR_PIN_SCU414_9, CLR_PIN_SCU4B4_9, CLR_PIN_SCU694_9]; +pub const PINCTRL_GPIOF2: &[PinctrlPin] = + &[CLR_PIN_SCU414_10, CLR_PIN_SCU4B4_10, CLR_PIN_SCU694_10]; +pub const PINCTRL_GPIOF3: &[PinctrlPin] = + &[CLR_PIN_SCU414_11, CLR_PIN_SCU4B4_11, CLR_PIN_SCU694_11]; +pub const PINCTRL_GPIOF4: &[PinctrlPin] = + &[CLR_PIN_SCU414_12, CLR_PIN_SCU4B4_12, CLR_PIN_SCU694_12]; +pub const PINCTRL_GPIOF5: &[PinctrlPin] = + &[CLR_PIN_SCU414_13, CLR_PIN_SCU4B4_13, CLR_PIN_SCU694_13]; +pub const PINCTRL_GPIOF6: &[PinctrlPin] = + &[CLR_PIN_SCU414_14, CLR_PIN_SCU4B4_14, CLR_PIN_SCU694_14]; +pub const PINCTRL_GPIOF7: &[PinctrlPin] = + &[CLR_PIN_SCU414_15, CLR_PIN_SCU4B4_15, CLR_PIN_SCU694_15]; + +/// GPIOG pin groups: GPIO mux selection. +pub const PINCTRL_GPIOG0: &[PinctrlPin] = + &[CLR_PIN_SCU414_16, CLR_PIN_SCU4B4_16, CLR_PIN_SCU694_16]; +pub const PINCTRL_GPIOG1: &[PinctrlPin] = + &[CLR_PIN_SCU414_17, CLR_PIN_SCU4B4_17, CLR_PIN_SCU694_17]; +pub const PINCTRL_GPIOG2: &[PinctrlPin] = + &[CLR_PIN_SCU414_18, CLR_PIN_SCU4B4_18, CLR_PIN_SCU694_18]; +pub const PINCTRL_GPIOG3: &[PinctrlPin] = + &[CLR_PIN_SCU414_19, CLR_PIN_SCU4B4_19, CLR_PIN_SCU694_19]; +pub const PINCTRL_GPIOG4: &[PinctrlPin] = + &[CLR_PIN_SCU414_20, CLR_PIN_SCU4B4_20, CLR_PIN_SCU694_20]; +pub const PINCTRL_GPIOG5: &[PinctrlPin] = + &[CLR_PIN_SCU414_21, CLR_PIN_SCU4B4_21, CLR_PIN_SCU694_21]; +pub const PINCTRL_GPIOG6: &[PinctrlPin] = + &[CLR_PIN_SCU414_22, CLR_PIN_SCU4B4_22, CLR_PIN_SCU694_22]; +pub const PINCTRL_GPIOG7: &[PinctrlPin] = + &[CLR_PIN_SCU414_23, CLR_PIN_SCU4B4_23, CLR_PIN_SCU694_23]; + +/// GPIOH pin groups: GPIO mux selection. +pub const PINCTRL_GPIOH0: &[PinctrlPin] = + &[CLR_PIN_SCU414_24, CLR_PIN_SCU4B4_24, CLR_PIN_SCU694_24]; +pub const PINCTRL_GPIOH1: &[PinctrlPin] = + &[CLR_PIN_SCU414_25, CLR_PIN_SCU4B4_25, CLR_PIN_SCU694_25]; +pub const PINCTRL_GPIOH2: &[PinctrlPin] = + &[CLR_PIN_SCU414_26, CLR_PIN_SCU4B4_26, CLR_PIN_SCU694_26]; +pub const PINCTRL_GPIOH3: &[PinctrlPin] = + &[CLR_PIN_SCU414_27, CLR_PIN_SCU4B4_27, CLR_PIN_SCU694_27]; +pub const PINCTRL_GPIOH4: &[PinctrlPin] = + &[CLR_PIN_SCU414_28, CLR_PIN_SCU4B4_28, CLR_PIN_SCU694_28]; +pub const PINCTRL_GPIOH5: &[PinctrlPin] = + &[CLR_PIN_SCU414_29, CLR_PIN_SCU4B4_29, CLR_PIN_SCU694_29]; +pub const PINCTRL_GPIOH6: &[PinctrlPin] = &[CLR_PIN_SCU414_30]; +pub const PINCTRL_GPIOH7: &[PinctrlPin] = &[CLR_PIN_SCU414_31]; + +/// GPIOI pin groups: GPIO mux selection. +pub const PINCTRL_GPIOI0: &[PinctrlPin] = &[CLR_PIN_SCU418_0]; +pub const PINCTRL_GPIOI1: &[PinctrlPin] = &[CLR_PIN_SCU418_1]; +pub const PINCTRL_GPIOI2: &[PinctrlPin] = &[CLR_PIN_SCU418_2]; +pub const PINCTRL_GPIOI3: &[PinctrlPin] = &[CLR_PIN_SCU418_3]; +pub const PINCTRL_GPIOI4: &[PinctrlPin] = &[CLR_PIN_SCU418_4]; +pub const PINCTRL_GPIOI5: &[PinctrlPin] = &[CLR_PIN_SCU418_5]; +pub const PINCTRL_GPIOI6: &[PinctrlPin] = &[CLR_PIN_SCU418_6]; +pub const PINCTRL_GPIOI7: &[PinctrlPin] = &[CLR_PIN_SCU418_7]; + +/// GPIOJ pin groups: GPIO mux selection. +pub const PINCTRL_GPIOJ0: &[PinctrlPin] = &[CLR_PIN_SCU418_8, CLR_PIN_SCU4B8_8]; +pub const PINCTRL_GPIOJ1: &[PinctrlPin] = &[CLR_PIN_SCU418_9, CLR_PIN_SCU4B8_9]; +pub const PINCTRL_GPIOJ2: &[PinctrlPin] = &[CLR_PIN_SCU418_10, CLR_PIN_SCU4B8_10]; +pub const PINCTRL_GPIOJ3: &[PinctrlPin] = &[CLR_PIN_SCU418_11, CLR_PIN_SCU4B8_11]; +pub const PINCTRL_GPIOJ4: &[PinctrlPin] = &[CLR_PIN_SCU418_12, CLR_PIN_SCU4B8_12]; +pub const PINCTRL_GPIOJ5: &[PinctrlPin] = &[CLR_PIN_SCU418_13, CLR_PIN_SCU4B8_13]; +pub const PINCTRL_GPIOJ6: &[PinctrlPin] = &[CLR_PIN_SCU418_14, CLR_PIN_SCU4B8_14]; +pub const PINCTRL_GPIOJ7: &[PinctrlPin] = &[CLR_PIN_SCU418_15, CLR_PIN_SCU4B8_15]; + +/// GPIOK pin groups: GPIO mux selection. +pub const PINCTRL_GPIOK0: &[PinctrlPin] = &[CLR_PIN_SCU418_16, CLR_PIN_SCU4B8_16]; +pub const PINCTRL_GPIOK1: &[PinctrlPin] = &[CLR_PIN_SCU418_17, CLR_PIN_SCU4B8_17]; +pub const PINCTRL_GPIOK2: &[PinctrlPin] = &[CLR_PIN_SCU418_18, CLR_PIN_SCU4B8_18]; +pub const PINCTRL_GPIOK3: &[PinctrlPin] = &[CLR_PIN_SCU418_19, CLR_PIN_SCU4B8_19]; +pub const PINCTRL_GPIOK4: &[PinctrlPin] = &[CLR_PIN_SCU418_20, CLR_PIN_SCU4B8_20]; +pub const PINCTRL_GPIOK5: &[PinctrlPin] = &[CLR_PIN_SCU418_21, CLR_PIN_SCU4B8_21]; +pub const PINCTRL_GPIOK6: &[PinctrlPin] = &[CLR_PIN_SCU418_22, CLR_PIN_SCU4B8_22]; +pub const PINCTRL_GPIOK7: &[PinctrlPin] = &[CLR_PIN_SCU418_23, CLR_PIN_SCU4B8_23]; + +/// GPIOL pin groups: GPIO mux selection. +pub const PINCTRL_GPIOL0: &[PinctrlPin] = &[CLR_PIN_SCU418_24]; +pub const PINCTRL_GPIOL1: &[PinctrlPin] = &[CLR_PIN_SCU418_25]; +pub const PINCTRL_GPIOL2: &[PinctrlPin] = &[CLR_PIN_SCU418_26]; +pub const PINCTRL_GPIOL3: &[PinctrlPin] = &[CLR_PIN_SCU418_27]; +pub const PINCTRL_GPIOL4: &[PinctrlPin] = + &[CLR_PIN_SCU418_28, CLR_PIN_SCU4B8_28, CLR_PIN_SCU698_28]; +pub const PINCTRL_GPIOL5: &[PinctrlPin] = + &[CLR_PIN_SCU418_29, CLR_PIN_SCU4B8_29, CLR_PIN_SCU698_29]; +pub const PINCTRL_GPIOL6: &[PinctrlPin] = + &[CLR_PIN_SCU418_30, CLR_PIN_SCU4B8_30, CLR_PIN_SCU698_30]; +pub const PINCTRL_GPIOL7: &[PinctrlPin] = + &[CLR_PIN_SCU418_31, CLR_PIN_SCU4B8_31, CLR_PIN_SCU698_31]; + +/// GPIOM pin groups: GPIO mux selection. +pub const PINCTRL_GPIOM0: &[PinctrlPin] = &[CLR_PIN_SCU41C_0]; +pub const PINCTRL_GPIOM1: &[PinctrlPin] = &[CLR_PIN_SCU41C_1]; +pub const PINCTRL_GPIOM2: &[PinctrlPin] = &[CLR_PIN_SCU41C_2]; +pub const PINCTRL_GPIOM3: &[PinctrlPin] = &[CLR_PIN_SCU41C_3]; +pub const PINCTRL_GPIOM4: &[PinctrlPin] = &[CLR_PIN_SCU41C_4]; +pub const PINCTRL_GPIOM5: &[PinctrlPin] = &[CLR_PIN_SCU41C_5]; + +/// GPION pin groups: GPIO mux selection. +pub const PINCTRL_GPION0: &[PinctrlPin] = &[CLR_PIN_SCU41C_8]; +pub const PINCTRL_GPION1: &[PinctrlPin] = &[CLR_PIN_SCU41C_9, CLR_PIN_SCU4BC_9, CLR_PIN_SCU69C_9]; +pub const PINCTRL_GPION2: &[PinctrlPin] = &[CLR_PIN_SCU41C_10]; +pub const PINCTRL_GPION3: &[PinctrlPin] = + &[CLR_PIN_SCU41C_11, CLR_PIN_SCU4BC_11, CLR_PIN_SCU69C_11]; +pub const PINCTRL_GPION4: &[PinctrlPin] = &[CLR_PIN_SCU41C_12, CLR_PIN_SCU4BC_12]; +pub const PINCTRL_GPION5: &[PinctrlPin] = &[CLR_PIN_SCU41C_13, CLR_PIN_SCU4BC_13]; +pub const PINCTRL_GPION6: &[PinctrlPin] = &[CLR_PIN_SCU41C_14, CLR_PIN_SCU4BC_14]; +pub const PINCTRL_GPION7: &[PinctrlPin] = &[CLR_PIN_SCU41C_15, CLR_PIN_SCU4BC_15]; + +/// GPIOO pin groups: GPIO mux selection. +pub const PINCTRL_GPIOO0: &[PinctrlPin] = &[CLR_PIN_SCU41C_16, CLR_PIN_SCU4BC_16]; +pub const PINCTRL_GPIOO1: &[PinctrlPin] = &[CLR_PIN_SCU41C_17, CLR_PIN_SCU4BC_17]; +pub const PINCTRL_GPIOO2: &[PinctrlPin] = &[CLR_PIN_SCU41C_18, CLR_PIN_SCU4BC_18]; +pub const PINCTRL_GPIOO3: &[PinctrlPin] = &[CLR_PIN_SCU41C_19, CLR_PIN_SCU4BC_19]; +pub const PINCTRL_GPIOO4: &[PinctrlPin] = + &[CLR_PIN_SCU41C_20, CLR_PIN_SCU4BC_20, CLR_PIN_SCU69C_20]; +pub const PINCTRL_GPIOO5: &[PinctrlPin] = + &[CLR_PIN_SCU41C_21, CLR_PIN_SCU4BC_21, CLR_PIN_SCU69C_21]; +pub const PINCTRL_GPIOO6: &[PinctrlPin] = + &[CLR_PIN_SCU41C_22, CLR_PIN_SCU4BC_22, CLR_PIN_SCU69C_22]; +pub const PINCTRL_GPIOO7: &[PinctrlPin] = + &[CLR_PIN_SCU41C_23, CLR_PIN_SCU4BC_23, CLR_PIN_SCU69C_23]; + +/// GPIOP pin groups: GPIO mux selection. +pub const PINCTRL_GPIOP0: &[PinctrlPin] = + &[CLR_PIN_SCU41C_24, CLR_PIN_SCU4BC_24, CLR_PIN_SCU69C_24]; +pub const PINCTRL_GPIOP1: &[PinctrlPin] = &[CLR_PIN_SCU41C_25, CLR_PIN_SCU4BC_25]; +pub const PINCTRL_GPIOP2: &[PinctrlPin] = &[CLR_PIN_SCU41C_26, CLR_PIN_SCU4BC_26]; +pub const PINCTRL_GPIOP3: &[PinctrlPin] = &[CLR_PIN_SCU41C_27, CLR_PIN_SCU4BC_27]; +pub const PINCTRL_GPIOP4: &[PinctrlPin] = &[CLR_PIN_SCU41C_28, CLR_PIN_SCU4BC_28]; +pub const PINCTRL_GPIOP5: &[PinctrlPin] = &[CLR_PIN_SCU41C_29, CLR_PIN_SCU4BC_29]; +pub const PINCTRL_GPIOP6: &[PinctrlPin] = + &[CLR_PIN_SCU41C_30, CLR_PIN_SCU4BC_30, CLR_PIN_SCU69C_30]; +pub const PINCTRL_GPIOP7: &[PinctrlPin] = + &[CLR_PIN_SCU41C_31, CLR_PIN_SCU4BC_31, CLR_PIN_SCU69C_31]; + +/// GPIOQ pin groups: GPIO mux selection. +pub const PINCTRL_GPIOQ0: &[PinctrlPin] = &[CLR_PIN_SCU430_0, CLR_PIN_SCU6B0_0]; +pub const PINCTRL_GPIOQ1: &[PinctrlPin] = &[CLR_PIN_SCU430_1, CLR_PIN_SCU6B0_1]; +pub const PINCTRL_GPIOQ2: &[PinctrlPin] = &[CLR_PIN_SCU430_2, CLR_PIN_SCU6B0_2]; +pub const PINCTRL_GPIOQ3: &[PinctrlPin] = &[CLR_PIN_SCU430_3, CLR_PIN_SCU6B0_3]; +pub const PINCTRL_GPIOQ4: &[PinctrlPin] = &[CLR_PIN_SCU430_4, CLR_PIN_SCU6B0_4]; + +/// GPIOR pin groups: GPIO mux selection. +pub const PINCTRL_GPIOR2: &[PinctrlPin] = &[CLR_PIN_SCU430_10]; +pub const PINCTRL_GPIOR3: &[PinctrlPin] = &[CLR_PIN_SCU430_11]; + +/// GPIOS pin groups: GPIO mux selection. +pub const PINCTRL_GPIOS2: &[PinctrlPin] = &[CLR_PIN_SCU430_17]; +pub const PINCTRL_GPIOS3: &[PinctrlPin] = &[CLR_PIN_SCU430_18]; + +/// GPIOT pin groups: GPIO mux selection. +pub const PINCTRL_GPIOT0: &[PinctrlPin] = &[PIN_SCU430_24]; +pub const PINCTRL_GPIOT1: &[PinctrlPin] = &[PIN_SCU430_25]; +pub const PINCTRL_GPIOT2: &[PinctrlPin] = &[PIN_SCU430_26]; +pub const PINCTRL_GPIOT3: &[PinctrlPin] = &[PIN_SCU430_27]; +pub const PINCTRL_GPIOT4: &[PinctrlPin] = &[PIN_SCU430_28]; +pub const PINCTRL_GPIOT5: &[PinctrlPin] = &[PIN_SCU430_29]; +pub const PINCTRL_GPIOT6: &[PinctrlPin] = &[PIN_SCU430_30]; +pub const PINCTRL_GPIOT7: &[PinctrlPin] = &[PIN_SCU430_31]; + +/// GPIOU pin groups: GPIO mux selection. +pub const PINCTRL_GPIOU0: &[PinctrlPin] = &[PIN_SCU434_0]; +pub const PINCTRL_GPIOU1: &[PinctrlPin] = &[PIN_SCU434_1]; +pub const PINCTRL_GPIOU2: &[PinctrlPin] = &[PIN_SCU434_2]; +pub const PINCTRL_GPIOU3: &[PinctrlPin] = &[PIN_SCU434_3]; +pub const PINCTRL_GPIOU4: &[PinctrlPin] = &[PIN_SCU434_4]; +pub const PINCTRL_GPIOU5: &[PinctrlPin] = &[PIN_SCU434_5]; +pub const PINCTRL_GPIOU6: &[PinctrlPin] = &[PIN_SCU434_6]; +pub const PINCTRL_GPIOU7: &[PinctrlPin] = &[PIN_SCU434_7]; + /// FMC quad-SPI pin group: mux selection on SCU430[10:11]. pub const PINCTRL_FMC_QUAD: &[PinctrlPin] = &[PIN_SCU430_10, PIN_SCU430_11]; @@ -725,13 +980,74 @@ pub const PINCTRL_SPIM4_DEFAULT: &[PinctrlPin] = &[ CLR_PIN_SCU4B4_21, PIN_SCU694_21, ]; -/// I2C2 pin group: SCL3/SDA3 mux selection on SCU418[0:1]. -/// -/// The SVD names these EnblSCL3FnPin/EnblSDA3FnPin, corresponding to -/// PAC peripheral I2c2 (controller 2, base 0x7e7b_0180). On the Test -/// Harness board, these pins are exposed on J15 and used for inter-device -/// I2C communication between the two AST1060 daughter cards. -pub const PINCTRL_I2C2: &[PinctrlPin] = &[PIN_SCU418_0, PIN_SCU418_1]; + +// ============================================================================= +// I3C pin groups +// ============================================================================= +// +// The AST1060 routes each I3C bus to either a Low-Voltage (LV) pad set, +// enabled in SCU418, or a High-Voltage (HV) pad set, enabled in SCU4B8 +// (SVD fields `EnblI3CSCLn/SDAn{LV,HV}FnPin`). Setting the bit selects the +// I3C function on that pad. +// +// Naming follows the PAC instance / `BUS_NUM`, 0-based: `PINCTRL_I3C0` is PAC +// `I3c` (bus 0), `_I3C1` is PAC `I3c1` (bus 1), etc. — matching the aspeed-rust +// reference's `PINCTRL_HVI3Cn` groups (e.g. `PINCTRL_HVI3C2` == bus 2 == PAC +// `I3c2`). NOTE the SVD names the pads 1-based (SDA1..SDA4); bus `n` uses the +// SVD's `SDA(n+1)`/`SCL(n+1)` pads. +// +// The HV groups additionally **clear** the conflicting LV function bits on the +// same pads (`CLR_PIN_SCU418_*`), exactly as the reference does — enabling the +// HV pad alone without first releasing the LV pad would leave both functions +// muxed onto it. LV groups need no such clear (HV defaults off). + +/// I3C bus 0 (PAC `I3c`) — LV pads: SCL/SDA on SCU418[16:17]. +pub const PINCTRL_I3C0: &[PinctrlPin] = &[PIN_SCU418_16, PIN_SCU418_17]; +/// I3C bus 1 (PAC `I3c1`) — LV pads: SCL/SDA on SCU418[18:19]. +pub const PINCTRL_I3C1: &[PinctrlPin] = &[PIN_SCU418_18, PIN_SCU418_19]; +/// I3C bus 2 (PAC `I3c2`) — LV pads: SCL/SDA on SCU418[20:21]. +pub const PINCTRL_I3C2: &[PinctrlPin] = &[PIN_SCU418_20, PIN_SCU418_21]; +/// I3C bus 3 (PAC `I3c3`) — LV pads: SCL/SDA on SCU418[22:23]. +pub const PINCTRL_I3C3: &[PinctrlPin] = &[PIN_SCU418_22, PIN_SCU418_23]; + +/// I3C bus 0 (PAC `I3c`) — HV pads: SCU4B8[8:9], clearing LV SCU418[8:9],[16:17]. +pub const PINCTRL_HVI3C0: &[PinctrlPin] = &[ + CLR_PIN_SCU418_8, + CLR_PIN_SCU418_9, + CLR_PIN_SCU418_16, + CLR_PIN_SCU418_17, + PIN_SCU4B8_8, + PIN_SCU4B8_9, +]; +/// I3C bus 1 (PAC `I3c1`) — HV pads: SCU4B8[10:11], clearing LV SCU418[10:11],[18:19]. +pub const PINCTRL_HVI3C1: &[PinctrlPin] = &[ + CLR_PIN_SCU418_10, + CLR_PIN_SCU418_11, + CLR_PIN_SCU418_18, + CLR_PIN_SCU418_19, + PIN_SCU4B8_10, + PIN_SCU4B8_11, +]; +/// I3C bus 2 (PAC `I3c2`) — HV pads: SCU4B8[12:13], clearing LV SCU418[12:13],[20:21]. +/// This is the bus/pad set the AST1060 Test Harness wires for I3C, and the one +/// the aspeed-rust EVB tests (`PINCTRL_HVI3C2`) use. +pub const PINCTRL_HVI3C2: &[PinctrlPin] = &[ + CLR_PIN_SCU418_12, + CLR_PIN_SCU418_13, + CLR_PIN_SCU418_20, + CLR_PIN_SCU418_21, + PIN_SCU4B8_12, + PIN_SCU4B8_13, +]; +/// I3C bus 3 (PAC `I3c3`) — HV pads: SCU4B8[14:15], clearing LV SCU418[14:15],[22:23]. +pub const PINCTRL_HVI3C3: &[PinctrlPin] = &[ + CLR_PIN_SCU418_14, + CLR_PIN_SCU418_15, + CLR_PIN_SCU418_22, + CLR_PIN_SCU418_23, + PIN_SCU4B8_14, + PIN_SCU4B8_15, +]; /// SGPIOM (Serial GPIO Master) pin group: mux selection on SCU41C[8:11]. /// diff --git a/target/ast10x0/peripherals/scu/routing.rs b/target/ast10x0/peripherals/scu/routing.rs index 0ed23f63..b99d1bd7 100644 --- a/target/ast10x0/peripherals/scu/routing.rs +++ b/target/ast10x0/peripherals/scu/routing.rs @@ -3,30 +3,183 @@ //! SCU routing and mux helpers for SPI monitor integration. +use ast1060_pac as device; + use super::registers::ScuRegisters; use super::types::{ Result, ScuExtMuxSelect, SpiMonitorInstance, SpiMonitorPassthrough, SpiMonitorSource, }; -const PIN_SPIM0_CLK_OUT_BIT: u32 = 7; -const PIN_SPIM1_CLK_OUT_BIT: u32 = 21; -const PIN_SPIM2_CLK_OUT_BIT: u32 = 3; -const PIN_SPIM3_CLK_OUT_BIT: u32 = 17; - -pub type SpimGpioOriVal = [u32; 4]; - -macro_rules! modify_reg { - ($reg:expr, $bit:expr, $clear:expr) => {{ - let mut val: u32 = $reg.read().bits(); - if $clear { - val &= !(1 << $bit); + +#[derive(Clone, Copy)] +pub struct SpimGpioOriVal { + clk_gpio_ori_val: [u32; 4], +} + +#[derive(Clone, Copy)] +struct SpimGpioInfo { + scu_register: SpimScuRegister, + scu_bit_mask: u32, + gpio_group: GpioGroup, + gpio_bit_mask: u32, +} + +#[derive(Clone, Copy)] +enum SpimScuRegister { + Scu690, + Scu694, +} + +#[derive(Clone, Copy)] +enum GpioGroup { + Abcd, + Efgh, +} + +fn gpio_regs() -> &'static device::gpio::RegisterBlock { + // SAFETY: The PAC supplies the GPIO register block base address. + unsafe { &*device::Gpio::ptr() } +} + +fn gpio_direction(group: GpioGroup) -> u32 { + match group { + GpioGroup::Abcd => gpio_regs().gpio004().read().bits(), + GpioGroup::Efgh => gpio_regs().gpio024().read().bits(), + } +} + +fn gpio_set_direction(group: GpioGroup, mask: u32, output: bool) { + let update = |bits: u32| { + if output { + bits | mask } else { - val |= 1 << $bit; + bits & !mask } - $reg.write(|w| unsafe { w.bits(val) }); - }}; + }; + + match group { + GpioGroup::Abcd => gpio_regs() + .gpio004() + .modify(|r, w| unsafe { w.bits(update(r.bits())) }), + GpioGroup::Efgh => gpio_regs() + .gpio024() + .modify(|r, w| unsafe { w.bits(update(r.bits())) }), + }; +} + +fn gpio_set_data(group: GpioGroup, mask: u32, high: bool) { + let update = |bits: u32| { + if high { + bits | mask + } else { + bits & !mask + } + }; + + match group { + GpioGroup::Abcd => gpio_regs() + .gpio000() + .modify(|r, w| unsafe { w.bits(update(r.bits())) }), + GpioGroup::Efgh => gpio_regs() + .gpio020() + .modify(|r, w| unsafe { w.bits(update(r.bits())) }), + }; +} + +fn gpio_set_output(group: GpioGroup, mask: u32, high: bool) { + gpio_set_data(group, mask, high); + gpio_set_direction(group, mask, true); +} + +// Literal translation of g_ast1060_spim_clk_gpio[] in spi_aspeed.c. +const AST1060_SPIM_CLK_GPIO: [SpimGpioInfo; 4] = [ + SpimGpioInfo { + scu_register: SpimScuRegister::Scu690, + scu_bit_mask: 1 << 7, + gpio_group: GpioGroup::Abcd, + gpio_bit_mask: 1 << 7, + }, + SpimGpioInfo { + scu_register: SpimScuRegister::Scu690, + scu_bit_mask: 1 << 21, + gpio_group: GpioGroup::Abcd, + gpio_bit_mask: 1 << 21, + }, + SpimGpioInfo { + scu_register: SpimScuRegister::Scu694, + scu_bit_mask: 1 << 3, + gpio_group: GpioGroup::Efgh, + gpio_bit_mask: 1 << 3, + }, + SpimGpioInfo { + scu_register: SpimScuRegister::Scu694, + scu_bit_mask: 1 << 17, + gpio_group: GpioGroup::Efgh, + gpio_bit_mask: 1 << 17, + }, +]; + +// Literal translation of g_ast1060_spim_cs_gpio[] in spi_aspeed.c. +const AST1060_SPIM_CS_GPIO: [SpimGpioInfo; 4] = [ + SpimGpioInfo { + scu_register: SpimScuRegister::Scu690, + scu_bit_mask: 1 << 1, + gpio_group: GpioGroup::Abcd, + gpio_bit_mask: 1 << 6, + }, + SpimGpioInfo { + scu_register: SpimScuRegister::Scu690, + scu_bit_mask: 1 << 20, + gpio_group: GpioGroup::Abcd, + gpio_bit_mask: 1 << 20, + }, + SpimGpioInfo { + scu_register: SpimScuRegister::Scu694, + scu_bit_mask: 1 << 2, + gpio_group: GpioGroup::Efgh, + gpio_bit_mask: 1 << 2, + }, + SpimGpioInfo { + scu_register: SpimScuRegister::Scu694, + scu_bit_mask: 1 << 16, + gpio_group: GpioGroup::Efgh, + gpio_bit_mask: 1 << 16, + }, +]; + +fn ast1060_spim_op_idx(scu0f0: u32) -> Option { + if scu0f0 & 0x7 == 0 { + return None; + } + + match (scu0f0 & 0x7) - 1 { + 2 => Some(3), + 3 => Some(2), + _ => None, + } } impl ScuRegisters { + fn set_spim_pin_function(&self, pin: SpimGpioInfo, enabled: bool) { + let update = |bits: u32| { + if enabled { + bits | pin.scu_bit_mask + } else { + bits & !pin.scu_bit_mask + } + }; + + match pin.scu_register { + SpimScuRegister::Scu690 => self + .regs() + .scu690() + .modify(|r, w| unsafe { w.bits(update(r.bits())) }), + SpimScuRegister::Scu694 => self + .regs() + .scu694() + .modify(|r, w| unsafe { w.bits(update(r.bits())) }), + }; + } + /// Enable or disable passthrough for a SPI monitor instance. Uses SCU0F0[7:4]. pub fn set_spim_passthrough( &self, @@ -44,6 +197,41 @@ impl ScuRegisters { }); } + /// Enable or disable the SCU-side SPI monitor filter path. Uses SCU0F0[11:8]. + pub fn set_spim_filter(&self, instance: SpiMonitorInstance, enable: bool) { + self.unlock_write_protection(); + self.regs().scu0f0().modify(|_, w| match instance { + SpiMonitorInstance::Spim0 => w.enbl_filter_of_spipf1().bit(enable), + SpiMonitorInstance::Spim1 => w.enbl_filter_of_spipf2().bit(enable), + SpiMonitorInstance::Spim2 => w.enbl_filter_of_spipf3().bit(enable), + SpiMonitorInstance::Spim3 => w.enbl_filter_of_spipf4().bit(enable), + }); + } + + /// Disable the internal pull-down on the monitor CS output pin. + pub fn disable_spim_cs_internal_pull_down(&self, instance: SpiMonitorInstance) { + self.unlock_write_protection(); + match instance { + SpiMonitorInstance::Spim0 => { + self.regs() + .scu610() + .modify(|r, w| unsafe { w.bits(r.bits() | (1 << 6)) }); + } + SpiMonitorInstance::Spim1 => { + self.regs() + .scu610() + .modify(|r, w| unsafe { w.bits(r.bits() | (1 << 20)) }); + } + // SPIM3's corresponding pin cannot have its pull-down disabled. + SpiMonitorInstance::Spim2 => {} + SpiMonitorInstance::Spim3 => { + self.regs() + .scu614() + .modify(|r, w| unsafe { w.bits(r.bits() | (1 << 16)) }); + } + } + } + /// Route an internal SPI master through the selected SPI monitor path. pub fn set_spim_internal_master_route( &self, @@ -94,120 +282,69 @@ impl ScuRegisters { pub fn spim_proprietary_pre_config(&self) -> Option { self.unlock_write_protection(); - let scu = self.regs(); - let gpio = unsafe { &*ast1060_pac::Gpio::ptr() }; + let scu0f0 = self.regs().scu0f0().read().bits(); + pw_log::debug!("SPIM pre-config: SCU0F0=0x{:08x}", scu0f0 as u32); + let op_idx = match ast1060_spim_op_idx(scu0f0) { + Some(idx) => idx, + None => return None, + }; + pw_log::debug!( + "SPIM pre-config: active SPIM index {}, op index {}", + ((scu0f0 & 0x7) - 1) as u32, + op_idx as u32 + ); - let scu0f0 = scu.scu0f0().read().bits(); - if scu0f0 & 0x7 == 0 { - return None; - } + let clk = AST1060_SPIM_CLK_GPIO[op_idx]; + let cs = AST1060_SPIM_CS_GPIO[op_idx]; + let mut clk_gpio_ori_val = [0u32; 4]; + // Change the paired SPIM CLKOUT pin to GPIO mode. + self.set_spim_pin_function(clk, false); - let spim_idx = (scu0f0 & 0x7) - 1; - if spim_idx > 3 { - return None; - } + // Save its GPIO direction bit, then configure it as an input. + clk_gpio_ori_val[op_idx] = gpio_direction(clk.gpio_group) & clk.gpio_bit_mask; + gpio_set_direction(clk.gpio_group, clk.gpio_bit_mask, false); - let mut gpio_ori_val = [0; 4]; + // Drive the paired SPIM CSOUT GPIO high and configure it as output. + gpio_set_output(cs.gpio_group, cs.gpio_bit_mask, true); - for idx in 0..4 { - if idx as u32 == spim_idx { - continue; - } + // Change the paired SPIM CSOUT pin to GPIO mode. + self.set_spim_pin_function(cs, false); - match idx { - 0 => { - modify_reg!(scu.scu690(), PIN_SPIM0_CLK_OUT_BIT, true); - gpio_ori_val[0] = gpio.gpio004().read().bits(); - modify_reg!(gpio.gpio004(), PIN_SPIM0_CLK_OUT_BIT, true); - } - 1 => { - modify_reg!(scu.scu690(), PIN_SPIM1_CLK_OUT_BIT, true); - gpio_ori_val[1] = gpio.gpio004().read().bits(); - modify_reg!(gpio.gpio004(), PIN_SPIM1_CLK_OUT_BIT, true); - } - 2 => { - modify_reg!(scu.scu694(), PIN_SPIM2_CLK_OUT_BIT, true); - gpio_ori_val[2] = gpio.gpio024().read().bits(); - modify_reg!(gpio.gpio024(), PIN_SPIM2_CLK_OUT_BIT, true); - } - 3 => { - modify_reg!(scu.scu694(), PIN_SPIM3_CLK_OUT_BIT, true); - gpio_ori_val[3] = gpio.gpio024().read().bits(); - modify_reg!(gpio.gpio024(), PIN_SPIM3_CLK_OUT_BIT, true); - } - _ => {} - } - } - - Some(gpio_ori_val) + pw_log::debug!( + "SPIM pre-config: op index {}, saved CLK direction mask 0x{:08x}", + op_idx as u32, + clk_gpio_ori_val[op_idx] as u32 + ); + Some(SpimGpioOriVal { clk_gpio_ori_val }) } /// Restore AST1060 SPIM proprietary pin state after a transaction. pub fn spim_proprietary_post_config(&self, gpio_ori_val: SpimGpioOriVal) { self.unlock_write_protection(); - let scu = self.regs(); - let gpio = unsafe { &*ast1060_pac::Gpio::ptr() }; - - let bits = scu.scu0f0().read().bits(); - if bits.trailing_zeros() >= 3 { - return; - } + let scu0f0 = self.regs().scu0f0().read().bits(); + let op_idx = match ast1060_spim_op_idx(scu0f0) { + Some(idx) => idx, + None => return, + }; + let clk = AST1060_SPIM_CLK_GPIO[op_idx]; + let cs = AST1060_SPIM_CS_GPIO[op_idx]; + pw_log::debug!( + "SPIM post-config: SCU0F0=0x{:08x}, op index {}, saved CLK direction mask 0x{:08x}", + scu0f0 as u32, + op_idx as u32, + gpio_ori_val.clk_gpio_ori_val[op_idx] as u32 + ); - let spim_idx = (bits & 0x7) - 1; - if spim_idx > 3 { - return; - } + // Restore the paired CLKOUT GPIO direction bit. + let was_output = gpio_ori_val.clk_gpio_ori_val[op_idx] != 0; + gpio_set_direction(clk.gpio_group, clk.gpio_bit_mask, was_output); - for idx in 0..4 { - if idx as u32 == spim_idx { - continue; - } + // Return paired CLKOUT and CSOUT pins to SPIM mode. + self.set_spim_pin_function(clk, true); + self.set_spim_pin_function(cs, true); - match idx { - 0 => { - let ori_val = gpio_ori_val[0]; - gpio.gpio004().modify(|r, w| unsafe { - let mut current = r.bits(); - current &= !(1 << PIN_SPIM0_CLK_OUT_BIT); - current |= ori_val; - w.bits(current) - }); - modify_reg!(scu.scu690(), PIN_SPIM0_CLK_OUT_BIT, false); - } - 1 => { - let ori_val = gpio_ori_val[1]; - gpio.gpio004().modify(|r, w| unsafe { - let mut current = r.bits(); - current &= !(1 << PIN_SPIM1_CLK_OUT_BIT); - current |= ori_val; - w.bits(current) - }); - modify_reg!(gpio.gpio004(), PIN_SPIM1_CLK_OUT_BIT, false); - } - 2 => { - let ori_val = gpio_ori_val[2]; - gpio.gpio024().modify(|r, w| unsafe { - let mut current = r.bits(); - current &= !(1 << PIN_SPIM2_CLK_OUT_BIT); - current |= ori_val; - w.bits(current) - }); - modify_reg!(scu.scu694(), PIN_SPIM2_CLK_OUT_BIT, false); - } - 3 => { - let ori_val = gpio_ori_val[3]; - gpio.gpio024().modify(|r, w| unsafe { - let mut current = r.bits(); - current &= !(1 << PIN_SPIM3_CLK_OUT_BIT); - current |= ori_val; - w.bits(current) - }); - modify_reg!(scu.scu694(), PIN_SPIM3_CLK_OUT_BIT, false); - } - _ => {} - } - } + pw_log::debug!("SPIM post-config: restore complete"); } /// Select the external mux signal for a SPI monitor instance. Uses SCU0F0[15:12]. diff --git a/target/ast10x0/peripherals/smc/controller.rs b/target/ast10x0/peripherals/smc/controller.rs index eaf74dea..545b0280 100644 --- a/target/ast10x0/peripherals/smc/controller.rs +++ b/target/ast10x0/peripherals/smc/controller.rs @@ -618,9 +618,7 @@ impl Smc { let reg = self.regs.read_cs_ctrl(cs); self.regs .write_cs_ctrl(cs, (reg & !SPI_CTRL_FREQ_MASK) | encoded_div); - let val = self.normal_read_ctrl(cs) & ((!SPI_CTRL_FREQ_MASK) | encoded_div); - self.set_normal_read_ctrl(cs, val); - + self.set_normal_read_ctrl(cs, self.regs.read_cs_ctrl(cs)); Ok(()) } diff --git a/target/ast10x0/peripherals/spimonitor/commands.rs b/target/ast10x0/peripherals/spimonitor/commands.rs new file mode 100644 index 00000000..aa71f779 --- /dev/null +++ b/target/ast10x0/peripherals/spimonitor/commands.rs @@ -0,0 +1,201 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Hardware command-table descriptors for the AST10x0 SPI monitor. + +/// A decoded command descriptor before the valid/lock state is applied. +#[derive(Clone, Copy, Debug, Eq, PartialEq)] +pub struct CommandDescriptor { + pub opcode: u8, + pub generic: bool, + pub write: bool, + pub read: bool, + pub memory: bool, + pub data_width: u8, + pub dummy_cycles: u8, + pub program_size: u8, + pub address_len: u8, + pub address_width: u8, +} + +impl CommandDescriptor { + #[must_use] + pub const fn encode(self) -> u32 { + ((self.generic as u32) << 29) + | ((self.write as u32) << 28) + | ((self.read as u32) << 27) + | ((self.memory as u32) << 26) + | ((self.data_width as u32) << 24) + | ((self.dummy_cycles as u32) << 16) + | ((self.program_size as u32) << 13) + | ((self.address_len as u32) << 10) + | ((self.address_width as u32) << 8) + | self.opcode as u32 + } +} + +#[derive(Clone, Copy)] +struct CommandFlags { + generic: bool, + write: bool, + read: bool, + memory: bool, +} + +const GENERIC_READ_MEMORY: CommandFlags = CommandFlags { + generic: true, + write: false, + read: true, + memory: true, +}; +const GENERIC_WRITE_MEMORY: CommandFlags = CommandFlags { + generic: true, + write: true, + read: false, + memory: true, +}; +const GENERIC_NONE: CommandFlags = CommandFlags { + generic: true, + write: false, + read: false, + memory: false, +}; +const GENERIC_READ: CommandFlags = CommandFlags { + generic: true, + write: false, + read: true, + memory: false, +}; +const GENERIC_WRITE: CommandFlags = CommandFlags { + generic: true, + write: true, + read: false, + memory: false, +}; +const RESERVED_NONE: CommandFlags = CommandFlags { + generic: false, + write: false, + read: false, + memory: false, +}; +const RESERVED_WRITE: CommandFlags = CommandFlags { + generic: false, + write: true, + read: false, + memory: false, +}; + +const fn command( + opcode: u8, + flags: CommandFlags, + data_width: u8, + dummy_cycles: u8, + program_size: u8, + address_len: u8, + address_width: u8, +) -> CommandDescriptor { + CommandDescriptor { + opcode, + generic: flags.generic, + write: flags.write, + read: flags.read, + memory: flags.memory, + data_width, + dummy_cycles, + program_size, + address_len, + address_width, + } +} + +/// Return the descriptor used by the Zephyr AST10x0 SPI monitor driver. +#[must_use] +pub const fn descriptor(opcode: u8) -> Option { + let entry = match opcode { + 0x03 => command(opcode, GENERIC_READ_MEMORY, 1, 0, 0, 3, 1), + 0x13 => command(opcode, GENERIC_READ_MEMORY, 1, 0, 0, 4, 1), + 0x0b => command(opcode, GENERIC_READ_MEMORY, 1, 8, 0, 3, 1), + 0x0c => command(opcode, GENERIC_READ_MEMORY, 1, 8, 0, 4, 1), + 0x3b => command(opcode, GENERIC_READ_MEMORY, 2, 8, 0, 3, 1), + 0x3c => command(opcode, GENERIC_READ_MEMORY, 2, 8, 0, 4, 1), + 0xbb => command(opcode, GENERIC_READ_MEMORY, 2, 4, 0, 3, 2), + 0xbc => command(opcode, GENERIC_READ_MEMORY, 2, 4, 0, 4, 2), + 0x6b => command(opcode, GENERIC_READ_MEMORY, 3, 8, 0, 3, 1), + 0x6c => command(opcode, GENERIC_READ_MEMORY, 3, 8, 0, 4, 1), + 0xeb => command(opcode, GENERIC_READ_MEMORY, 3, 6, 0, 3, 3), + 0xec => command(opcode, GENERIC_READ_MEMORY, 3, 6, 0, 4, 3), + 0x02 => command(opcode, GENERIC_WRITE_MEMORY, 1, 0, 1, 3, 1), + 0x12 => command(opcode, GENERIC_WRITE_MEMORY, 1, 0, 1, 4, 1), + 0x32 => command(opcode, GENERIC_WRITE_MEMORY, 3, 0, 1, 3, 1), + 0x34 => command(opcode, GENERIC_WRITE_MEMORY, 3, 0, 1, 4, 1), + 0x20 => command(opcode, GENERIC_WRITE_MEMORY, 0, 0, 1, 3, 1), + 0x21 => command(opcode, GENERIC_WRITE_MEMORY, 0, 0, 1, 4, 1), + 0xd8 => command(opcode, GENERIC_WRITE_MEMORY, 0, 0, 5, 3, 1), + 0xdc => command(opcode, GENERIC_WRITE_MEMORY, 0, 0, 5, 4, 1), + 0x06 | 0x04 | 0x50 | 0x66 | 0x99 => command(opcode, GENERIC_NONE, 0, 0, 0, 0, 0), + 0x05 | 0x35 | 0x15 | 0x70 | 0x9f => command(opcode, GENERIC_READ, 1, 0, 0, 0, 0), + 0x01 | 0x31 => command(opcode, GENERIC_WRITE, 1, 0, 0, 0, 0), + 0x5a => command(opcode, GENERIC_READ, 1, 8, 0, 3, 1), + 0xb7 | 0xe9 => command(opcode, RESERVED_NONE, 0, 0, 0, 0, 0), + 0xc5 => command(opcode, RESERVED_WRITE, 1, 0, 0, 0, 0), + 0xc2 => command(opcode, GENERIC_WRITE, 1, 0, 0, 0, 0), + _ => return None, + }; + Some(entry) +} + +pub const VALID: u32 = 1 << 30; +pub const VALID_ONCE: u32 = 1 << 31; +pub const LOCKED: u32 = 1 << 23; + +#[must_use] +pub const fn table_value(opcode: u8, valid_once: bool) -> Option { + match descriptor(opcode) { + Some(entry) => Some(entry.encode() | if valid_once { VALID_ONCE } else { VALID }), + None => None, + } +} + +#[must_use] +pub const fn fixed_slot(opcode: u8) -> Option { + match opcode { + 0xb7 => Some(0), + 0xe9 => Some(1), + 0xc5 => Some(31), + _ => None, + } +} + +#[cfg(test)] +mod tests { + use super::{fixed_slot, table_value}; + + #[test] + fn fast_read_4b_matches_zephyr_encoding() { + assert_eq!(table_value(0x0c, false), Some(0x6d08_110c)); + } + + #[test] + fn reserved_commands_have_fixed_slots() { + assert_eq!(fixed_slot(0xb7), Some(0)); + assert_eq!(fixed_slot(0xe9), Some(1)); + assert_eq!(fixed_slot(0xc5), Some(31)); + } + + #[test] + fn winbond_die_select_matches_zephyr_encoding() { + assert_eq!(table_value(0xc2, false), Some(0x7100_00c2)); + } + + #[test] + fn complete_zephyr_allow_list_is_supported() { + let commands = [ + 0x03, 0x13, 0x0b, 0x0c, 0x6b, 0x6c, 0x01, 0x05, 0x35, 0x06, 0x04, 0x20, 0x21, 0x9f, + 0x5a, 0xb7, 0xe9, 0x32, 0x34, 0xd8, 0xdc, 0x02, 0x12, 0x3b, 0x3c, 0x70, 0xbb, 0xbc, + 0x50, 0xeb, 0xec, 0xc2, + ]; + for command in commands { + assert!(table_value(command, false).is_some()); + } + } +} diff --git a/target/ast10x0/peripherals/spimonitor/controller.rs b/target/ast10x0/peripherals/spimonitor/controller.rs index 39b1a1ee..5f6a0613 100644 --- a/target/ast10x0/peripherals/spimonitor/controller.rs +++ b/target/ast10x0/peripherals/spimonitor/controller.rs @@ -7,11 +7,12 @@ use core::marker::PhantomData; use crate::scu::registers::ScuRegisters; use crate::scu::types::{ScuExtMuxSelect, SpiMonitorInstance}; -use crate::spimonitor::policy::{MonitorPolicy, MAX_REGION_SLOTS}; +use crate::spimonitor::commands::{fixed_slot, table_value, LOCKED as COMMAND_LOCKED}; +use crate::spimonitor::policy::{SpiMonitorPolicy, MAX_REGION_SLOTS}; use crate::spimonitor::registers::{SpiMonitorController, SpiMonitorRegisters}; use crate::spimonitor::types::{ - ExtMuxSel, LockState, MonitorState, PassthroughMode, PrivilegeDirection, PrivilegeOp, Result, - SpiMonitorError, ViolationLogEntry, + ExtMuxSel, LockState, PassthroughMode, PrivilegeDirection, PrivilegeOp, Result, + SpiMonitorError, SpiMonitorState, ViolationLogEntry, }; /// Typestate: monitor is created but policy is not yet applied. @@ -36,38 +37,6 @@ pub type ConfiguredSpiMonitor = SpiMonitor; /// Ergonomic alias for a locked SPI monitor handle. pub type LockedSpiMonitor = SpiMonitor; -// --------------------------------------------------------------------------- -// Encoding helpers (hardware-format definitions) -// --------------------------------------------------------------------------- - -/// Encode one address-filter slot word from a region policy entry. -/// -/// Hardware slot format (pending datasheet confirmation): -/// - bits[31:14] : region base address >> 14 (18-bit granule) -/// - bit[13] : direction (0 = read, 1 = write) -/// - bit[12] : op (0 = enable/allow, 1 = disable/block) -/// - bits[11:0] : length in 4 KiB units (length >> 12), clamped to 12 bits -/// -/// TODO: replace with confirmed SPIPF register field encoding once available. -fn encode_addr_filter_slot( - start: u32, - length: u32, - direction: PrivilegeDirection, - op: PrivilegeOp, -) -> u32 { - let addr_field = (start >> 14) & 0x3_FFFF; - let dir_bit: u32 = match direction { - PrivilegeDirection::Read => 0, - PrivilegeDirection::Write => 1, - }; - let op_bit: u32 = match op { - PrivilegeOp::Enable => 0, - PrivilegeOp::Disable => 1, - }; - let len_field = (length >> 12) & 0xFFF; - (addr_field << 14) | (dir_bit << 13) | (op_bit << 12) | len_field -} - // --------------------------------------------------------------------------- // Uninitialized state // --------------------------------------------------------------------------- @@ -92,30 +61,91 @@ impl SpiMonitor { /// Returns `Err(InvalidSlot)` if `allow_command_count` exceeds the command /// table length. Returns `Err(InvalidRegion)` if `region_count` exceeds /// `MAX_REGION_SLOTS`. - pub fn apply_policy(self, policy: &MonitorPolicy) -> Result> { + pub fn apply_policy(self, policy: &SpiMonitorPolicy) -> Result> { if policy.allow_command_count > policy.allow_commands.len() { return Err(SpiMonitorError::InvalidSlot); } if policy.region_count > MAX_REGION_SLOTS { return Err(SpiMonitorError::InvalidRegion); } + if self.regs.read_lock_status() & LOCK_STATUS_REQUIRED != 0 { + return Err(SpiMonitorError::Locked); + } + for slot in 0..COMMAND_TABLE_SLOTS { + if self.regs.read_allow_cmd_slot(slot) & COMMAND_LOCKED != 0 { + return Err(SpiMonitorError::Locked); + } + } - // Program command allow-list table. + let general_slot_limit = + if policy.allow_commands[..policy.allow_command_count].contains(&0xc5) { + LAST_GENERAL_COMMAND_SLOT_EXCLUSIVE + } else { + COMMAND_TABLE_SLOTS + }; + let mut general_command_count = 0usize; + for opcode in policy.allow_commands[..policy.allow_command_count] + .iter() + .copied() + { + if table_value(opcode, false).is_none() { + return Err(SpiMonitorError::UnsupportedCommand(opcode)); + } + if fixed_slot(opcode).is_none() { + general_command_count += 1; + } + } + if general_command_count > general_slot_limit - FIRST_GENERAL_COMMAND_SLOT { + return Err(SpiMonitorError::NoCommandSlot); + } + for region in policy.regions[..policy.region_count].iter().flatten() { + validate_privilege_region(region.start, region.length)?; + } + + for slot in 0..COMMAND_TABLE_SLOTS { + self.regs.write_allow_cmd_slot(slot, 0); + } + + let mut next_slot = FIRST_GENERAL_COMMAND_SLOT; + // Slots 0 and 1 are reserved for EN4B and EX4B; slot 31 is reserved + // for WREAR when it is present. Otherwise slot 31 can hold a generic + // command, allowing the supplied 32-command Zephyr policy to fit. for i in 0..policy.allow_command_count { - let cmd = policy.allow_commands[i] as u32; - self.regs.write_allow_cmd_slot(i, cmd); + let opcode = policy.allow_commands[i]; + let value = + table_value(opcode, false).ok_or(SpiMonitorError::UnsupportedCommand(opcode))?; + let slot = match fixed_slot(opcode) { + Some(slot) => slot, + None => { + if next_slot >= general_slot_limit { + return Err(SpiMonitorError::NoCommandSlot); + } + let slot = next_slot; + next_slot += 1; + slot + } + }; + self.regs.write_allow_cmd_slot(slot, value); + if self.regs.read_allow_cmd_slot(slot) != value { + return Err(SpiMonitorError::VerificationFailed); + } } - // Program address filter table. + // Empty policy means unrestricted access, matching the Zephyr driver: + // initialize both 256 MiB privilege maps to all-allowed, then apply + // the requested deny/allow regions. + initialize_privilege_table(&self.regs, PrivilegeDirection::Read)?; + initialize_privilege_table(&self.regs, PrivilegeDirection::Write)?; + for i in 0..policy.region_count { if let Some(region) = policy.regions[i] { - let word = encode_addr_filter_slot( + configure_privilege_region( + &self.regs, region.start, region.length, region.direction, region.op, - ); - self.regs.write_addr_filter_slot(i, word); + )?; } } @@ -128,8 +158,16 @@ impl SpiMonitor { } #[must_use] - pub const fn state(&self) -> MonitorState { - MonitorState::Uninitialized + pub const fn state(&self) -> SpiMonitorState { + SpiMonitorState::Uninitialized + } + + /// Pulse the SPIPF software-reset bit for at least 5 microseconds. + pub fn software_reset(&self) { + let ctrl = self.regs.read_ctrl() & !CTRL_SW_RESET_BIT; + self.regs.write_ctrl(ctrl | CTRL_SW_RESET_BIT); + delay_cycles(SW_RESET_DELAY_CYCLES); + self.regs.write_ctrl(ctrl); } } @@ -138,6 +176,128 @@ impl SpiMonitor { // --------------------------------------------------------------------------- impl SpiMonitor { + /// Reset the SPIPF transaction parser while preserving programmed policy. + /// + /// Zephyr pulses this reset immediately before handing flash ownership + /// from the RoT master to the external BMC/PCH master. + pub fn reset_filter_state(&self) { + let ctrl = self.regs.read_ctrl() & !CTRL_SW_RESET_BIT; + self.regs.write_ctrl(ctrl | CTRL_SW_RESET_BIT); + delay_cycles(SW_RESET_DELAY_CYCLES); + self.regs.write_ctrl(ctrl); + } + + /// Add or re-enable one command, matching the Zephyr shell `cmd add`. + pub fn add_command(&self, opcode: u8, valid_once: bool) -> Result { + let value = + table_value(opcode, valid_once).ok_or(SpiMonitorError::UnsupportedCommand(opcode))?; + + for slot in 0..COMMAND_TABLE_SLOTS { + let current = self.regs.read_allow_cmd_slot(slot); + if current & 0xff == u32::from(opcode) && current & COMMAND_LOCKED == 0 { + self.regs.write_allow_cmd_slot(slot, value); + return verify_command_slot(&self.regs, slot, value); + } + } + + let slot = if let Some(slot) = fixed_slot(opcode) { + let current = self.regs.read_allow_cmd_slot(slot); + if current != 0 && current & 0xff != u32::from(opcode) { + return Err(SpiMonitorError::NoCommandSlot); + } + slot + } else { + (FIRST_GENERAL_COMMAND_SLOT..COMMAND_TABLE_SLOTS) + .find(|slot| self.regs.read_allow_cmd_slot(*slot) == 0) + .ok_or(SpiMonitorError::NoCommandSlot)? + }; + if self.regs.read_allow_cmd_slot(slot) & COMMAND_LOCKED != 0 { + return Err(SpiMonitorError::Locked); + } + self.regs.write_allow_cmd_slot(slot, value); + verify_command_slot(&self.regs, slot, value) + } + + /// Disable every unlocked entry matching an opcode. + pub fn remove_command(&self, opcode: u8) -> Result { + let mut count = 0; + for slot in 0..COMMAND_TABLE_SLOTS { + let current = self.regs.read_allow_cmd_slot(slot); + if current & 0xff == u32::from(opcode) { + if current & COMMAND_LOCKED != 0 { + return Err(SpiMonitorError::Locked); + } + self.regs.write_allow_cmd_slot(slot, 0); + verify_command_slot(&self.regs, slot, 0)?; + count += 1; + } + } + if count == 0 { + return Err(SpiMonitorError::UnsupportedCommand(opcode)); + } + Ok(count) + } + + /// Lock every command-table entry matching an opcode. + pub fn lock_command(&self, opcode: u8) -> Result { + let mut count = 0; + for slot in 0..COMMAND_TABLE_SLOTS { + let current = self.regs.read_allow_cmd_slot(slot); + if current & 0xff == u32::from(opcode) { + let updated = current | COMMAND_LOCKED; + self.regs.write_allow_cmd_slot(slot, updated); + verify_command_slot(&self.regs, slot, updated)?; + count += 1; + } + } + if count == 0 { + return Err(SpiMonitorError::UnsupportedCommand(opcode)); + } + Ok(count) + } + + /// Update an address privilege region, matching the Zephyr shell + /// `addr read/write enable/disable` operations. + pub fn configure_region( + &self, + start: u32, + length: u32, + direction: PrivilegeDirection, + op: PrivilegeOp, + ) -> Result<()> { + let lock = self.regs.read_lock_status(); + let locked = match direction { + PrivilegeDirection::Read => lock & LOCK_READ_PRIVILEGE != 0, + PrivilegeDirection::Write => lock & LOCK_WRITE_PRIVILEGE != 0, + }; + if locked { + return Err(SpiMonitorError::Locked); + } + configure_privilege_region(&self.regs, start, length, direction, op) + } + + /// Read one word from the selected privilege bitmap. + pub fn privilege_word(&self, direction: PrivilegeDirection, index: usize) -> Result { + if index >= PRIVILEGE_TABLE_WORDS { + return Err(SpiMonitorError::InvalidSlot); + } + select_privilege_table(&self.regs, direction); + Ok(self.regs.read_addr_filter_slot(index)) + } + + /// Lock one privilege bitmap, matching the shell `addr lock read/write`. + pub fn lock_privilege_table(&self, direction: PrivilegeDirection) -> Result<()> { + let mask = match direction { + PrivilegeDirection::Read => LOCK_READ_PRIVILEGE, + PrivilegeDirection::Write => LOCK_WRITE_PRIVILEGE, + }; + self.regs.modify_lock_status(|bits| *bits |= mask); + if self.regs.read_lock_status() & mask != mask { + return Err(SpiMonitorError::LockFailed); + } + Ok(()) + } + /// Enable the monitor filter (SPIPF000 bit 0). /// /// Mirrors Zephyr's `spim_monitor_enable(dev, true)`. @@ -160,8 +320,13 @@ impl SpiMonitor { /// Mirrors Zephyr's `spim_passthrough_config`. pub fn set_passthrough(&self, mode: PassthroughMode) { self.regs.modify_ctrl(|bits| match mode { - PassthroughMode::Enabled => *bits |= CTRL_PASSTHROUGH_BIT, - PassthroughMode::Disabled => *bits &= !CTRL_PASSTHROUGH_BIT, + PassthroughMode::Enabled => { + *bits = (*bits & !CTRL_PASSTHROUGH_MASK) | CTRL_SINGLE_PASSTHROUGH_BIT + } + PassthroughMode::MultiEnabled => { + *bits = (*bits & !CTRL_PASSTHROUGH_MASK) | CTRL_MULTI_PASSTHROUGH_BIT + } + PassthroughMode::Disabled => *bits &= !CTRL_PASSTHROUGH_MASK, }); } @@ -212,6 +377,57 @@ impl SpiMonitor { drain_log_impl(&self.regs, buf) } + /// Configure a caller-owned, static DMA buffer for violation logging. + /// + /// The hardware stores one 32-bit violation record per entry. + pub fn configure_log(&self, buffer: &'static mut [u32]) -> Result<()> { + if buffer.is_empty() || buffer.len() > MAX_LOG_ENTRIES { + return Err(SpiMonitorError::InvalidLogBuffer); + } + let address = buffer.as_mut_ptr() as usize; + if address & 0x3 != 0 || address > u32::MAX as usize { + return Err(SpiMonitorError::InvalidLogBuffer); + } + buffer.fill(0); + self.regs + .write_log_config(address as u32, buffer.len() as u32); + Ok(()) + } + + /// Use push-pull signaling for the monitor output path. + pub fn set_push_pull(&self, enable: bool) { + self.regs.modify_ctrl2(|bits| { + if enable { + *bits |= CTRL2_PUSH_PULL; + } else { + *bits &= !CTRL2_PUSH_PULL; + } + }); + } + + /// Enable command, write, and read violation interrupts in SPIPF004. + /// + /// Platform code must install and enable the corresponding NVIC handler. + pub fn enable_violation_interrupts(&self) { + self.regs + .modify_ctrl2(|bits| *bits |= CTRL2_VIOLATION_IRQ_ENABLE_MASK); + } + + /// Return currently pending command/write/read violation status bits. + #[must_use] + pub fn pending_violations(&self) -> u32 { + self.regs.read_ctrl2() & CTRL2_VIOLATION_STATUS_MASK + } + + /// Acknowledge all currently pending violation status bits. + pub fn acknowledge_violations(&self) -> u32 { + let pending = self.pending_violations(); + if pending != 0 { + self.regs.modify_ctrl2(|bits| *bits |= pending); + } + pending + } + /// Lock monitor policy registers and transition to `Locked`. /// /// Activates all write-protection bits to prevent further policy changes. @@ -220,9 +436,31 @@ impl SpiMonitor { /// - Lock all command table entries /// - Write-disable SPIPF000, SPIPF004, SPIPF010, SPIPF014 pub fn lock(self) -> Result> { - // Placeholder: This single bit write is incomplete. - // Full lock requires SPIPF07C write-disable bits per aspeed-rust pattern. - self.regs.modify_ctrl(|bits| *bits |= CTRL_LOCK_BIT); + for slot in 0..COMMAND_TABLE_SLOTS { + let value = self.regs.read_allow_cmd_slot(slot); + self.regs.write_allow_cmd_slot(slot, value | COMMAND_LOCKED); + } + + self.regs + .modify_ctrl(|bits| *bits |= CTRL_BLOCK_FIFO_LOCK | CTRL_SW_RESET_LOCK); + self.regs.modify_lock_status(|bits| { + *bits |= LOCK_CTRL + | LOCK_IRQ_CTRL + | LOCK_LOG_BASE + | LOCK_LOG_CTRL + | LOCK_WRITE_PRIVILEGE + | LOCK_READ_PRIVILEGE; + }); + + let lock_status = self.regs.read_lock_status(); + if lock_status & LOCK_STATUS_REQUIRED != LOCK_STATUS_REQUIRED { + return Err(SpiMonitorError::LockFailed); + } + for slot in 0..COMMAND_TABLE_SLOTS { + if self.regs.read_allow_cmd_slot(slot) & COMMAND_LOCKED == 0 { + return Err(SpiMonitorError::LockFailed); + } + } Ok(SpiMonitor { regs: self.regs, @@ -233,8 +471,8 @@ impl SpiMonitor { } #[must_use] - pub const fn state(&self) -> MonitorState { - MonitorState::Configured + pub const fn state(&self) -> SpiMonitorState { + SpiMonitorState::Configured } } @@ -243,17 +481,6 @@ impl SpiMonitor { // --------------------------------------------------------------------------- impl SpiMonitor { - /// Configure passthrough mode in locked state. - /// - /// Passthrough is intentionally available post-lock because it is used - /// during mux ownership transitions at runtime (e.g., BMC boot-hold/release). - pub fn set_passthrough(&self, mode: PassthroughMode) { - self.regs.modify_ctrl(|bits| match mode { - PassthroughMode::Enabled => *bits |= CTRL_PASSTHROUGH_BIT, - PassthroughMode::Disabled => *bits &= !CTRL_PASSTHROUGH_BIT, - }); - } - /// Select the external SPI mux routing in locked state. /// /// Available post-lock for mux ownership transitions at runtime (e.g., BMC boot-hold/release). @@ -300,8 +527,8 @@ impl SpiMonitor { } #[must_use] - pub const fn state(&self) -> MonitorState { - MonitorState::Locked + pub const fn state(&self) -> SpiMonitorState { + SpiMonitorState::Locked } } @@ -329,20 +556,139 @@ impl SpiMonitor { /// /// Confirmed from aspeed-rust implementation (src/spimonitor/hardware.rs). /// Register field names from ast1060_pac provide safe typed accessors. -const CTRL_MONITOR_ENABLE_BIT: u32 = 1 << 0; // enbl_filter_fn() in SPIPF000[0] -const CTRL_PASSTHROUGH_BIT: u32 = 1 << 1; // enbl_single_bit_passthrough() in SPIPF000[1] -#[allow(dead_code)] -const CTRL_SW_RESET_BIT: u32 = 1 << 0; // sweng_rst() in SPIPF000[?] - uses PAC field +const CTRL_SINGLE_PASSTHROUGH_BIT: u32 = 1 << 0; +const CTRL_MULTI_PASSTHROUGH_BIT: u32 = 1 << 1; +const CTRL_PASSTHROUGH_MASK: u32 = (1 << 0) | (1 << 1); +const CTRL_MONITOR_ENABLE_BIT: u32 = 1 << 2; #[allow(dead_code)] -const CTRL_EXT_MUX_SEL_BIT: u32 = 1 << 2; // PLACEHOLDER - NOT in SPIPF000! See note below. -#[allow(dead_code)] -const CTRL_LOCK_BIT: u32 = 1 << 31; // PLACEHOLDER - NOT in SPIPF000! See note below. - // - // NOTE: CTRL_EXT_MUX_SEL and CTRL_LOCK are NOT in SPIPF000 register: - // - ExtMux is controlled via SCU0F0 register (ext_mux_select_sig_of_spipfN bits) - // See aspeed-rust: spim_ext_mux_config() - // - Lock is controlled via SPIPF07C write-disable bits and individual command - // table entry lock bits. See aspeed-rust: spim_lock_common(), spim_lock_rw_priv_table() +const CTRL_SW_RESET_BIT: u32 = 1 << 15; +const CTRL_BLOCK_FIFO_LOCK: u32 = 1 << 22; +const CTRL_SW_RESET_LOCK: u32 = 1 << 23; +const CTRL2_VIOLATION_STATUS_MASK: u32 = 0x7; +const CTRL2_VIOLATION_IRQ_ENABLE_MASK: u32 = 0x7 << 16; +const CTRL2_PUSH_PULL: u32 = 1 << 31; +const COMMAND_TABLE_SLOTS: usize = 32; +const FIRST_GENERAL_COMMAND_SLOT: usize = 2; +const LAST_GENERAL_COMMAND_SLOT_EXCLUSIVE: usize = 31; +const PRIVILEGE_TABLE_WORDS: usize = 512; +const PRIVILEGE_BLOCK_SIZE: u32 = 16 * 1024; +const PRIVILEGE_ADDRESS_LIMIT: u32 = 256 * 1024 * 1024; +const PRIVILEGE_READ_SELECT: u32 = 0x5200_0000; +const PRIVILEGE_WRITE_SELECT: u32 = 0x5700_0000; +const MAX_LOG_ENTRIES: usize = 0x7_ffff; +const SW_RESET_DELAY_CYCLES: u32 = 1_000; + +const LOCK_CTRL: u32 = 1 << 0; +const LOCK_IRQ_CTRL: u32 = 1 << 1; +const LOCK_LOG_BASE: u32 = 1 << 4; +const LOCK_LOG_CTRL: u32 = 1 << 5; +const LOCK_WRITE_PRIVILEGE: u32 = 1 << 30; +const LOCK_READ_PRIVILEGE: u32 = 1 << 31; +const LOCK_STATUS_REQUIRED: u32 = LOCK_CTRL + | LOCK_IRQ_CTRL + | LOCK_LOG_BASE + | LOCK_LOG_CTRL + | LOCK_WRITE_PRIVILEGE + | LOCK_READ_PRIVILEGE; + +fn select_privilege_table(regs: &SpiMonitorRegisters, direction: PrivilegeDirection) { + let selection = match direction { + PrivilegeDirection::Read => PRIVILEGE_READ_SELECT, + PrivilegeDirection::Write => PRIVILEGE_WRITE_SELECT, + }; + regs.modify_ctrl(|bits| *bits = (*bits & 0x00ff_ffff) | selection); +} + +fn verify_command_slot(regs: &SpiMonitorRegisters, slot: usize, expected: u32) -> Result { + if regs.read_allow_cmd_slot(slot) != expected { + return Err(SpiMonitorError::VerificationFailed); + } + Ok(slot) +} + +fn initialize_privilege_table( + regs: &SpiMonitorRegisters, + direction: PrivilegeDirection, +) -> Result<()> { + select_privilege_table(regs, direction); + for index in 0..PRIVILEGE_TABLE_WORDS { + regs.write_addr_filter_slot(index, u32::MAX); + } + if regs.read_addr_filter_slot(0) != u32::MAX + || regs.read_addr_filter_slot(PRIVILEGE_TABLE_WORDS - 1) != u32::MAX + { + return Err(SpiMonitorError::VerificationFailed); + } + Ok(()) +} + +fn configure_privilege_region( + regs: &SpiMonitorRegisters, + start: u32, + length: u32, + direction: PrivilegeDirection, + op: PrivilegeOp, +) -> Result<()> { + validate_privilege_region(start, length)?; + let end = start + .checked_add(length) + .ok_or(SpiMonitorError::InvalidLength)? + .min(PRIVILEGE_ADDRESS_LIMIT); + let aligned_start = start / PRIVILEGE_BLOCK_SIZE * PRIVILEGE_BLOCK_SIZE; + let aligned_end = end + .checked_add(PRIVILEGE_BLOCK_SIZE - 1) + .ok_or(SpiMonitorError::InvalidLength)? + / PRIVILEGE_BLOCK_SIZE + * PRIVILEGE_BLOCK_SIZE; + let mut block = aligned_start / PRIVILEGE_BLOCK_SIZE; + let end_block = aligned_end / PRIVILEGE_BLOCK_SIZE; + + select_privilege_table(regs, direction); + while block < end_block { + let word_index = (block / 32) as usize; + let bit_index = block % 32; + let remaining = end_block - block; + let updated = if bit_index == 0 && remaining >= 32 { + block += 32; + match op { + PrivilegeOp::Enable => u32::MAX, + PrivilegeOp::Disable => 0, + } + } else { + block += 1; + let value = regs + .read_addr_filter_slot_checked(word_index) + .ok_or(SpiMonitorError::InvalidAddress)?; + match op { + PrivilegeOp::Enable => value | (1 << bit_index), + PrivilegeOp::Disable => value & !(1 << bit_index), + } + }; + if !regs.write_addr_filter_slot_checked(word_index, updated) { + return Err(SpiMonitorError::InvalidAddress); + } + if regs.read_addr_filter_slot_checked(word_index) != Some(updated) { + return Err(SpiMonitorError::VerificationFailed); + } + } + Ok(()) +} + +fn validate_privilege_region(start: u32, length: u32) -> Result<()> { + if start >= PRIVILEGE_ADDRESS_LIMIT { + return Err(SpiMonitorError::InvalidAddress); + } + if length == 0 || start.checked_add(length).is_none() { + return Err(SpiMonitorError::InvalidLength); + } + Ok(()) +} + +fn delay_cycles(cycles: u32) { + for _ in 0..cycles { + core::hint::spin_loop(); + } +} /// Shared drain-log implementation used by both `Configured` and `Locked`. fn drain_log_impl<'a>( @@ -350,7 +696,7 @@ fn drain_log_impl<'a>( buf: &'a mut [ViolationLogEntry], ) -> &'a [ViolationLogEntry] { let log_base = regs.log_ram_base_addr(); - let max_entries = regs.read_log_max_sz() as usize / core::mem::size_of::(); + let max_entries = regs.read_log_capacity_entries() as usize; let write_idx = regs.read_log_idx_reg() as usize; let available = write_idx.min(max_entries); diff --git a/target/ast10x0/peripherals/spimonitor/mod.rs b/target/ast10x0/peripherals/spimonitor/mod.rs index 8f649e14..d0e315f4 100644 --- a/target/ast10x0/peripherals/spimonitor/mod.rs +++ b/target/ast10x0/peripherals/spimonitor/mod.rs @@ -3,6 +3,7 @@ //! AST10x0 SPI monitor (SPIPF) module. +pub mod commands; pub mod controller; pub mod policy; pub mod profile; @@ -10,18 +11,19 @@ pub mod registers; pub mod traits; pub mod types; +pub use commands::{descriptor as command_descriptor, table_value as command_table_value}; pub use controller::{ Configured, ConfiguredSpiMonitor, Locked, LockedSpiMonitor, SpiMonitor, UninitSpiMonitor, Uninitialized, }; -pub use policy::{MonitorPolicy, MAX_CMD_SLOTS, MAX_REGION_SLOTS}; +pub use policy::{SpiMonitorPolicy, MAX_CMD_SLOTS, MAX_REGION_SLOTS}; pub use registers::{ SpiMonitorController, SpiMonitorRegisters, SPIPF1_BASE, SPIPF2_BASE, SPIPF3_BASE, SPIPF4_BASE, SPIPF_REG_SIZE, }; -pub use traits::Monitor; +pub use traits::SpiMonitorControl; pub use types::{ - BootConfig, BootError, BootPhase, BootResult, ExtMuxSel, LockState, MonitorInstance, - MonitorState, MonitorStatus, MuxSelect, PassthroughMode, PrivilegeDirection, PrivilegeOp, - RegionPolicy, Result as SpiMonitorResult, SpiMonitorError, ViolationLogEntry, + BootConfig, BootError, BootPhase, BootResult, ExtMuxSel, LockState, MuxSelect, PassthroughMode, + PrivilegeDirection, PrivilegeOp, RegionPolicy, Result as SpiMonitorResult, SpiMonitorError, + SpiMonitorId, SpiMonitorState, SpiMonitorStatus, ViolationLogEntry, }; diff --git a/target/ast10x0/peripherals/spimonitor/policy.rs b/target/ast10x0/peripherals/spimonitor/policy.rs index fee1082c..2d969062 100644 --- a/target/ast10x0/peripherals/spimonitor/policy.rs +++ b/target/ast10x0/peripherals/spimonitor/policy.rs @@ -13,14 +13,14 @@ pub const MAX_CMD_SLOTS: usize = 32; /// Policy payload applied to a monitor instance. #[derive(Clone, Debug)] -pub struct MonitorPolicy { +pub struct SpiMonitorPolicy { pub allow_commands: [u8; MAX_CMD_SLOTS], pub allow_command_count: usize, pub regions: [Option; MAX_REGION_SLOTS], pub region_count: usize, } -impl MonitorPolicy { +impl SpiMonitorPolicy { #[must_use] pub const fn empty() -> Self { Self { diff --git a/target/ast10x0/peripherals/spimonitor/profile.rs b/target/ast10x0/peripherals/spimonitor/profile.rs index 4e498dfe..74639487 100644 --- a/target/ast10x0/peripherals/spimonitor/profile.rs +++ b/target/ast10x0/peripherals/spimonitor/profile.rs @@ -4,15 +4,15 @@ //! Built-in SPI monitor policy profiles. //! //! Profiles provide command allow-lists only. Region entries are platform -//! policy and must be added by the caller via `MonitorPolicy::add_region` +//! policy and must be added by the caller via `SpiMonitorPolicy::add_region` //! using the PFM or provisioned manifest for the specific device. -use crate::spimonitor::policy::MonitorPolicy; +use crate::spimonitor::policy::SpiMonitorPolicy; /// Runtime profile: read-focused allow-list suitable for steady-state boot/runtime. #[must_use] -pub const fn runtime_read_only() -> MonitorPolicy { - let mut p = MonitorPolicy::empty(); +pub const fn runtime_read_only() -> SpiMonitorPolicy { + let mut p = SpiMonitorPolicy::empty(); p.allow_commands[0] = 0x03; // READ p.allow_commands[1] = 0x0B; // FAST_READ p.allow_commands[2] = 0x9F; // RDID @@ -22,7 +22,7 @@ pub const fn runtime_read_only() -> MonitorPolicy { /// Update profile: expands allow-list for controlled erase/program flows. #[must_use] -pub const fn firmware_update_window() -> MonitorPolicy { +pub const fn firmware_update_window() -> SpiMonitorPolicy { let mut p = runtime_read_only(); p.allow_commands[3] = 0x06; // WREN p.allow_commands[4] = 0x20; // SE @@ -30,3 +30,16 @@ pub const fn firmware_update_window() -> MonitorPolicy { p.allow_command_count = 6; p } + +/// Full command allow-list used by the AST1060 Zephyr device tree. +#[must_use] +pub const fn zephyr_default() -> SpiMonitorPolicy { + let mut p = SpiMonitorPolicy::empty(); + p.allow_commands = [ + 0x03, 0x13, 0x0b, 0x0c, 0x6b, 0x6c, 0x01, 0x05, 0x35, 0x06, 0x04, 0x20, 0x21, 0x9f, 0x5a, + 0xb7, 0xe9, 0x32, 0x34, 0xd8, 0xdc, 0x02, 0x12, 0x3b, 0x3c, 0x70, 0xbb, 0xbc, 0x50, 0xeb, + 0xec, 0xc2, + ]; + p.allow_command_count = p.allow_commands.len(); + p +} diff --git a/target/ast10x0/peripherals/spimonitor/registers.rs b/target/ast10x0/peripherals/spimonitor/registers.rs index 3fcf02e7..01fd6151 100644 --- a/target/ast10x0/peripherals/spimonitor/registers.rs +++ b/target/ast10x0/peripherals/spimonitor/registers.rs @@ -118,6 +118,17 @@ impl SpiMonitorRegisters { self.regs().spipf004().write(|w| unsafe { w.bits(value) }); } + pub fn modify_ctrl2(&self, f: F) + where + F: FnOnce(&mut u32), + { + self.regs().spipf004().modify(|r, w| { + let mut bits = r.bits(); + f(&mut bits); + unsafe { w.bits(bits) } + }); + } + /// SPIPF07C: Lock/status register. pub fn read_lock_status(&self) -> u32 { self.regs().spipf07c().read().bits() @@ -127,6 +138,17 @@ impl SpiMonitorRegisters { self.regs().spipf07c().write(|w| unsafe { w.bits(value) }); } + pub fn modify_lock_status(&self, f: F) + where + F: FnOnce(&mut u32), + { + self.regs().spipf07c().modify(|r, w| { + let mut bits = r.bits(); + f(&mut bits); + unsafe { w.bits(bits) } + }); + } + /// SPIPFWT[n]: Allow-command table entry. pub fn read_allow_cmd_slot(&self, index: usize) -> u32 { self.regs().spipfwt(index).read().bits() @@ -138,6 +160,14 @@ impl SpiMonitorRegisters { .write(|w| unsafe { w.bits(value) }); } + /// Read an allow-command slot without panicking for an invalid index. + pub fn read_allow_cmd_slot_checked(&self, index: usize) -> Option { + self.regs() + .spipfwt_iter() + .nth(index) + .map(|register| register.read().bits()) + } + /// SPIPFWA[n]: Address filter table entry. pub fn read_addr_filter_slot(&self, index: usize) -> u32 { self.regs().spipfwa(index).read().bits() @@ -149,45 +179,60 @@ impl SpiMonitorRegisters { .write(|w| unsafe { w.bits(value) }); } + /// Read an address-filter slot without panicking for an invalid index. + pub fn read_addr_filter_slot_checked(&self, index: usize) -> Option { + self.regs() + .spipfwa_iter() + .nth(index) + .map(|register| register.read().bits()) + } + + /// Write an address-filter slot, returning false for an invalid index. + #[must_use] + pub fn write_addr_filter_slot_checked(&self, index: usize, value: u32) -> bool { + let Some(register) = self.regs().spipfwa_iter().nth(index) else { + return false; + }; + register.write(|w| unsafe { w.bits(value) }); + true + } + // ----------------------------------------------------------------------- // Violation log registers - // - // TODO: confirm SPIPF register offsets for log control from the AST10x0 - // datasheet once available. Offsets below are placeholders consistent with - // known Aspeed SPIPF register map patterns. // ----------------------------------------------------------------------- - /// Current violation log write index (number of entries written so far). - /// - /// Maps to the SPIPF log index register (placeholder offset 0x080). + /// Current violation log write index (number of 32-bit entries written). pub fn read_log_idx_reg(&self) -> u32 { - // SAFETY: raw offset read within the known SPIPF register block page. - unsafe { - let ptr = (self.base as *const u8).add(0x080) as *const u32; - core::ptr::read_volatile(ptr) - } + self.regs() + .spipf018() + .read() + .block_log_dmawr_pointer() + .bits() } - /// Maximum violation log capacity in bytes. - /// - /// Maps to the SPIPF log size register (placeholder offset 0x084). - pub fn read_log_max_sz(&self) -> u32 { - // SAFETY: same as above. - unsafe { - let ptr = (self.base as *const u8).add(0x084) as *const u32; - core::ptr::read_volatile(ptr) - } + /// Maximum violation log capacity in 32-bit entries. + pub fn read_log_capacity_entries(&self) -> u32 { + self.regs() + .spipf014() + .read() + .size_of_block_log_dmabuffer() + .bits() } /// Base address of the violation log RAM region. - /// - /// Returns a `usize` suitable for casting to `*const u32` by the caller. - /// Maps to the SPIPF log RAM address register (placeholder offset 0x088). pub fn log_ram_base_addr(&self) -> usize { - // SAFETY: same as above. - unsafe { - let ptr = (self.base as *const u8).add(0x088) as *const u32; - core::ptr::read_volatile(ptr) as usize - } + (self.regs().spipf010().read().bits() & !0x3) as usize + } + + /// Configure the violation-log DMA buffer. + pub fn write_log_config(&self, base_addr: u32, entries: u32) { + self.regs() + .spipf010() + .write(|w| unsafe { w.bits(base_addr & !0x3) }); + self.regs() + .spipf014() + .write(|w| unsafe { w.bits(LOG_DMA_ENABLE | entries) }); } } + +const LOG_DMA_ENABLE: u32 = 1 << 31; diff --git a/target/ast10x0/peripherals/spimonitor/traits.rs b/target/ast10x0/peripherals/spimonitor/traits.rs index af455d6c..fcb6836e 100644 --- a/target/ast10x0/peripherals/spimonitor/traits.rs +++ b/target/ast10x0/peripherals/spimonitor/traits.rs @@ -7,8 +7,8 @@ //! with SPI monitor hardware during platform initialization. use super::types::{ - BootError, BootResult, MonitorInstance, MonitorStatus, MuxSelect, PrivilegeDirection, - PrivilegeOp, + BootError, BootResult, MuxSelect, PrivilegeDirection, PrivilegeOp, SpiMonitorId, + SpiMonitorStatus, }; /// Abstract hardware interface for SPI monitor boot operations. @@ -16,18 +16,18 @@ use super::types::{ /// Implementations of this trait provide register-level access to SPI monitor /// blocks via PAC or other register models. Boot code uses this trait to remain /// independent of the concrete register implementation. -pub trait Monitor { +pub trait SpiMonitorControl { /// Set monitor mux to ROT or Host control. - fn set_mux(&mut self, instance: MonitorInstance, mux: MuxSelect) -> BootResult<()>; + fn set_mux(&mut self, instance: SpiMonitorId, mux: MuxSelect) -> BootResult<()>; /// Read current mux setting. - fn read_mux(&self, instance: MonitorInstance) -> BootResult; + fn read_mux(&self, instance: SpiMonitorId) -> BootResult; /// Soft reset monitor (clears status/logs, preserves policy). - fn soft_reset(&mut self, instance: MonitorInstance) -> BootResult<()>; + fn soft_reset(&mut self, instance: SpiMonitorId) -> BootResult<()>; /// Hardware reset monitor (full reset of all state). - fn hardware_reset(&mut self, instance: MonitorInstance) -> BootResult<()>; + fn hardware_reset(&mut self, instance: SpiMonitorId) -> BootResult<()>; /// Configure an address privilege region. /// @@ -39,7 +39,7 @@ pub trait Monitor { /// * `op` - Allow or Block access fn set_address_privilege( &mut self, - instance: MonitorInstance, + instance: SpiMonitorId, start_addr: u32, end_addr: u32, direction: PrivilegeDirection, @@ -47,10 +47,10 @@ pub trait Monitor { ) -> BootResult<()>; /// Read number of configured address privilege regions. - fn read_region_count(&self, instance: MonitorInstance) -> BootResult; + fn read_region_count(&self, instance: SpiMonitorId) -> BootResult; /// Read monitor status snapshot. - fn read_status(&self, instance: MonitorInstance) -> BootResult; + fn read_status(&self, instance: SpiMonitorId) -> BootResult; /// Check if policy write-lock is supported by this monitor. fn supports_policy_lock(&self) -> bool { @@ -60,7 +60,7 @@ pub trait Monitor { /// Lock policy tables to prevent further modification. /// /// Returns error if not supported by hardware. - fn lock_policy(&mut self, _instance: MonitorInstance) -> BootResult<()> { + fn lock_policy(&mut self, _instance: SpiMonitorId) -> BootResult<()> { if !self.supports_policy_lock() { return Err(BootError::LockedOutFromMonitor); } @@ -70,7 +70,7 @@ pub trait Monitor { /// Verify that policy is locked (if supported). /// /// No-op if policy lock is not supported. - fn verify_policy_locked(&self, instance: MonitorInstance) -> BootResult<()> { + fn verify_policy_locked(&self, instance: SpiMonitorId) -> BootResult<()> { if !self.supports_policy_lock() { return Ok(()); } diff --git a/target/ast10x0/peripherals/spimonitor/types.rs b/target/ast10x0/peripherals/spimonitor/types.rs index 4be2d823..e66c9ea2 100644 --- a/target/ast10x0/peripherals/spimonitor/types.rs +++ b/target/ast10x0/peripherals/spimonitor/types.rs @@ -28,7 +28,10 @@ pub enum PrivilegeOp { /// Mirrors Zephyr's `spim_passthrough_config`. #[derive(Clone, Copy, Debug, Eq, PartialEq)] pub enum PassthroughMode { + /// Enable single-bit passthrough. Enabled, + /// Enable multi-bit passthrough. + MultiEnabled, Disabled, } @@ -52,7 +55,7 @@ pub enum LockState { /// High-level monitor lifecycle stage. #[derive(Clone, Copy, Debug, Eq, PartialEq)] -pub enum MonitorState { +pub enum SpiMonitorState { Uninitialized, Configured, Locked, @@ -127,8 +130,15 @@ impl ViolationLogEntry { #[derive(Clone, Copy, Debug, Eq, PartialEq)] pub enum SpiMonitorError { InvalidRegion, + InvalidAddress, + InvalidLength, InvalidSlot, + InvalidLogBuffer, + UnsupportedCommand(u8), + NoCommandSlot, Locked, + LockFailed, + VerificationFailed, InvalidTransition, } @@ -143,7 +153,7 @@ pub type Result = core::result::Result; /// /// Maps to SPIPF1-4 hardware blocks on AST10x0. #[derive(Clone, Copy, Debug, Eq, PartialEq)] -pub enum MonitorInstance { +pub enum SpiMonitorId { /// SPIPF1 (0x7E79_1000) - typically BMC/SMC flash Spim0, /// SPIPF2 (0x7E79_2000) - typically BMC dual flash @@ -186,7 +196,7 @@ impl From for MuxSelect { /// Monitor status snapshot at a point in time. #[derive(Clone, Copy, Debug, Eq, PartialEq)] -pub struct MonitorStatus { +pub struct SpiMonitorStatus { /// Current mux routing pub mux: MuxSelect, /// Whether policy tables are write-locked diff --git a/target/ast10x0/target.ld.tmpl b/target/ast10x0/target.ld.tmpl index 9aede6be..6f5ce8bf 100644 --- a/target/ast10x0/target.ld.tmpl +++ b/target/ast10x0/target.ld.tmpl @@ -33,10 +33,17 @@ MEMORY /* Internal Flash */ FLASH(rx) : ORIGIN = {{kernel.flash_start_address | hex}}, LENGTH = {{kernel.flash_size_bytes}} - /* Internal SRAM */ + /* Internal SRAM (cached window: 0x00000000 – 0x0009FFFF) */ RAM(rwx) : ORIGIN = {{kernel.ram_start_address | hex}}, LENGTH = {{kernel.ram_size_bytes}} + /* Non-cached SRAM window (hardware alias of the top 128 KB of SRAM, + * 0x000A0000 – 0x000BFFFF). DMA masters on the AST1060 see coherent + * data only through this window. Statics tagged with + * #[unsafe(link_section = ".ram_nc")] must be placed here. + */ + RAM_NC(rw) : ORIGIN = 0x000A0000, LENGTH = 128K + /* Each memory region above has an associated .*.unused_space section that * overlays the unused space at the end of the memory segment. These segments * are used by pw_bloat.bloaty_config to create the utilization data source @@ -214,6 +221,26 @@ SECTIONS . = ABSOLUTE(ORIGIN(RAM) + LENGTH(RAM)); } >RAM + /* Non-cached SRAM: DMA-visible buffers that bypass the AST1060 data cache. + * All statics tagged #[unsafe(link_section = ".ram_nc")] land here. + */ + .ram_nc (NOLOAD) : ALIGN(16) + { + __ram_nc_start = .; + *(.ram_nc) + *(.ram_nc*) + . = ALIGN(16); + __ram_nc_end = .; + } >RAM_NC + + /* Represents unused space in the RAM_NC segment. This MUST be the last + * section assigned to the RAM_NC region. + */ + .RAM_NC.unused_space (NOLOAD) : ALIGN(4) + { + . = ABSOLUTE(ORIGIN(RAM_NC) + LENGTH(RAM_NC)); + } >RAM_NC + /* Discard unwind info. */ .ARM.extab 0x0 (INFO) : { diff --git a/target/ast10x0/tests/interrupts/kernel/system.json5 b/target/ast10x0/tests/interrupts/kernel/system.json5 index fc896be8..5f67cd55 100644 --- a/target/ast10x0/tests/interrupts/kernel/system.json5 +++ b/target/ast10x0/tests/interrupts/kernel/system.json5 @@ -15,7 +15,7 @@ flash_start_address: 0x00000500, // After vector table flash_size_bytes: 262144, // 256KB for kernel code (in RAM) ram_start_address: 0x00040500, // RAM starts after code - ram_size_bytes: 393216, // 384KB for data + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) interrupt_table: { table: { "42": "test_interrupts::test_interrupt_handler", diff --git a/target/ast10x0/tests/peripherals/gpio/gpio_irq/BUILD.bazel b/target/ast10x0/tests/peripherals/gpio/gpio_irq/BUILD.bazel new file mode 100644 index 00000000..c2ae98ac --- /dev/null +++ b/target/ast10x0/tests/peripherals/gpio/gpio_irq/BUILD.bazel @@ -0,0 +1,96 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@pigweed//pw_kernel/tooling:rust_app.bzl", "rust_app") +load("@pigweed//pw_kernel/tooling:system_image.bzl", "system_image") +load("@pigweed//pw_kernel/tooling:target_codegen.bzl", "target_codegen") +load("@pigweed//pw_kernel/tooling:target_linker_script.bzl", "target_linker_script") +load("@pigweed//pw_kernel/tooling/panic_detector:rust_binary_no_panics_test.bzl", "rust_binary_no_panics_test") +load("@rules_rust//rust:defs.bzl", "rust_binary") +load("//target/ast10x0:defs.bzl", "TARGET_COMPATIBLE_WITH", "system_image_test") + +package(default_visibility = ["//visibility:public"]) + +filegroup( + name = "system_config", + srcs = ["system.json5"], +) + +target_codegen( + name = "codegen", + arch = "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + system_config = ":system_config", + target_compatible_with = TARGET_COMPATIBLE_WITH, +) + +target_linker_script( + name = "linker_script", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + template = "//target/ast10x0:linker_script_template", +) + +rust_binary( + name = "target", + srcs = ["target.rs"], + edition = "2024", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + deps = [ + ":codegen", + ":linker_script", + "//target/ast10x0:entry", + "//target/ast10x0/peripherals", + "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + "@pigweed//pw_kernel/kernel", + "@pigweed//pw_kernel/subsys/console:console_backend", + "@pigweed//pw_kernel/target:target_common", + "@pigweed//pw_kernel/userspace", + ], +) + +rust_app( + name = "gpio_irq_server", + srcs = ["gpio_irq_server_main.rs"], + codegen_crate_name = "app_gpio_irq_server", + edition = "2024", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + deps = [ + "//target/ast10x0/peripherals", + "@ast1060_pac", + "@pigweed//pw_kernel/userspace", + "@pigweed//pw_log/rust:pw_log", + "@pigweed//pw_status/rust:pw_status", + ], +) + +system_image( + name = "gpio_irq", + apps = [ + ":gpio_irq_server", + ], + kernel = ":target", + platform = "//target/ast10x0", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, +) + +system_image_test( + name = "gpio_irq_test", + image = ":gpio_irq", + tags = ["hardware"], + target_compatible_with = select({ + "//target/ast10x0:qemu_enabled": ["@platforms//:incompatible"], + "//conditions:default": [], + }), +) + +rust_binary_no_panics_test( + name = "no_panics_test", + binary = ":gpio_irq", + tags = ["kernel"], +) diff --git a/target/ast10x0/tests/peripherals/gpio/gpio_irq/README.md b/target/ast10x0/tests/peripherals/gpio/gpio_irq/README.md new file mode 100644 index 00000000..361a849d --- /dev/null +++ b/target/ast10x0/tests/peripherals/gpio/gpio_irq/README.md @@ -0,0 +1,25 @@ + + + +# AST10x0 GPIO Interrupt Configuration Test + +This hardware-only test follows the SGPIOM IRQ test's wait-on-object model. + +The kernel applies the GPIOA0 pin mux and starts one userspace app. The app: + +1. Owns the GPIO register block at `0x7e780000`. +2. Configures GPIOA0 as a pulled-down input. +3. Registers GPIO IRQ 11 with a wait group. +4. Clears pending status and enables both-edge interrupts. +5. Acknowledges the kernel interrupt object. +6. Verifies GPIOA0 in the interrupt-enable and sensitivity-type-2 registers. + +The test validates interrupt configuration without requiring an external edge. +The kernel emits `TEST_RESULT:PASS` or `TEST_RESULT:FAIL` at shutdown. + +## Build + +```sh +bazelisk build --config=k_ast1060_evb \ + //target/ast10x0/tests/peripherals/gpio/gpio_irq:gpio_irq +``` diff --git a/target/ast10x0/tests/peripherals/gpio/gpio_irq/gpio_irq_server_main.rs b/target/ast10x0/tests/peripherals/gpio/gpio_irq/gpio_irq_server_main.rs new file mode 100644 index 00000000..95cea55f --- /dev/null +++ b/target/ast10x0/tests/peripherals/gpio/gpio_irq/gpio_irq_server_main.rs @@ -0,0 +1,85 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! GPIOA0 interrupt configuration test (userspace). + +#![no_main] +#![no_std] + +use app_gpio_irq_server::{handle, signals}; +use ast10x0_peripherals::gpio::{gpioa, GpioExt, InterruptMode}; +use pw_status::Error; +use userspace::entry; +use userspace::syscall; + +const GPIOA0_MASK: u32 = 1; + +macro_rules! fail { + ($($arg:tt)*) => {{ + pw_log::error!($($arg)*); + let _ = syscall::debug_shutdown(Err(Error::Unknown)); + #[expect(clippy::empty_loop)] + loop {} + }}; +} + +#[entry] +fn entry() { + // SAFETY: this process exclusively owns the GPIO device mapping declared + // in system.json5. + let gpioa = unsafe { gpioa::GPIOA::new_global().split() }; + let mut pa0 = gpioa.pa0.into_pull_down_input(); + + if syscall::wait_group_add( + handle::WG, + handle::GPIO_IRQ, + signals::GPIO, + handle::GPIO_IRQ as usize, + ) + .is_err() + { + fail!("wait_group_add failed"); + } + + pa0.clear_interrupt(); + pa0.set_interrupt_mode(InterruptMode::EdgeBoth); + + if syscall::interrupt_ack(handle::GPIO_IRQ, signals::GPIO).is_err() { + fail!("initial interrupt_ack failed"); + } + + // SAFETY: the GPIO register block is mapped exclusively into this process. + let registers = unsafe { &*ast1060_pac::Gpio::ptr() }; + let int_en = registers.gpio008().read().bits(); + let sensitivity2 = registers.gpio014().read().bits(); + let int_status = registers.gpio018().read().bits(); + + pw_log::info!( + "GPIO IRQ state: int_en=0x{:08x} sensitivity2=0x{:08x} status=0x{:08x}", + int_en as u32, + sensitivity2 as u32, + int_status as u32, + ); + + if int_en & GPIOA0_MASK != GPIOA0_MASK { + fail!( + "GPIOA0 interrupt not enabled: int_en=0x{:08x}", + int_en as u32 + ); + } + if sensitivity2 & GPIOA0_MASK != GPIOA0_MASK { + fail!( + "GPIOA0 both-edge sensitivity not configured: sensitivity2=0x{:08x}", + sensitivity2 as u32 + ); + } + + pw_log::info!("PASS: GPIO IRQ configuration verified"); + let _ = syscall::debug_shutdown(Ok(())); + loop {} +} + +#[panic_handler] +fn panic(_info: &core::panic::PanicInfo) -> ! { + loop {} +} diff --git a/target/ast10x0/tests/peripherals/gpio/gpio_irq/system.json5 b/target/ast10x0/tests/peripherals/gpio/gpio_irq/system.json5 new file mode 100644 index 00000000..d87e7afc --- /dev/null +++ b/target/ast10x0/tests/peripherals/gpio/gpio_irq/system.json5 @@ -0,0 +1,63 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +// AST10x0 GPIO interrupt configuration image. +// +// The userspace app owns the GPIO controller register block, configures GPIOA0 +// for both-edge interrupts, registers IRQ 11 with a wait group, and verifies +// the interrupt enable and sensitivity registers. +{ + arch: { + type: "armv7m", + vector_table_start_address: 0x00000000, + vector_table_size_bytes: 2048, + }, + kernel: { + flash_start_address: 0x00000800, + flash_size_bytes: 63488, + ram_start_address: 0x00060000, + ram_size_bytes: 131072, + }, + apps: [ + { + name: "gpio_irq_server", + flash_size_bytes: 32768, + processes: [ + { + name: "gpio_irq_process", + ram_size_bytes: 65536, + objects: [ + { + name: "wg", + type: "wait_group", + }, + { + // ast1060_pac::Interrupt::gpio = 11. + name: "gpio_irq", + type: "interrupt", + irqs: [ + { + name: "gpio", + number: 11, + }, + ], + }, + { + type: "thread", + name: "gpio_irq_thread", + kernel_stack_size_bytes: 4096, + }, + ], + memory_mappings: [ + { + name: "gpio_regs", + type: "device", + start_address: 0x7e780000, + size_bytes: 0x1000, + }, + ], + }, + ], + }, + ], +} diff --git a/target/ast10x0/tests/peripherals/gpio/gpio_irq/target.rs b/target/ast10x0/tests/peripherals/gpio/gpio_irq/target.rs new file mode 100644 index 00000000..09133de8 --- /dev/null +++ b/target/ast10x0/tests/peripherals/gpio/gpio_irq/target.rs @@ -0,0 +1,43 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! AST10x0 GPIO interrupt bring-up - kernel side. + +#![no_std] +#![no_main] + +use ast10x0_peripherals::scu::{pinctrl, ScuRegisters}; +use console_backend::console_backend_write_all; +use entry as _; +use target_common::{declare_target, TargetInterface}; + +pub struct Target {} + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 GPIO IRQ Bringup"; + + fn main() -> ! { + // SAFETY: single call at boot with exclusive access to SCU global registers. + unsafe { + let scu = ScuRegisters::new_global_unlocked(); + scu.apply_pinctrl_group(pinctrl::PINCTRL_GPIOA0); + } + + codegen::start(); + #[expect(clippy::empty_loop)] + loop {} + } + + fn shutdown(code: u32) -> ! { + let sentinel: &[u8] = if code == 0 { + b"TEST_RESULT:PASS\n" + } else { + b"TEST_RESULT:FAIL\n" + }; + let _ = console_backend_write_all(sentinel); + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/peripherals/gpio/gpio_smoke/BUILD.bazel b/target/ast10x0/tests/peripherals/gpio/gpio_smoke/BUILD.bazel new file mode 100644 index 00000000..f246cc0f --- /dev/null +++ b/target/ast10x0/tests/peripherals/gpio/gpio_smoke/BUILD.bazel @@ -0,0 +1,70 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@pigweed//pw_kernel/tooling:system_image.bzl", "system_image") +load("@pigweed//pw_kernel/tooling:target_codegen.bzl", "target_codegen") +load("@pigweed//pw_kernel/tooling:target_linker_script.bzl", "target_linker_script") +load("@rules_rust//rust:defs.bzl", "rust_binary") +load("//target/ast10x0:defs.bzl", "TARGET_COMPATIBLE_WITH", "system_image_test") + +filegroup( + name = "system_config", + srcs = ["system.json5"], +) + +target_codegen( + name = "codegen", + arch = "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + system_config = ":system_config", + target_compatible_with = TARGET_COMPATIBLE_WITH, +) + +target_linker_script( + name = "linker_script", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + template = "//target/ast10x0:linker_script_template", +) + +rust_binary( + name = "target", + srcs = ["target.rs"], + edition = "2024", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + deps = [ + ":codegen", + ":linker_script", + "//target/ast10x0:entry", + "//target/ast10x0/peripherals", + "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + "@pigweed//pw_kernel/kernel", + "@pigweed//pw_kernel/subsys/console:console_backend", + "@pigweed//pw_kernel/target:target_common", + "@pigweed//pw_log/rust:pw_log", + "@rust_crates//:embedded-hal", + ], +) + +system_image( + name = "gpio_smoke", + kernel = ":target", + platform = "//target/ast10x0", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + userspace = False, + visibility = ["//visibility:public"], +) + +system_image_test( + name = "gpio_smoke_test", + image = ":gpio_smoke", + tags = ["hardware"], + target_compatible_with = select({ + "//target/ast10x0:qemu_enabled": ["@platforms//:incompatible"], + "//conditions:default": [], + }), + visibility = ["//visibility:public"], +) diff --git a/target/ast10x0/tests/peripherals/gpio/gpio_smoke/system.json5 b/target/ast10x0/tests/peripherals/gpio/gpio_smoke/system.json5 new file mode 100644 index 00000000..42ae4435 --- /dev/null +++ b/target/ast10x0/tests/peripherals/gpio/gpio_smoke/system.json5 @@ -0,0 +1,17 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +// AST10x0 kernel-only GPIOA smoke test configuration. +{ + arch: { + type: "armv7m", + vector_table_start_address: 0x00000000, + vector_table_size_bytes: 1280, + }, + kernel: { + flash_start_address: 0x00000500, + flash_size_bytes: 262144, + ram_start_address: 0x00040500, + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) + }, +} diff --git a/target/ast10x0/tests/peripherals/gpio/gpio_smoke/target.rs b/target/ast10x0/tests/peripherals/gpio/gpio_smoke/target.rs new file mode 100644 index 00000000..15e9192b --- /dev/null +++ b/target/ast10x0/tests/peripherals/gpio/gpio_smoke/target.rs @@ -0,0 +1,91 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! AST10x0 GPIOA smoke test target. + +#![no_std] +#![no_main] + +use ast10x0_peripherals::gpio::{gpioa, ActiveLow, GpioExt}; +use ast10x0_peripherals::scu::{pinctrl, ScuRegisters}; +use console_backend::console_backend_write_all; +use embedded_hal::digital::{InputPin, OutputPin, StatefulOutputPin}; +use target_common::{declare_target, TargetInterface}; +use {console_backend as _, entry as _}; + +pub struct Target {} + +fn run_gpioa_test() -> bool { + // SAFETY: this kernel-only test is the sole owner of the SCU and GPIO peripherals. + let gpioa = unsafe { + let scu = ScuRegisters::new_global_unlocked(); + scu.apply_pinctrl_group(pinctrl::PINCTRL_GPIOA0); + scu.apply_pinctrl_group(pinctrl::PINCTRL_GPIOA1); + scu.apply_pinctrl_group(pinctrl::PINCTRL_GPIOA3); + scu.apply_pinctrl_group(pinctrl::PINCTRL_GPIOA4); + gpioa::GPIOA::new_global().split() + }; + pw_log::info!("=== AST10x0 GPIOA smoke test ==="); + + // AST1060 does not provide internal pull-up or pull-down control for these + // GPIO inputs. Their sampled levels are determined by external connections, + // so either 0 or 1 is valid in this configuration test. + let mut pa0 = gpioa.pa0.into_pull_down_input(); + let pa0_level = pa0.is_high().unwrap_or(false); + pw_log::info!( + "GPIOA0 input configured; sampled level={}", + pa0_level as u32 + ); + + let mut pa1 = gpioa.pa1.into_pull_up_input(); + let pa1_level = pa1.is_high().unwrap_or(false); + pw_log::info!( + "GPIOA1 input configured; sampled level={}", + pa1_level as u32 + ); + + let mut pa3 = gpioa.pa3.into_open_drain_output::(); + if pa3.set_low().is_err() || !pa3.is_set_low().unwrap_or(false) { + pw_log::error!("GPIOA3 open-drain output did not latch low"); + return false; + } + pw_log::info!("GPIOA3 open-drain output latched low"); + + if pa3.set_high().is_err() || !pa3.is_set_high().unwrap_or(false) { + pw_log::error!("GPIOA3 open-drain output did not latch high"); + return false; + } + pw_log::info!("GPIOA3 open-drain output latched high"); + + let mut pa4 = gpioa.pa4.into_push_pull_output(); + if pa4.set_low().is_err() || !pa4.is_set_low().unwrap_or(false) { + pw_log::error!("GPIOA4 push-pull output did not latch low"); + return false; + } + pw_log::info!("GPIOA4 push-pull output latched low"); + + if pa4.set_high().is_err() || !pa4.is_set_high().unwrap_or(false) { + pw_log::error!("GPIOA4 push-pull output did not latch high"); + return false; + } + pw_log::info!("GPIOA4 push-pull output latched high"); + true +} + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 GPIOA smoke test"; + + fn main() -> ! { + let sentinel = if run_gpioa_test() { + b"TEST_RESULT:PASS\n" + } else { + b"TEST_RESULT:FAIL\n" + }; + let _ = console_backend_write_all(sentinel); + + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/peripherals/gpio/gpioi_loopback/BUILD.bazel b/target/ast10x0/tests/peripherals/gpio/gpioi_loopback/BUILD.bazel new file mode 100644 index 00000000..23a6f6b3 --- /dev/null +++ b/target/ast10x0/tests/peripherals/gpio/gpioi_loopback/BUILD.bazel @@ -0,0 +1,71 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@pigweed//pw_kernel/tooling:system_image.bzl", "system_image") +load("@pigweed//pw_kernel/tooling:target_codegen.bzl", "target_codegen") +load("@pigweed//pw_kernel/tooling:target_linker_script.bzl", "target_linker_script") +load("@rules_rust//rust:defs.bzl", "rust_binary") +load("//target/ast10x0:defs.bzl", "TARGET_COMPATIBLE_WITH", "system_image_test") + +filegroup( + name = "system_config", + srcs = ["system.json5"], +) + +target_codegen( + name = "codegen", + arch = "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + system_config = ":system_config", + target_compatible_with = TARGET_COMPATIBLE_WITH, +) + +target_linker_script( + name = "linker_script", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + template = "//target/ast10x0:linker_script_template", +) + +rust_binary( + name = "target", + srcs = ["target.rs"], + edition = "2024", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + deps = [ + ":codegen", + ":linker_script", + "//target/ast10x0:entry", + "//target/ast10x0/peripherals", + "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + "@pigweed//pw_kernel/kernel", + "@pigweed//pw_kernel/subsys/console:console_backend", + "@pigweed//pw_kernel/target:target_common", + "@pigweed//pw_log/rust:pw_log", + "@rust_crates//:cortex-m", + "@rust_crates//:embedded-hal", + ], +) + +system_image( + name = "gpioi_loopback", + kernel = ":target", + platform = "//target/ast10x0", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + userspace = False, + visibility = ["//visibility:public"], +) + +system_image_test( + name = "gpioi_loopback_test", + image = ":gpioi_loopback", + tags = ["hardware"], + target_compatible_with = select({ + "//target/ast10x0:qemu_enabled": ["@platforms//:incompatible"], + "//conditions:default": [], + }), + visibility = ["//visibility:public"], +) diff --git a/target/ast10x0/tests/peripherals/gpio/gpioi_loopback/system.json5 b/target/ast10x0/tests/peripherals/gpio/gpioi_loopback/system.json5 new file mode 100644 index 00000000..80484991 --- /dev/null +++ b/target/ast10x0/tests/peripherals/gpio/gpioi_loopback/system.json5 @@ -0,0 +1,17 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +// AST10x0 kernel-only GPIOI output and loopback test configuration. +{ + arch: { + type: "armv7m", + vector_table_start_address: 0x00000000, + vector_table_size_bytes: 1280, + }, + kernel: { + flash_start_address: 0x00000500, + flash_size_bytes: 262144, + ram_start_address: 0x00040500, + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) + }, +} diff --git a/target/ast10x0/tests/peripherals/gpio/gpioi_loopback/target.rs b/target/ast10x0/tests/peripherals/gpio/gpioi_loopback/target.rs new file mode 100644 index 00000000..dca15d63 --- /dev/null +++ b/target/ast10x0/tests/peripherals/gpio/gpioi_loopback/target.rs @@ -0,0 +1,165 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! AST10x0 GPIOI loopback test target. + +#![no_std] +#![no_main] + +use ast10x0_peripherals::gpio::{gpioi, GpioExt, InterruptMode}; +use ast10x0_peripherals::scu::{pinctrl, ScuRegisters}; +use console_backend::console_backend_write_all; +use embedded_hal::digital::{InputPin, OutputPin}; +use target_common::{declare_target, TargetInterface}; +use {console_backend as _, entry as _}; + +pub struct Target {} + +const GPIO_LEVEL_DELAY_CYCLES: u32 = 200_000_000; + +fn test_gpio_loopback() -> bool { + // The loopback requires a jumper between the fixture board's exposed + // GPIOI0/I2C2 SCL pin and GPIOI1/I2C2 SDA pin. + let gpioi = unsafe { + let scu = ScuRegisters::new_global_unlocked(); + scu.apply_pinctrl_group(pinctrl::PINCTRL_GPIOI0); + scu.apply_pinctrl_group(pinctrl::PINCTRL_GPIOI1); + gpioi::GPIOI::new_global().split() + }; + pw_log::info!("--- GPIOI loopback test ---"); + + let mut output = gpioi.pi0.into_push_pull_output(); + let mut input = gpioi.pi1.into_pull_down_input(); + + let interrupt_cases = [ + ("level-high", InterruptMode::LevelHigh, false, true), + ("level-low", InterruptMode::LevelLow, true, false), + ("rising-edge", InterruptMode::EdgeRising, false, true), + ("falling-edge", InterruptMode::EdgeFalling, true, false), + ("both-edge rising", InterruptMode::EdgeBoth, false, true), + ("both-edge falling", InterruptMode::EdgeBoth, true, false), + ]; + + for (name, mode, initial_high, trigger_high) in interrupt_cases { + pw_log::info!("=== Testing GPIOI1 {} interrupt ===", name as &str); + + input.set_interrupt_mode(InterruptMode::Disabled); + input.clear_interrupt(); + + let initial_result = if initial_high { + output.set_high() + } else { + output.set_low() + }; + if initial_result.is_err() { + pw_log::error!("{}: GPIOI0 could not drive initial level", name as &str); + return false; + } + let initial_level = if initial_high { "high" } else { "low" }; + pw_log::info!( + "{}: GPIOI0 as output drive initial level {}", + name as &str, + initial_level as &str + ); + cortex_m::asm::delay(GPIO_LEVEL_DELAY_CYCLES); + + let input_matches = if initial_high { + input.is_high().unwrap_or(false) + } else { + input.is_low().unwrap_or(false) + }; + if !input_matches { + pw_log::error!("{}: input and output GPIO level mismatch", name as &str); + return false; + } + pw_log::info!( + "{}: GPIOI1 as input read initial level {}", + name as &str, + initial_level as &str + ); + + input.clear_interrupt(); + input.set_interrupt_mode(mode); + if input.get_interrupt_status() { + pw_log::error!("{}: interrupt pending before trigger", name as &str); + input.set_interrupt_mode(InterruptMode::Disabled); + return false; + } + + let trigger_result = if trigger_high { + output.set_high() + } else { + output.set_low() + }; + if trigger_result.is_err() { + pw_log::error!("{}: GPIOI0 could not drive trigger level", name as &str); + input.set_interrupt_mode(InterruptMode::Disabled); + return false; + } + let trigger_level = if trigger_high { "high" } else { "low" }; + pw_log::info!( + "{}: GPIOI0 as output drive trigger level {}", + name as &str, + trigger_level as &str + ); + cortex_m::asm::delay(GPIO_LEVEL_DELAY_CYCLES); + + let input_matches = if trigger_high { + input.is_high().unwrap_or(false) + } else { + input.is_low().unwrap_or(false) + }; + if !input_matches { + pw_log::error!("{}: input and output GPIO level mismatch", name as &str); + input.set_interrupt_mode(InterruptMode::Disabled); + return false; + } + pw_log::info!( + "{}: GPIOI1 as input read trigger level {}", + name as &str, + trigger_level as &str + ); + + if !input.get_interrupt_status() { + pw_log::error!("{}: interrupt status was not set", name as &str); + input.set_interrupt_mode(InterruptMode::Disabled); + return false; + } + pw_log::info!("GPIOI1 {} interrupt status set", name as &str); + + // Disable level-sensitive modes before clearing so an active level + // cannot immediately reassert the status bit. + input.set_interrupt_mode(InterruptMode::Disabled); + input.clear_interrupt(); + if input.get_interrupt_status() { + pw_log::error!("{}: interrupt status did not clear", name as &str); + return false; + } + } + + true +} + +fn run_gpioi_loopback_test() -> bool { + pw_log::info!("=== AST10x0 GPIOI loopback test ==="); + // connect a jumper between the exposed GPIOI0/I2C2 SCL and GPIOI1/I2C2 SDA pins to verify the loopback. + test_gpio_loopback() +} + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 GPIOI loopback test"; + + fn main() -> ! { + let sentinel = if run_gpioi_loopback_test() { + b"TEST_RESULT:PASS\n" + } else { + b"TEST_RESULT:FAIL\n" + }; + let _ = console_backend_write_all(sentinel); + + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/peripherals/hace/hace_aes/BUILD.bazel b/target/ast10x0/tests/peripherals/hace/hace_aes/BUILD.bazel new file mode 100644 index 00000000..206ce4e2 --- /dev/null +++ b/target/ast10x0/tests/peripherals/hace/hace_aes/BUILD.bazel @@ -0,0 +1,88 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@pigweed//pw_kernel/tooling:system_image.bzl", "system_image", "system_image_test") +load("@pigweed//pw_kernel/tooling:target_codegen.bzl", "target_codegen") +load("@pigweed//pw_kernel/tooling:target_linker_script.bzl", "target_linker_script") +load("@pigweed//pw_kernel/tooling/panic_detector:rust_binary_no_panics_test.bzl", "rust_binary_no_panics_test") +load("@rules_rust//rust:defs.bzl", "rust_binary") +load("//target/ast10x0:defs.bzl", "TARGET_COMPATIBLE_WITH") + +system_image( + name = "hace_aes", + kernel = ":target", + platform = "//target/ast10x0", + system_config = ":system_config", + tags = ["kernel"], + userspace = False, +) + +# HARDWARE-ONLY. Unlike hace_sha256, this test is tagged `hardware` so it runs +# only on the physical AST1060 EVB (`--config=k_ast1060_evb`) and is excluded +# from the QEMU config (`--config=virt_ast10x0` filters `-hardware`). Reason +# (goal.md §2.5, root-caused via stop-and-instrument): the upstream QEMU aspeed +# HACE model `hw/misc/aspeed_hace.c` implements hash only — `R_CRYPT_CMD` is a +# `LOG_UNIMP` stub that sets the completion IRQ without performing AES, so every +# AES KAT would falsely fail under QEMU regardless of port correctness. It still +# *builds* under both (no `do_not_build`), preserving compile + no_panics +# coverage; the NIST AES correctness gate runs on real silicon only until QEMU +# models the crypto path. +system_image_test( + name = "hace_aes_test", + image = ":hace_aes", + tags = ["hardware"], + target_compatible_with = TARGET_COMPATIBLE_WITH, +) + +rust_binary_no_panics_test( + name = "no_panics_test", + binary = ":hace_aes", + tags = ["kernel"], +) + +filegroup( + name = "system_config", + srcs = ["system.json5"], +) + +target_codegen( + name = "codegen", + arch = "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + system_config = ":system_config", + target_compatible_with = TARGET_COMPATIBLE_WITH, +) + +target_linker_script( + name = "linker_script", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + template = "//target/ast10x0:linker_script_template", +) + +rust_binary( + name = "target", + srcs = [ + "target.rs", + "vectors.rs", # included via include!("vectors.rs") + ], + edition = "2024", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + deps = [ + ":codegen", + ":linker_script", + "//hal/blocking", + "//target/ast10x0:config", + "//target/ast10x0:entry", + "//target/ast10x0/board:ast10x0_board", + "//target/ast10x0/peripherals", + "@ast1060_pac", + "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + "@pigweed//pw_kernel/kernel", + "@pigweed//pw_kernel/subsys/console:console_backend", + "@pigweed//pw_kernel/target:target_common", + "@pigweed//pw_log/rust:pw_log", + "@rust_crates//:zerocopy", + ], +) diff --git a/target/ast10x0/tests/peripherals/hace/hace_aes/system.json5 b/target/ast10x0/tests/peripherals/hace/hace_aes/system.json5 new file mode 100644 index 00000000..9045d344 --- /dev/null +++ b/target/ast10x0/tests/peripherals/hace/hace_aes/system.json5 @@ -0,0 +1,18 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +// AST10x0 HACE AES test configuration. +// Identical layout to the hace_sha256 kernel-only peripheral test. +{ + arch: { + type: "armv7m", + vector_table_start_address: 0x00000000, + vector_table_size_bytes: 1280, // 0x500 (320 vectors) + }, + kernel: { + flash_start_address: 0x00000500, // After vector table + flash_size_bytes: 262144, // 256KB for kernel code (in RAM) + ram_start_address: 0x00040500, // RAM starts after code + ram_size_bytes: 391936, // 383KB for data (ends at 0xA0000, no overlap with RAM_NC) + }, +} diff --git a/target/ast10x0/tests/peripherals/hace/hace_aes/target.rs b/target/ast10x0/tests/peripherals/hace/hace_aes/target.rs new file mode 100644 index 00000000..60fc8d8b --- /dev/null +++ b/target/ast10x0/tests/peripherals/hace/hace_aes/target.rs @@ -0,0 +1,241 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +#![no_std] +#![no_main] + +//! AST10x0 HACE AES KAT suite. +//! +//! Verifies AES-128/256 ECB/CBC encrypt+decrypt against NIST SP 800-38A +//! vectors, plus InvalidInput enforcement for non-block-size input and a +//! 4 KB CBC round-trip path. + +use ast10x0_board::{Ast10x0Board, Ast10x0BoardDescriptor}; +use ast10x0_peripherals::hace::{AesCipher, HaceDevice, HaceError}; +use codegen as _; +use console_backend::console_backend_write_all; +use entry as _; +use target_common::{declare_target, TargetInterface}; + +pub struct Target {} + +const ERR_AES_FAILED: &str = "hace aes op failed"; +const ERR_VERIFY_FAILED: &str = "hace aes mismatch"; +const ERR_A4: &str = "hace aes delta-A4 not enforced"; + +// DMA scratch buffers. Static RAM is required for SG-DMA access. +static mut AES_IN: [u8; 4096] = [0u8; 4096]; +static mut AES_OUT: [u8; 4096] = [0u8; 4096]; + +#[inline] +fn pat(i: usize) -> u8 { + (i % 251) as u8 +} + +fn check(name: &str, actual: &[u8], expected: &[u8]) -> Result<(), &'static str> { + if actual != expected { + pw_log::error!("{}: mismatch", name as &str); + let a0 = u32::from_be_bytes([actual[0], actual[1], actual[2], actual[3]]); + let e0 = u32::from_be_bytes([expected[0], expected[1], expected[2], expected[3]]); + let az = u32::from_be_bytes([ + actual[actual.len() - 4], + actual[actual.len() - 3], + actual[actual.len() - 2], + actual[actual.len() - 1], + ]); + pw_log::error!( + " actual[0..4]={:08x} actual[last4]={:08x} expected[0..4]={:08x}", + a0 as u32, + az as u32, + e0 as u32 + ); + return Err(ERR_VERIFY_FAILED); + } + pw_log::info!("{}: PASS", name as &str); + Ok(()) +} + +/// Run one AES KAT case and compare output bytes. +macro_rules! kat { + ($name:expr, $op:ident, $key:expr, $iv:expr, $inp:expr, $expected:expr) => {{ + pw_log::info!("case: {}", $name as &str); + let n = $inp.len(); + // SAFETY: serial single-threaded use of the DMA scratch buffers. + let inb = unsafe { &mut *core::ptr::addr_of_mut!(AES_IN) }; + let outb = unsafe { &mut *core::ptr::addr_of_mut!(AES_OUT) }; + inb[..n].copy_from_slice($inp); + outb[..n].fill(0); + // SAFETY: test runs once at boot with exclusive HACE access. + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + // SAFETY: single-threaded test; no concurrent HACE access. + let mut aes = unsafe { AesCipher::from_device(&mut device) }; + kat!(@call aes, $op, $key, $iv, inb, outb, n); + check($name, &outb[..n], $expected)?; + }}; + (@call $aes:ident, ecb_encrypt, $key:expr, $iv:expr, $inb:ident, $outb:ident, $n:expr) => { + $aes.ecb_encrypt($key, &$inb[..$n], &mut $outb[..$n]).map_err(|_| ERR_AES_FAILED)? + }; + (@call $aes:ident, ecb_decrypt, $key:expr, $iv:expr, $inb:ident, $outb:ident, $n:expr) => { + $aes.ecb_decrypt($key, &$inb[..$n], &mut $outb[..$n]).map_err(|_| ERR_AES_FAILED)? + }; + (@call $aes:ident, cbc_encrypt, $key:expr, $iv:expr, $inb:ident, $outb:ident, $n:expr) => { + $aes.cbc_encrypt($key, $iv, &$inb[..$n], &mut $outb[..$n]).map_err(|_| ERR_AES_FAILED)? + }; + (@call $aes:ident, cbc_decrypt, $key:expr, $iv:expr, $inb:ident, $outb:ident, $n:expr) => { + $aes.cbc_decrypt($key, $iv, &$inb[..$n], &mut $outb[..$n]).map_err(|_| ERR_AES_FAILED)? + }; +} + +include!("vectors.rs"); + +fn run_hace_aes_kats() -> Result<(), &'static str> { + pw_log::info!("=== AST10x0 HACE AES KAT suite ==="); + + let board = Ast10x0Board::new(Ast10x0BoardDescriptor { + pinctrl_groups: &[], + i2c_buses: &[], + }); + // SAFETY: test runs once at boot with exclusive access to the board. + unsafe { + let _ = board.init(); + }; + + // NIST SP 800-38A KATs. + kat!( + "ecb-128 encrypt", + ecb_encrypt, + &AES128_KEY, + &CBC_IV, + &PT64, + &ECB128_CT + ); + kat!( + "ecb-128 decrypt", + ecb_decrypt, + &AES128_KEY, + &CBC_IV, + &ECB128_CT, + &PT64 + ); + kat!( + "ecb-256 encrypt", + ecb_encrypt, + &AES256_KEY, + &CBC_IV, + &PT64, + &ECB256_CT + ); + kat!( + "ecb-256 decrypt", + ecb_decrypt, + &AES256_KEY, + &CBC_IV, + &ECB256_CT, + &PT64 + ); + kat!( + "cbc-128 encrypt", + cbc_encrypt, + &AES128_KEY, + &CBC_IV, + &PT64, + &CBC128_CT + ); + kat!( + "cbc-128 decrypt", + cbc_decrypt, + &AES128_KEY, + &CBC_IV, + &CBC128_CT, + &PT64 + ); + kat!( + "cbc-256 encrypt", + cbc_encrypt, + &AES256_KEY, + &CBC_IV, + &PT64, + &CBC256_CT + ); + kat!( + "cbc-256 decrypt", + cbc_decrypt, + &AES256_KEY, + &CBC_IV, + &CBC256_CT, + &PT64 + ); + + // Non-block-size input must return InvalidInput. + { + pw_log::info!("case: {}", "delta-A4 reject 17B" as &str); + let inb = unsafe { &mut *core::ptr::addr_of_mut!(AES_IN) }; + let outb = unsafe { &mut *core::ptr::addr_of_mut!(AES_OUT) }; + for k in 0..17 { + inb[k] = pat(k); + } + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + let mut aes = unsafe { AesCipher::from_device(&mut device) }; + match aes.ecb_encrypt(&AES128_KEY, &inb[..17], &mut outb[..17]) { + Err(HaceError::InvalidInput) => pw_log::info!("delta-A4 reject 17B: PASS"), + _ => return Err(ERR_A4), + } + } + + // Large-buffer CBC round-trip path. + { + const N: usize = 4096; + pw_log::info!("case: {} ({} B)", "cbc-256 roundtrip" as &str, N as u32); + let inb = unsafe { &mut *core::ptr::addr_of_mut!(AES_IN) }; + let ctb = unsafe { &mut *core::ptr::addr_of_mut!(AES_OUT) }; + for k in 0..N { + inb[k] = pat(k); + } + // Encrypt AES_IN -> AES_OUT. + { + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + let mut aes = unsafe { AesCipher::from_device(&mut device) }; + aes.cbc_encrypt(&AES256_KEY, &CBC_IV, &inb[..N], &mut ctb[..N]) + .map_err(|_| ERR_AES_FAILED)?; + } + // Decrypt AES_OUT back into AES_IN and verify. + { + let inb = unsafe { &mut *core::ptr::addr_of_mut!(AES_IN) }; + let ctb = unsafe { &*core::ptr::addr_of!(AES_OUT) }; + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + let mut aes = unsafe { AesCipher::from_device(&mut device) }; + aes.cbc_decrypt(&AES256_KEY, &CBC_IV, &ctb[..N], &mut inb[..N]) + .map_err(|_| ERR_AES_FAILED)?; + for k in 0..N { + if inb[k] != pat(k) { + pw_log::error!("cbc-256 roundtrip: plaintext mismatch"); + return Err(ERR_VERIFY_FAILED); + } + } + pw_log::info!("cbc-256 roundtrip: PASS"); + } + } + + pw_log::info!("=== AST10x0 HACE AES KAT suite complete ==="); + Ok(()) +} + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 HACE AES KAT"; + + fn main() -> ! { + let sentinel: &[u8] = match run_hace_aes_kats() { + Ok(()) => b"TEST_RESULT:PASS\n", + Err(error) => { + pw_log::error!("HACE AES KAT suite failed: {}", error as &str); + b"TEST_RESULT:FAIL\n" + } + }; + + let _ = console_backend_write_all(sentinel); + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/peripherals/hace/hace_aes/vectors.rs b/target/ast10x0/tests/peripherals/hace/hace_aes/vectors.rs new file mode 100644 index 00000000..899ad189 --- /dev/null +++ b/target/ast10x0/tests/peripherals/hace/hace_aes/vectors.rs @@ -0,0 +1,100 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 +// +// NIST AES known-answer vectors for the HACE AES KAT suite. +// +// Source (independent correctness authority — goal.md §2.4): NIST SP 800-38A +// (2001) Appendix F "Example Vectors", keys from FIPS-197. These are the +// canonical AES-128/256 ECB/CBC reference vectors; they do NOT depend on the +// pinned Zephyr driver (parity ⇒ NIST-identical by construction, but the gate +// is NIST). +// +// PT/CT below are the 4-block (64-byte) example message; for CBC the CT blocks +// are the chained result for that message with the listed IV. + +// FIPS-197 / SP 800-38A keys. +#[rustfmt::skip] +pub const AES128_KEY: [u8; 16] = [ + 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, + 0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c, +]; + +#[rustfmt::skip] +pub const AES256_KEY: [u8; 32] = [ + 0x60, 0x3d, 0xeb, 0x10, 0x15, 0xca, 0x71, 0xbe, + 0x2b, 0x73, 0xae, 0xf0, 0x85, 0x7d, 0x77, 0x81, + 0x1f, 0x35, 0x2c, 0x07, 0x3b, 0x61, 0x08, 0xd7, + 0x2d, 0x98, 0x10, 0xa3, 0x09, 0x14, 0xdf, 0xf4, +]; + +// CBC IV (SP 800-38A F.2). +#[rustfmt::skip] +pub const CBC_IV: [u8; 16] = [ + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, +]; + +// Shared 4-block plaintext (SP 800-38A F.*). +#[rustfmt::skip] +pub const PT64: [u8; 64] = [ + 0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96, + 0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a, + 0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c, + 0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51, + 0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11, + 0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef, + 0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17, + 0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10, +]; + +// ECB-AES128 (SP 800-38A F.1.1/F.1.2). +#[rustfmt::skip] +pub const ECB128_CT: [u8; 64] = [ + 0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60, + 0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97, + 0xf5, 0xd3, 0xd5, 0x85, 0x03, 0xb9, 0x69, 0x9d, + 0xe7, 0x85, 0x89, 0x5a, 0x96, 0xfd, 0xba, 0xaf, + 0x43, 0xb1, 0xcd, 0x7f, 0x59, 0x8e, 0xce, 0x23, + 0x88, 0x1b, 0x00, 0xe3, 0xed, 0x03, 0x06, 0x88, + 0x7b, 0x0c, 0x78, 0x5e, 0x27, 0xe8, 0xad, 0x3f, + 0x82, 0x23, 0x20, 0x71, 0x04, 0x72, 0x5d, 0xd4, +]; + +// ECB-AES256 (SP 800-38A F.1.5/F.1.6). +#[rustfmt::skip] +pub const ECB256_CT: [u8; 64] = [ + 0xf3, 0xee, 0xd1, 0xbd, 0xb5, 0xd2, 0xa0, 0x3c, + 0x06, 0x4b, 0x5a, 0x7e, 0x3d, 0xb1, 0x81, 0xf8, + 0x59, 0x1c, 0xcb, 0x10, 0xd4, 0x10, 0xed, 0x26, + 0xdc, 0x5b, 0xa7, 0x4a, 0x31, 0x36, 0x28, 0x70, + 0xb6, 0xed, 0x21, 0xb9, 0x9c, 0xa6, 0xf4, 0xf9, + 0xf1, 0x53, 0xe7, 0xb1, 0xbe, 0xaf, 0xed, 0x1d, + 0x23, 0x30, 0x4b, 0x7a, 0x39, 0xf9, 0xf3, 0xff, + 0x06, 0x7d, 0x8d, 0x8f, 0x9e, 0x24, 0xec, 0xc7, +]; + +// CBC-AES128 (SP 800-38A F.2.1/F.2.2), IV = CBC_IV. +#[rustfmt::skip] +pub const CBC128_CT: [u8; 64] = [ + 0x76, 0x49, 0xab, 0xac, 0x81, 0x19, 0xb2, 0x46, + 0xce, 0xe9, 0x8e, 0x9b, 0x12, 0xe9, 0x19, 0x7d, + 0x50, 0x86, 0xcb, 0x9b, 0x50, 0x72, 0x19, 0xee, + 0x95, 0xdb, 0x11, 0x3a, 0x91, 0x76, 0x78, 0xb2, + 0x73, 0xbe, 0xd6, 0xb8, 0xe3, 0xc1, 0x74, 0x3b, + 0x71, 0x16, 0xe6, 0x9e, 0x22, 0x22, 0x95, 0x16, + 0x3f, 0xf1, 0xca, 0xa1, 0x68, 0x1f, 0xac, 0x09, + 0x12, 0x0e, 0xca, 0x30, 0x75, 0x86, 0xe1, 0xa7, +]; + +// CBC-AES256 (SP 800-38A F.2.5/F.2.6), IV = CBC_IV. +#[rustfmt::skip] +pub const CBC256_CT: [u8; 64] = [ + 0xf5, 0x8c, 0x4c, 0x04, 0xd6, 0xe5, 0xf1, 0xba, + 0x77, 0x9e, 0xab, 0xfb, 0x5f, 0x7b, 0xfb, 0xd6, + 0x9c, 0xfc, 0x4e, 0x96, 0x7e, 0xdb, 0x80, 0x8d, + 0x67, 0x9f, 0x77, 0x7b, 0xc6, 0x70, 0x2c, 0x7d, + 0x39, 0xf2, 0x33, 0x69, 0xa9, 0xd9, 0xba, 0xcf, + 0xa5, 0x30, 0xe2, 0x63, 0x04, 0x23, 0x14, 0x61, + 0xb2, 0xeb, 0x05, 0xe2, 0xc3, 0x9b, 0xe9, 0xfc, + 0xda, 0x6c, 0x19, 0x07, 0x8c, 0x6a, 0x9d, 0x1b, +]; diff --git a/target/ast10x0/tests/peripherals/hace/hace_sha256/BUILD.bazel b/target/ast10x0/tests/peripherals/hace/hace_sha256/BUILD.bazel new file mode 100644 index 00000000..92b674c9 --- /dev/null +++ b/target/ast10x0/tests/peripherals/hace/hace_sha256/BUILD.bazel @@ -0,0 +1,82 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@pigweed//pw_kernel/tooling:system_image.bzl", "system_image", "system_image_test") +load("@pigweed//pw_kernel/tooling:target_codegen.bzl", "target_codegen") +load("@pigweed//pw_kernel/tooling:target_linker_script.bzl", "target_linker_script") +load("@pigweed//pw_kernel/tooling/panic_detector:rust_binary_no_panics_test.bzl", "rust_binary_no_panics_test") +load("@rules_rust//rust:defs.bzl", "rust_binary") +load("//target/ast10x0:defs.bzl", "TARGET_COMPATIBLE_WITH") + +system_image( + name = "hace_sha256", + kernel = ":target", + platform = "//target/ast10x0", + system_config = ":system_config", + tags = ["kernel"], + userspace = False, +) + +# Runs on BOTH the QEMU ast1030-evb machine (`--config=virt_ast10x0`, which models +# the HACE engine) and the physical EVB (`--config=k_ast1060_evb`). No `hardware` +# or `qemu_only` tag, so it survives both configs' test_tag_filters; standard +# TARGET_COMPATIBLE_WITH so it builds under the `:qemu` flag too. Mirrors the +# dual-running pattern in //target/ast10x0/tests/ipc/user. +system_image_test( + name = "hace_sha256_test", + image = ":hace_sha256", + target_compatible_with = TARGET_COMPATIBLE_WITH, +) + +rust_binary_no_panics_test( + name = "no_panics_test", + binary = ":hace_sha256", + tags = ["kernel"], +) + +filegroup( + name = "system_config", + srcs = ["system.json5"], +) + +target_codegen( + name = "codegen", + arch = "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + system_config = ":system_config", + target_compatible_with = TARGET_COMPATIBLE_WITH, +) + +target_linker_script( + name = "linker_script", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + template = "//target/ast10x0:linker_script_template", +) + +rust_binary( + name = "target", + srcs = [ + "target.rs", + "vectors.rs", # included via include!("vectors.rs") + ], + edition = "2024", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + deps = [ + ":codegen", + ":linker_script", + "//hal/blocking", + "//target/ast10x0:config", + "//target/ast10x0:entry", + "//target/ast10x0/board:ast10x0_board", + "//target/ast10x0/peripherals", + "@ast1060_pac", + "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + "@pigweed//pw_kernel/kernel", + "@pigweed//pw_kernel/subsys/console:console_backend", + "@pigweed//pw_kernel/target:target_common", + "@pigweed//pw_log/rust:pw_log", + "@rust_crates//:zerocopy", + ], +) diff --git a/target/ast10x0/tests/peripherals/hace/hace_sha256/system.json5 b/target/ast10x0/tests/peripherals/hace/hace_sha256/system.json5 new file mode 100644 index 00000000..79f8e5aa --- /dev/null +++ b/target/ast10x0/tests/peripherals/hace/hace_sha256/system.json5 @@ -0,0 +1,18 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +// AST10x0 HACE SHA-256 test configuration. +// Uses the same memory layout as other kernel-only peripheral tests. +{ + arch: { + type: "armv7m", + vector_table_start_address: 0x00000000, + vector_table_size_bytes: 1280, // 0x500 (320 vectors) + }, + kernel: { + flash_start_address: 0x00000500, // After vector table + flash_size_bytes: 262144, // 256KB for kernel code (in RAM) + ram_start_address: 0x00040500, // RAM starts after code + ram_size_bytes: 391936, // 383KB for data (ends at 0xA0000, no overlap with RAM_NC) + }, +} diff --git a/target/ast10x0/tests/peripherals/hace/hace_sha256/target.rs b/target/ast10x0/tests/peripherals/hace/hace_sha256/target.rs new file mode 100644 index 00000000..5bec4b8f --- /dev/null +++ b/target/ast10x0/tests/peripherals/hace/hace_sha256/target.rs @@ -0,0 +1,449 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +#![no_std] +#![no_main] + +use ast10x0_board::{Ast10x0Board, Ast10x0BoardDescriptor}; +use ast10x0_peripherals::hace::{HaceDevice, HaceDigest, HaceHmac, HmacKey}; +use codegen as _; +use console_backend::console_backend_write_all; +use entry as _; +use openprot_hal_blocking::digest::scoped::{DigestInit, DigestOp}; +use openprot_hal_blocking::digest::{Sha2_256, Sha2_384, Sha2_512}; +use openprot_hal_blocking::mac::scoped::{MacInit, MacOp}; +use openprot_hal_blocking::mac::{HmacSha2_256, HmacSha2_384, HmacSha2_512}; +use target_common::{declare_target, TargetInterface}; + +pub struct Target {} + +const ERR_HASH_FAILED: &str = "hace hash failed"; +const ERR_VERIFY_FAILED: &str = "hace digest mismatch"; + +// NIST FIPS 180-4 example messages. +const NIST_56: &[u8] = b"abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"; // 448-bit +const NIST_112: &[u8] = b"abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmnhijklmnoijklmnopjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu"; // 896-bit + +// Deterministic streaming pattern: byte i = (i % 251). 251 is prime, so the +// pattern does not align with the 64/128-byte block size. +#[inline] +fn pat(i: usize) -> u8 { + (i % 251) as u8 +} + +// Streaming input scratch. Static (not stack) so it lives in DMA-reachable .bss +// RAM and avoids a 4 KiB stack frame. Single-threaded test => serial use only. +static mut INPUT_BUF: [u8; 4096] = [0u8; 4096]; + +fn check(name: &str, actual: &[u8], expected: &[u8]) -> Result<(), &'static str> { + if actual != expected { + pw_log::error!("{}: digest mismatch", name as &str); + let a0 = u32::from_be_bytes([actual[0], actual[1], actual[2], actual[3]]); + let a1 = u32::from_be_bytes([actual[4], actual[5], actual[6], actual[7]]); + let az = u32::from_be_bytes([ + actual[actual.len() - 4], + actual[actual.len() - 3], + actual[actual.len() - 2], + actual[actual.len() - 1], + ]); + let e0 = u32::from_be_bytes([expected[0], expected[1], expected[2], expected[3]]); + pw_log::error!( + " actual[0..8]={:08x}{:08x} actual[last4]={:08x} expected[0..4]={:08x}", + a0 as u32, + a1 as u32, + az as u32, + e0 as u32 + ); + return Err(ERR_VERIFY_FAILED); + } + pw_log::info!("{}: PASS", name as &str); + Ok(()) +} + +/// One-shot KAT: single `update` of `$input`, compare to `$expected`. +macro_rules! oneshot_case { + ($name:expr, $ty:ty, $val:expr, $input:expr, $expected:expr) => {{ + pw_log::info!("case: {}", $name as &str); + // SAFETY: test runs once at boot with exclusive HACE access. + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + // SAFETY: single-threaded test; no concurrent HACE access. + let mut dev = unsafe { HaceDigest::<$ty>::from_device(&mut device) }; + let mut op = dev.init($val).map_err(|_| ERR_HASH_FAILED)?; + op.update($input).map_err(|_| ERR_HASH_FAILED)?; + let digest = op.finalize().map_err(|_| ERR_HASH_FAILED)?; + check($name, digest.as_bytes(), &$expected)?; + }}; +} + +/// Production streaming path: feed `pat(0..$total)` in `$chunk`-byte updates, +/// then finalize. Asserts the engine's accumulated digest equals the standard +/// SHA of the whole input (goal.md §3.5 gating test; D2 branch is dormant here). +macro_rules! stream_case { + ($name:expr, $ty:ty, $val:expr, $total:expr, $chunk:expr, $expected:expr) => {{ + pw_log::info!( + "case: {} ({} B in {} B chunks)", + $name as &str, + $total as u32, + $chunk as u32 + ); + // SAFETY: test runs once at boot with exclusive HACE access. + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + // SAFETY: single-threaded test; no concurrent HACE access. + let mut dev = unsafe { HaceDigest::<$ty>::from_device(&mut device) }; + let mut op = dev.init($val).map_err(|_| ERR_HASH_FAILED)?; + let mut off = 0usize; + while off < $total { + let n = core::cmp::min($chunk, $total - off); + // SAFETY: serial single-threaded use of INPUT_BUF. + let buf = unsafe { &mut *core::ptr::addr_of_mut!(INPUT_BUF) }; + for k in 0..n { + buf[k] = pat(off + k); + } + op.update(&buf[..n]).map_err(|_| ERR_HASH_FAILED)?; + off += n; + } + let digest = op.finalize().map_err(|_| ERR_HASH_FAILED)?; + check($name, digest.as_bytes(), &$expected)?; + }}; +} + +/// RFC-2104 HMAC KAT: one `update` of `$data` under `$key`, compare to +/// `$expected` (RFC-4231 tag). `$algo` is the `HmacSha2_*` marker. +macro_rules! hmac_case { + ($name:expr, $algo:expr, $key:expr, $data:expr, $expected:expr) => {{ + pw_log::info!("case: {}", $name as &str); + // Feed the message from the aligned RAM scratch (same as stream_case!): + // engine DMA wants a RAM source, not a rodata string literal. + let src: &[u8] = $data; + // SAFETY: serial single-threaded use of INPUT_BUF. + let buf = unsafe { &mut *core::ptr::addr_of_mut!(INPUT_BUF) }; + buf[..src.len()].copy_from_slice(src); + let data: &[u8] = &buf[..src.len()]; + // SAFETY: test runs once at boot with exclusive HACE access. + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + // SAFETY: single-threaded test; no concurrent HACE access. + let mut hmac = unsafe { HaceHmac::from_device(&mut device) }; + let key = HmacKey::from_slice($key).map_err(|_| ERR_HASH_FAILED)?; + let mut op = hmac.init($algo, key).map_err(|_| ERR_HASH_FAILED)?; + op.update(data).map_err(|_| ERR_HASH_FAILED)?; + let tag = op.finalize().map_err(|_| ERR_HASH_FAILED)?; + check($name, tag.as_bytes(), &$expected)?; + }}; +} + +include!("vectors.rs"); + +fn run_hace_sha2_kats() -> Result<(), &'static str> { + pw_log::info!("=== AST10x0 HACE SHA-2 KAT suite ==="); + + let board = Ast10x0Board::new(Ast10x0BoardDescriptor { + pinctrl_groups: &[], + i2c_buses: &[], + }); + // SAFETY: test runs once at boot with exclusive access to the board. + unsafe { + let _ = board.init(); + }; + + // --- SHA-256 --- + oneshot_case!("sha256 empty", Sha2_256, Sha2_256, b"", EMPTY_256); + oneshot_case!("sha256 abc", Sha2_256, Sha2_256, b"abc", ABC_256); + oneshot_case!("sha256 nist-448", Sha2_256, Sha2_256, NIST_56, NIST56_256); + + // --- SHA-384 --- + oneshot_case!("sha384 abc", Sha2_384, Sha2_384, b"abc", ABC_384); + oneshot_case!("sha384 nist-896", Sha2_384, Sha2_384, NIST_112, NIST112_384); + + // --- SHA-512 --- + oneshot_case!("sha512 abc", Sha2_512, Sha2_512, b"abc", ABC_512); + oneshot_case!("sha512 nist-896", Sha2_512, Sha2_512, NIST_112, NIST112_512); + + // --- Production streaming path: 9000 B fed as 4096 + 4096 + 808 --- + // 4096 is a multiple of both 64 and 128, so every full chunk lands on an + // exact block boundary: this is the dominant PFR workload (goal.md §3.5). + stream_case!( + "sha256 stream-9000", + Sha2_256, + Sha2_256, + 9000usize, + 4096usize, + STREAM9000_256 + ); + stream_case!( + "sha384 stream-9000", + Sha2_384, + Sha2_384, + 9000usize, + 4096usize, + STREAM9000_384 + ); + stream_case!( + "sha512 stream-9000", + Sha2_512, + Sha2_512, + 9000usize, + 4096usize, + STREAM9000_512 + ); + + // --- D2 delta case (goal.md D2) --- + // SHA-256, block 64. update(100): buffers a 36-byte remainder. update(28): + // 36 + 28 == 64 -> remainder == 0, the exact-block-boundary branch. The + // authority leaves `bufcnt` stale here (wrong hash); the port sets it to 0 + // and so yields the *correct* SHA-256 of the 128-byte message. This pins + // the port's correct behavior — the one place port != Zephyr, on a pattern + // no real consumer produces. + { + pw_log::info!("case: {}", "sha256 d2-boundary" as &str); + // SAFETY: test runs once at boot with exclusive HACE access. + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + // SAFETY: single-threaded test; no concurrent HACE access. + let mut dev = unsafe { HaceDigest::::from_device(&mut device) }; + let mut op = dev.init(Sha2_256).map_err(|_| ERR_HASH_FAILED)?; + // SAFETY: serial single-threaded use of INPUT_BUF. + let buf = unsafe { &mut *core::ptr::addr_of_mut!(INPUT_BUF) }; + for k in 0..128 { + buf[k] = pat(k); + } + op.update(&buf[0..100]).map_err(|_| ERR_HASH_FAILED)?; + op.update(&buf[100..128]).map_err(|_| ERR_HASH_FAILED)?; + let digest = op.finalize().map_err(|_| ERR_HASH_FAILED)?; + check("sha256 d2-boundary", digest.as_bytes(), &D2_128_256)?; + } + + // --- Diagnostic: SHA of the 131-byte (2-block) key used by RFC-4231 #6, + // i.e. the exact input the HMAC key-reduction sub-hash computes. --- + oneshot_case!("sha384 key6-2block", Sha2_384, Sha2_384, &HMAC_K6, K6_384); + oneshot_case!("sha512 key6-2block", Sha2_512, Sha2_512, &HMAC_K6, K6_512); + + // --- Diagnostic: reconstruct HMAC-SHA512 #6 stage-by-stage using ONLY the + // proven public digest API. If this yields the correct tag, the bug is + // in hmac.rs; if inner/tag is wrong here too, it's the digest/engine. --- + { + let dmsg: &[u8] = b"Test Using Larger Than Block-Size Key - Hash Key First"; + // K0 = SHA512(K6) zero-padded to 128. + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + let mut dd = unsafe { HaceDigest::::from_device(&mut device) }; + let mut op = dd.init(Sha2_512).map_err(|_| ERR_HASH_FAILED)?; + op.update(&HMAC_K6).map_err(|_| ERR_HASH_FAILED)?; + let red = op.finalize().map_err(|_| ERR_HASH_FAILED)?; + let mut k0 = [0u8; 128]; + k0[..64].copy_from_slice(red.as_bytes()); + let mut ipad = [0u8; 128]; + let mut opad = [0u8; 128]; + ipad.copy_from_slice(&k0); + opad.copy_from_slice(&k0); + for i in 0..128 { + ipad[i] ^= 0x36; + opad[i] ^= 0x5c; + } + // inner = SHA512(ipad ‖ msg) + let ilen = 128 + dmsg.len(); + // SAFETY: serial single-threaded use of INPUT_BUF. + let buf = unsafe { &mut *core::ptr::addr_of_mut!(INPUT_BUF) }; + buf[..128].copy_from_slice(&ipad); + buf[128..ilen].copy_from_slice(dmsg); + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + let mut dd = unsafe { HaceDigest::::from_device(&mut device) }; + let mut op = dd.init(Sha2_512).map_err(|_| ERR_HASH_FAILED)?; + op.update(&buf[..ilen]).map_err(|_| ERR_HASH_FAILED)?; + let innr = op.finalize().map_err(|_| ERR_HASH_FAILED)?; + check("dbg sha512 inner", innr.as_bytes(), &HMAC6_512_INNER)?; + // tag = SHA512(opad ‖ inner) + let mut ib = [0u8; 64]; + ib.copy_from_slice(innr.as_bytes()); + let buf = unsafe { &mut *core::ptr::addr_of_mut!(INPUT_BUF) }; + buf[..128].copy_from_slice(&opad); + buf[128..128 + 64].copy_from_slice(&ib); + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + let mut dd = unsafe { HaceDigest::::from_device(&mut device) }; + let mut op = dd.init(Sha2_512).map_err(|_| ERR_HASH_FAILED)?; + op.update(&buf[..128 + 64]).map_err(|_| ERR_HASH_FAILED)?; + let t = op.finalize().map_err(|_| ERR_HASH_FAILED)?; + check("dbg sha512 hmac6 manual", t.as_bytes(), &HMAC_C6_512)?; + } + + // --- HMAC (software RFC-2104 over the HACE hasher), RFC-4231 vectors --- + // Cases 1-4,6,7. Case 6/7 use a 131-byte key (> block size) exercising the + // RFC-2104-correct `key_len > block_size` reduction path. + hmac_case!( + "hmac-sha256 rfc4231-1", + HmacSha2_256, + &HMAC_K1, + b"Hi There", + HMAC_C1_256 + ); + hmac_case!( + "hmac-sha256 rfc4231-2", + HmacSha2_256, + b"Jefe", + b"what do ya want for nothing?", + HMAC_C2_256 + ); + hmac_case!( + "hmac-sha256 rfc4231-3", + HmacSha2_256, + &HMAC_K3, + &HMAC_D3, + HMAC_C3_256 + ); + hmac_case!( + "hmac-sha256 rfc4231-4", + HmacSha2_256, + &HMAC_K4, + &HMAC_D4, + HMAC_C4_256 + ); + hmac_case!( + "hmac-sha256 rfc4231-6", + HmacSha2_256, + &HMAC_K6, + b"Test Using Larger Than Block-Size Key - Hash Key First", + HMAC_C6_256 + ); + hmac_case!("hmac-sha256 rfc4231-7", HmacSha2_256, &HMAC_K7, b"This is a test using a larger than block-size key and a larger than block-size data. The key needs to be hashed before being used by the HMAC algorithm.", HMAC_C7_256); + + hmac_case!( + "hmac-sha384 rfc4231-1", + HmacSha2_384, + &HMAC_K1, + b"Hi There", + HMAC_C1_384 + ); + hmac_case!( + "hmac-sha384 rfc4231-2", + HmacSha2_384, + b"Jefe", + b"what do ya want for nothing?", + HMAC_C2_384 + ); + hmac_case!( + "hmac-sha384 rfc4231-3", + HmacSha2_384, + &HMAC_K3, + &HMAC_D3, + HMAC_C3_384 + ); + hmac_case!( + "hmac-sha384 rfc4231-4", + HmacSha2_384, + &HMAC_K4, + &HMAC_D4, + HMAC_C4_384 + ); + hmac_case!( + "hmac-sha384 rfc4231-6", + HmacSha2_384, + &HMAC_K6, + b"Test Using Larger Than Block-Size Key - Hash Key First", + HMAC_C6_384 + ); + hmac_case!("hmac-sha384 rfc4231-7", HmacSha2_384, &HMAC_K7, b"This is a test using a larger than block-size key and a larger than block-size data. The key needs to be hashed before being used by the HMAC algorithm.", HMAC_C7_384); + + // Isolation: K6_512 == SHA512(K6). Feeding it as a 64-byte (<=block) key + // takes hmac.rs's NON-reduce branch but yields the identical K0, so it must + // equal HMAC(K6,msg). If this PASSES, the in-init kd reduction is the bug. + hmac_case!( + "hmac-sha512 prereduced6", + HmacSha2_512, + &K6_512, + b"Test Using Larger Than Block-Size Key - Hash Key First", + HMAC_C6_512 + ); + + // --- Trace: replicate hmac.rs::init() reduce branch exactly for SHA-512 --- + // hmac.rs copies K6 into HMAC_KEY_NC (.ram_nc) then calls one_shot!(Sha2_512). + // Here we do the same copy via INPUT_BUF (.bss, also DMA-safe after D1 fix) + // and hash it. If this gives K6_512, the reduce one_shot! is correct and the + // bug is in finalize(). If it gives something else, the reduce path is broken. + { + pw_log::info!("case: {}", "dbg sha512 reduce-k6-via-bss" as &str); + let buf = unsafe { &mut *core::ptr::addr_of_mut!(INPUT_BUF) }; + buf[..HMAC_K6.len()].copy_from_slice(&HMAC_K6); + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + let mut dd = unsafe { HaceDigest::::from_device(&mut device) }; + let mut op = dd.init(Sha2_512).map_err(|_| ERR_HASH_FAILED)?; + op.update(&buf[..HMAC_K6.len()]) + .map_err(|_| ERR_HASH_FAILED)?; + let kh = op.finalize().map_err(|_| ERR_HASH_FAILED)?; + check("dbg sha512 reduce-k6-via-bss", kh.as_bytes(), &K6_512)?; + } + + hmac_case!( + "hmac-sha512 rfc4231-1", + HmacSha2_512, + &HMAC_K1, + b"Hi There", + HMAC_C1_512 + ); + hmac_case!( + "hmac-sha512 rfc4231-2", + HmacSha2_512, + b"Jefe", + b"what do ya want for nothing?", + HMAC_C2_512 + ); + hmac_case!( + "hmac-sha512 rfc4231-3", + HmacSha2_512, + &HMAC_K3, + &HMAC_D3, + HMAC_C3_512 + ); + hmac_case!( + "hmac-sha512 rfc4231-4", + HmacSha2_512, + &HMAC_K4, + &HMAC_D4, + HMAC_C4_512 + ); + hmac_case!( + "hmac-sha512 rfc4231-6", + HmacSha2_512, + &HMAC_K6, + b"Test Using Larger Than Block-Size Key - Hash Key First", + HMAC_C6_512 + ); + hmac_case!("hmac-sha512 rfc4231-7", HmacSha2_512, &HMAC_K7, b"This is a test using a larger than block-size key and a larger than block-size data. The key needs to be hashed before being used by the HMAC algorithm.", HMAC_C7_512); + + // Streaming HMAC: split RFC-4231 case 7 data across multiple `update`s; + // must equal the one-shot tag (exercises MacOp::update chaining). + { + pw_log::info!("case: {}", "hmac-sha256 streamed-7" as &str); + // SAFETY: test runs once at boot with exclusive HACE access. + let mut device = unsafe { HaceDevice::new_global(|_| core::hint::spin_loop()) }; + // SAFETY: single-threaded test; no concurrent HACE access. + let mut hmac = unsafe { HaceHmac::from_device(&mut device) }; + let key = HmacKey::from_slice(&HMAC_K7).map_err(|_| ERR_HASH_FAILED)?; + let mut op = hmac.init(HmacSha2_256, key).map_err(|_| ERR_HASH_FAILED)?; + let data: &[u8] = b"This is a test using a larger than block-size key and a larger than block-size data. The key needs to be hashed before being used by the HMAC algorithm."; + for chunk in data.chunks(13) { + op.update(chunk).map_err(|_| ERR_HASH_FAILED)?; + } + let tag = op.finalize().map_err(|_| ERR_HASH_FAILED)?; + check("hmac-sha256 streamed-7", tag.as_bytes(), &HMAC_C7_256)?; + } + + pw_log::info!("=== AST10x0 HACE SHA-2 KAT suite complete ==="); + Ok(()) +} + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 HACE SHA-2 KAT"; + + fn main() -> ! { + let sentinel: &[u8] = match run_hace_sha2_kats() { + Ok(()) => b"TEST_RESULT:PASS\n", + Err(error) => { + pw_log::error!("HACE SHA-2 KAT suite failed: {}", error as &str); + b"TEST_RESULT:FAIL\n" + } + }; + + let _ = console_backend_write_all(sentinel); + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/peripherals/hace/hace_sha256/vectors.rs b/target/ast10x0/tests/peripherals/hace/hace_sha256/vectors.rs new file mode 100644 index 00000000..66099ea9 --- /dev/null +++ b/target/ast10x0/tests/peripherals/hace/hace_sha256/vectors.rs @@ -0,0 +1,419 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 +// +// Generated SHA-2 known-answer vectors for the HACE KAT suite. +// Reference digests computed with Python hashlib (== standard SHA-2). +// Regenerate: see the generator in plans/ / git history. + +#[rustfmt::skip] +const EMPTY_256: [u8; 32] = [ + 0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14, + 0x9a, 0xfb, 0xf4, 0xc8, 0x99, 0x6f, 0xb9, 0x24, + 0x27, 0xae, 0x41, 0xe4, 0x64, 0x9b, 0x93, 0x4c, + 0xa4, 0x95, 0x99, 0x1b, 0x78, 0x52, 0xb8, 0x55, +]; + +#[rustfmt::skip] +const ABC_256: [u8; 32] = [ + 0xba, 0x78, 0x16, 0xbf, 0x8f, 0x01, 0xcf, 0xea, + 0x41, 0x41, 0x40, 0xde, 0x5d, 0xae, 0x22, 0x23, + 0xb0, 0x03, 0x61, 0xa3, 0x96, 0x17, 0x7a, 0x9c, + 0xb4, 0x10, 0xff, 0x61, 0xf2, 0x00, 0x15, 0xad, +]; + +#[rustfmt::skip] +const ABC_384: [u8; 48] = [ + 0xcb, 0x00, 0x75, 0x3f, 0x45, 0xa3, 0x5e, 0x8b, + 0xb5, 0xa0, 0x3d, 0x69, 0x9a, 0xc6, 0x50, 0x07, + 0x27, 0x2c, 0x32, 0xab, 0x0e, 0xde, 0xd1, 0x63, + 0x1a, 0x8b, 0x60, 0x5a, 0x43, 0xff, 0x5b, 0xed, + 0x80, 0x86, 0x07, 0x2b, 0xa1, 0xe7, 0xcc, 0x23, + 0x58, 0xba, 0xec, 0xa1, 0x34, 0xc8, 0x25, 0xa7, +]; + +#[rustfmt::skip] +const ABC_512: [u8; 64] = [ + 0xdd, 0xaf, 0x35, 0xa1, 0x93, 0x61, 0x7a, 0xba, + 0xcc, 0x41, 0x73, 0x49, 0xae, 0x20, 0x41, 0x31, + 0x12, 0xe6, 0xfa, 0x4e, 0x89, 0xa9, 0x7e, 0xa2, + 0x0a, 0x9e, 0xee, 0xe6, 0x4b, 0x55, 0xd3, 0x9a, + 0x21, 0x92, 0x99, 0x2a, 0x27, 0x4f, 0xc1, 0xa8, + 0x36, 0xba, 0x3c, 0x23, 0xa3, 0xfe, 0xeb, 0xbd, + 0x45, 0x4d, 0x44, 0x23, 0x64, 0x3c, 0xe8, 0x0e, + 0x2a, 0x9a, 0xc9, 0x4f, 0xa5, 0x4c, 0xa4, 0x9f, +]; + +#[rustfmt::skip] +const NIST56_256: [u8; 32] = [ + 0x24, 0x8d, 0x6a, 0x61, 0xd2, 0x06, 0x38, 0xb8, + 0xe5, 0xc0, 0x26, 0x93, 0x0c, 0x3e, 0x60, 0x39, + 0xa3, 0x3c, 0xe4, 0x59, 0x64, 0xff, 0x21, 0x67, + 0xf6, 0xec, 0xed, 0xd4, 0x19, 0xdb, 0x06, 0xc1, +]; + +#[rustfmt::skip] +const NIST112_384: [u8; 48] = [ + 0x09, 0x33, 0x0c, 0x33, 0xf7, 0x11, 0x47, 0xe8, + 0x3d, 0x19, 0x2f, 0xc7, 0x82, 0xcd, 0x1b, 0x47, + 0x53, 0x11, 0x1b, 0x17, 0x3b, 0x3b, 0x05, 0xd2, + 0x2f, 0xa0, 0x80, 0x86, 0xe3, 0xb0, 0xf7, 0x12, + 0xfc, 0xc7, 0xc7, 0x1a, 0x55, 0x7e, 0x2d, 0xb9, + 0x66, 0xc3, 0xe9, 0xfa, 0x91, 0x74, 0x60, 0x39, +]; + +#[rustfmt::skip] +const NIST112_512: [u8; 64] = [ + 0x8e, 0x95, 0x9b, 0x75, 0xda, 0xe3, 0x13, 0xda, + 0x8c, 0xf4, 0xf7, 0x28, 0x14, 0xfc, 0x14, 0x3f, + 0x8f, 0x77, 0x79, 0xc6, 0xeb, 0x9f, 0x7f, 0xa1, + 0x72, 0x99, 0xae, 0xad, 0xb6, 0x88, 0x90, 0x18, + 0x50, 0x1d, 0x28, 0x9e, 0x49, 0x00, 0xf7, 0xe4, + 0x33, 0x1b, 0x99, 0xde, 0xc4, 0xb5, 0x43, 0x3a, + 0xc7, 0xd3, 0x29, 0xee, 0xb6, 0xdd, 0x26, 0x54, + 0x5e, 0x96, 0xe5, 0x5b, 0x87, 0x4b, 0xe9, 0x09, +]; + +#[rustfmt::skip] +const STREAM9000_256: [u8; 32] = [ + 0x4b, 0x81, 0xef, 0xbd, 0x20, 0x5e, 0x7f, 0xb4, + 0xe4, 0x2b, 0xc0, 0xd7, 0x2d, 0x9d, 0x74, 0x13, + 0x64, 0x22, 0x98, 0x73, 0x52, 0x89, 0xd3, 0x5a, + 0x74, 0xc1, 0x75, 0x58, 0x83, 0xbc, 0xc4, 0x5c, +]; + +#[rustfmt::skip] +const STREAM9000_384: [u8; 48] = [ + 0x03, 0x0f, 0x8d, 0x36, 0xe5, 0x64, 0xc3, 0xfc, + 0x51, 0x19, 0x62, 0xff, 0xd1, 0x7b, 0x9b, 0x9a, + 0x0a, 0x27, 0xfc, 0x54, 0x76, 0xdf, 0x69, 0x3b, + 0x10, 0x20, 0x54, 0x12, 0x76, 0x5f, 0xa3, 0xa1, + 0x31, 0xf1, 0x07, 0xf0, 0xcf, 0x0f, 0xb7, 0xf5, + 0xe4, 0xc8, 0xab, 0xab, 0x13, 0x04, 0xa7, 0x1d, +]; + +#[rustfmt::skip] +const STREAM9000_512: [u8; 64] = [ + 0x2f, 0x8d, 0xab, 0xef, 0xb4, 0x62, 0x19, 0x6f, + 0x0e, 0x02, 0x1e, 0x2a, 0x1a, 0x1a, 0x89, 0xb9, + 0xf6, 0x84, 0x3d, 0x8e, 0x39, 0x32, 0x6e, 0x6c, + 0x1b, 0xe0, 0x44, 0xfc, 0x78, 0xa9, 0xa3, 0xf9, + 0x2b, 0x5b, 0x1f, 0x2f, 0x40, 0xf4, 0x1e, 0x74, + 0x91, 0x18, 0x7c, 0xea, 0xff, 0x11, 0xc5, 0x22, + 0xfb, 0x34, 0xc5, 0x94, 0xb4, 0xa0, 0x7c, 0x47, + 0x81, 0xc1, 0x2f, 0xb0, 0x7c, 0x2c, 0x4c, 0xfd, +]; + +#[rustfmt::skip] +const D2_128_256: [u8; 32] = [ + 0x47, 0x1f, 0xb9, 0x43, 0xaa, 0x23, 0xc5, 0x11, + 0xf6, 0xf7, 0x2f, 0x8d, 0x16, 0x52, 0xd9, 0xc8, + 0x80, 0xcf, 0xa3, 0x92, 0xad, 0x80, 0x50, 0x31, + 0x20, 0x54, 0x77, 0x03, 0xe5, 0x6a, 0x2b, 0xe5, +]; + +// === RFC 4231 HMAC key/data byte vectors (non-literal ones) === + +#[rustfmt::skip] +const HMAC_K1: [u8; 20] = [ + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, + 0x0b, 0x0b, 0x0b, 0x0b, +]; + +#[rustfmt::skip] +const HMAC_K3: [u8; 20] = [ + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, +]; + +#[rustfmt::skip] +const HMAC_D3: [u8; 50] = [ + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, + 0xdd, 0xdd, +]; + +#[rustfmt::skip] +const HMAC_K4: [u8; 25] = [ + 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, + 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10, + 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, + 0x19, +]; + +#[rustfmt::skip] +const HMAC_D4: [u8; 50] = [ + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, + 0xcd, 0xcd, +]; + +#[rustfmt::skip] +const HMAC_K6: [u8; 131] = [ + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, +]; + +#[rustfmt::skip] +const HMAC_K7: [u8; 131] = [ + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, + 0xaa, 0xaa, 0xaa, +]; + +// === RFC 4231 expected HMAC tags === + +#[rustfmt::skip] +const HMAC_C1_256: [u8; 32] = [ + 0xb0, 0x34, 0x4c, 0x61, 0xd8, 0xdb, 0x38, 0x53, + 0x5c, 0xa8, 0xaf, 0xce, 0xaf, 0x0b, 0xf1, 0x2b, + 0x88, 0x1d, 0xc2, 0x00, 0xc9, 0x83, 0x3d, 0xa7, + 0x26, 0xe9, 0x37, 0x6c, 0x2e, 0x32, 0xcf, 0xf7, +]; + +#[rustfmt::skip] +const HMAC_C1_384: [u8; 48] = [ + 0xaf, 0xd0, 0x39, 0x44, 0xd8, 0x48, 0x95, 0x62, + 0x6b, 0x08, 0x25, 0xf4, 0xab, 0x46, 0x90, 0x7f, + 0x15, 0xf9, 0xda, 0xdb, 0xe4, 0x10, 0x1e, 0xc6, + 0x82, 0xaa, 0x03, 0x4c, 0x7c, 0xeb, 0xc5, 0x9c, + 0xfa, 0xea, 0x9e, 0xa9, 0x07, 0x6e, 0xde, 0x7f, + 0x4a, 0xf1, 0x52, 0xe8, 0xb2, 0xfa, 0x9c, 0xb6, +]; + +#[rustfmt::skip] +const HMAC_C1_512: [u8; 64] = [ + 0x87, 0xaa, 0x7c, 0xde, 0xa5, 0xef, 0x61, 0x9d, + 0x4f, 0xf0, 0xb4, 0x24, 0x1a, 0x1d, 0x6c, 0xb0, + 0x23, 0x79, 0xf4, 0xe2, 0xce, 0x4e, 0xc2, 0x78, + 0x7a, 0xd0, 0xb3, 0x05, 0x45, 0xe1, 0x7c, 0xde, + 0xda, 0xa8, 0x33, 0xb7, 0xd6, 0xb8, 0xa7, 0x02, + 0x03, 0x8b, 0x27, 0x4e, 0xae, 0xa3, 0xf4, 0xe4, + 0xbe, 0x9d, 0x91, 0x4e, 0xeb, 0x61, 0xf1, 0x70, + 0x2e, 0x69, 0x6c, 0x20, 0x3a, 0x12, 0x68, 0x54, +]; + +#[rustfmt::skip] +const HMAC_C2_256: [u8; 32] = [ + 0x5b, 0xdc, 0xc1, 0x46, 0xbf, 0x60, 0x75, 0x4e, + 0x6a, 0x04, 0x24, 0x26, 0x08, 0x95, 0x75, 0xc7, + 0x5a, 0x00, 0x3f, 0x08, 0x9d, 0x27, 0x39, 0x83, + 0x9d, 0xec, 0x58, 0xb9, 0x64, 0xec, 0x38, 0x43, +]; + +#[rustfmt::skip] +const HMAC_C2_384: [u8; 48] = [ + 0xaf, 0x45, 0xd2, 0xe3, 0x76, 0x48, 0x40, 0x31, + 0x61, 0x7f, 0x78, 0xd2, 0xb5, 0x8a, 0x6b, 0x1b, + 0x9c, 0x7e, 0xf4, 0x64, 0xf5, 0xa0, 0x1b, 0x47, + 0xe4, 0x2e, 0xc3, 0x73, 0x63, 0x22, 0x44, 0x5e, + 0x8e, 0x22, 0x40, 0xca, 0x5e, 0x69, 0xe2, 0xc7, + 0x8b, 0x32, 0x39, 0xec, 0xfa, 0xb2, 0x16, 0x49, +]; + +#[rustfmt::skip] +const HMAC_C2_512: [u8; 64] = [ + 0x16, 0x4b, 0x7a, 0x7b, 0xfc, 0xf8, 0x19, 0xe2, + 0xe3, 0x95, 0xfb, 0xe7, 0x3b, 0x56, 0xe0, 0xa3, + 0x87, 0xbd, 0x64, 0x22, 0x2e, 0x83, 0x1f, 0xd6, + 0x10, 0x27, 0x0c, 0xd7, 0xea, 0x25, 0x05, 0x54, + 0x97, 0x58, 0xbf, 0x75, 0xc0, 0x5a, 0x99, 0x4a, + 0x6d, 0x03, 0x4f, 0x65, 0xf8, 0xf0, 0xe6, 0xfd, + 0xca, 0xea, 0xb1, 0xa3, 0x4d, 0x4a, 0x6b, 0x4b, + 0x63, 0x6e, 0x07, 0x0a, 0x38, 0xbc, 0xe7, 0x37, +]; + +#[rustfmt::skip] +const HMAC_C3_256: [u8; 32] = [ + 0x77, 0x3e, 0xa9, 0x1e, 0x36, 0x80, 0x0e, 0x46, + 0x85, 0x4d, 0xb8, 0xeb, 0xd0, 0x91, 0x81, 0xa7, + 0x29, 0x59, 0x09, 0x8b, 0x3e, 0xf8, 0xc1, 0x22, + 0xd9, 0x63, 0x55, 0x14, 0xce, 0xd5, 0x65, 0xfe, +]; + +#[rustfmt::skip] +const HMAC_C3_384: [u8; 48] = [ + 0x88, 0x06, 0x26, 0x08, 0xd3, 0xe6, 0xad, 0x8a, + 0x0a, 0xa2, 0xac, 0xe0, 0x14, 0xc8, 0xa8, 0x6f, + 0x0a, 0xa6, 0x35, 0xd9, 0x47, 0xac, 0x9f, 0xeb, + 0xe8, 0x3e, 0xf4, 0xe5, 0x59, 0x66, 0x14, 0x4b, + 0x2a, 0x5a, 0xb3, 0x9d, 0xc1, 0x38, 0x14, 0xb9, + 0x4e, 0x3a, 0xb6, 0xe1, 0x01, 0xa3, 0x4f, 0x27, +]; + +#[rustfmt::skip] +const HMAC_C3_512: [u8; 64] = [ + 0xfa, 0x73, 0xb0, 0x08, 0x9d, 0x56, 0xa2, 0x84, + 0xef, 0xb0, 0xf0, 0x75, 0x6c, 0x89, 0x0b, 0xe9, + 0xb1, 0xb5, 0xdb, 0xdd, 0x8e, 0xe8, 0x1a, 0x36, + 0x55, 0xf8, 0x3e, 0x33, 0xb2, 0x27, 0x9d, 0x39, + 0xbf, 0x3e, 0x84, 0x82, 0x79, 0xa7, 0x22, 0xc8, + 0x06, 0xb4, 0x85, 0xa4, 0x7e, 0x67, 0xc8, 0x07, + 0xb9, 0x46, 0xa3, 0x37, 0xbe, 0xe8, 0x94, 0x26, + 0x74, 0x27, 0x88, 0x59, 0xe1, 0x32, 0x92, 0xfb, +]; + +#[rustfmt::skip] +const HMAC_C4_256: [u8; 32] = [ + 0x82, 0x55, 0x8a, 0x38, 0x9a, 0x44, 0x3c, 0x0e, + 0xa4, 0xcc, 0x81, 0x98, 0x99, 0xf2, 0x08, 0x3a, + 0x85, 0xf0, 0xfa, 0xa3, 0xe5, 0x78, 0xf8, 0x07, + 0x7a, 0x2e, 0x3f, 0xf4, 0x67, 0x29, 0x66, 0x5b, +]; + +#[rustfmt::skip] +const HMAC_C4_384: [u8; 48] = [ + 0x3e, 0x8a, 0x69, 0xb7, 0x78, 0x3c, 0x25, 0x85, + 0x19, 0x33, 0xab, 0x62, 0x90, 0xaf, 0x6c, 0xa7, + 0x7a, 0x99, 0x81, 0x48, 0x08, 0x50, 0x00, 0x9c, + 0xc5, 0x57, 0x7c, 0x6e, 0x1f, 0x57, 0x3b, 0x4e, + 0x68, 0x01, 0xdd, 0x23, 0xc4, 0xa7, 0xd6, 0x79, + 0xcc, 0xf8, 0xa3, 0x86, 0xc6, 0x74, 0xcf, 0xfb, +]; + +#[rustfmt::skip] +const HMAC_C4_512: [u8; 64] = [ + 0xb0, 0xba, 0x46, 0x56, 0x37, 0x45, 0x8c, 0x69, + 0x90, 0xe5, 0xa8, 0xc5, 0xf6, 0x1d, 0x4a, 0xf7, + 0xe5, 0x76, 0xd9, 0x7f, 0xf9, 0x4b, 0x87, 0x2d, + 0xe7, 0x6f, 0x80, 0x50, 0x36, 0x1e, 0xe3, 0xdb, + 0xa9, 0x1c, 0xa5, 0xc1, 0x1a, 0xa2, 0x5e, 0xb4, + 0xd6, 0x79, 0x27, 0x5c, 0xc5, 0x78, 0x80, 0x63, + 0xa5, 0xf1, 0x97, 0x41, 0x12, 0x0c, 0x4f, 0x2d, + 0xe2, 0xad, 0xeb, 0xeb, 0x10, 0xa2, 0x98, 0xdd, +]; + +#[rustfmt::skip] +const HMAC_C6_256: [u8; 32] = [ + 0x60, 0xe4, 0x31, 0x59, 0x1e, 0xe0, 0xb6, 0x7f, + 0x0d, 0x8a, 0x26, 0xaa, 0xcb, 0xf5, 0xb7, 0x7f, + 0x8e, 0x0b, 0xc6, 0x21, 0x37, 0x28, 0xc5, 0x14, + 0x05, 0x46, 0x04, 0x0f, 0x0e, 0xe3, 0x7f, 0x54, +]; + +#[rustfmt::skip] +const HMAC_C6_384: [u8; 48] = [ + 0x4e, 0xce, 0x08, 0x44, 0x85, 0x81, 0x3e, 0x90, + 0x88, 0xd2, 0xc6, 0x3a, 0x04, 0x1b, 0xc5, 0xb4, + 0x4f, 0x9e, 0xf1, 0x01, 0x2a, 0x2b, 0x58, 0x8f, + 0x3c, 0xd1, 0x1f, 0x05, 0x03, 0x3a, 0xc4, 0xc6, + 0x0c, 0x2e, 0xf6, 0xab, 0x40, 0x30, 0xfe, 0x82, + 0x96, 0x24, 0x8d, 0xf1, 0x63, 0xf4, 0x49, 0x52, +]; + +#[rustfmt::skip] +const HMAC_C6_512: [u8; 64] = [ + 0x80, 0xb2, 0x42, 0x63, 0xc7, 0xc1, 0xa3, 0xeb, + 0xb7, 0x14, 0x93, 0xc1, 0xdd, 0x7b, 0xe8, 0xb4, + 0x9b, 0x46, 0xd1, 0xf4, 0x1b, 0x4a, 0xee, 0xc1, + 0x12, 0x1b, 0x01, 0x37, 0x83, 0xf8, 0xf3, 0x52, + 0x6b, 0x56, 0xd0, 0x37, 0xe0, 0x5f, 0x25, 0x98, + 0xbd, 0x0f, 0xd2, 0x21, 0x5d, 0x6a, 0x1e, 0x52, + 0x95, 0xe6, 0x4f, 0x73, 0xf6, 0x3f, 0x0a, 0xec, + 0x8b, 0x91, 0x5a, 0x98, 0x5d, 0x78, 0x65, 0x98, +]; + +#[rustfmt::skip] +const HMAC_C7_256: [u8; 32] = [ + 0x9b, 0x09, 0xff, 0xa7, 0x1b, 0x94, 0x2f, 0xcb, + 0x27, 0x63, 0x5f, 0xbc, 0xd5, 0xb0, 0xe9, 0x44, + 0xbf, 0xdc, 0x63, 0x64, 0x4f, 0x07, 0x13, 0x93, + 0x8a, 0x7f, 0x51, 0x53, 0x5c, 0x3a, 0x35, 0xe2, +]; + +#[rustfmt::skip] +const HMAC_C7_384: [u8; 48] = [ + 0x66, 0x17, 0x17, 0x8e, 0x94, 0x1f, 0x02, 0x0d, + 0x35, 0x1e, 0x2f, 0x25, 0x4e, 0x8f, 0xd3, 0x2c, + 0x60, 0x24, 0x20, 0xfe, 0xb0, 0xb8, 0xfb, 0x9a, + 0xdc, 0xce, 0xbb, 0x82, 0x46, 0x1e, 0x99, 0xc5, + 0xa6, 0x78, 0xcc, 0x31, 0xe7, 0x99, 0x17, 0x6d, + 0x38, 0x60, 0xe6, 0x11, 0x0c, 0x46, 0x52, 0x3e, +]; + +#[rustfmt::skip] +const HMAC_C7_512: [u8; 64] = [ + 0xe3, 0x7b, 0x6a, 0x77, 0x5d, 0xc8, 0x7d, 0xba, + 0xa4, 0xdf, 0xa9, 0xf9, 0x6e, 0x5e, 0x3f, 0xfd, + 0xde, 0xbd, 0x71, 0xf8, 0x86, 0x72, 0x89, 0x86, + 0x5d, 0xf5, 0xa3, 0x2d, 0x20, 0xcd, 0xc9, 0x44, + 0xb6, 0x02, 0x2c, 0xac, 0x3c, 0x49, 0x82, 0xb1, + 0x0d, 0x5e, 0xeb, 0x55, 0xc3, 0xe4, 0xde, 0x15, + 0x13, 0x46, 0x76, 0xfb, 0x6d, 0xe0, 0x44, 0x60, + 0x65, 0xc9, 0x74, 0x40, 0xfa, 0x8c, 0x6a, 0x58, +]; + +// === diagnostic: SHA of the 131-byte (2-block) RFC-4231 case-6 key === + +#[rustfmt::skip] +const K6_384: [u8; 48] = [ + 0xad, 0x51, 0xdd, 0xb7, 0x80, 0x48, 0x4e, 0xc6, + 0xce, 0xb4, 0x96, 0xbc, 0xc1, 0xe2, 0x4e, 0xf8, + 0x23, 0x20, 0xe2, 0xe2, 0x68, 0x7d, 0x6c, 0xba, + 0xef, 0x37, 0xcf, 0x9f, 0x47, 0xc5, 0xa6, 0xfd, + 0xda, 0xe5, 0x19, 0xe9, 0x6c, 0x98, 0x6f, 0x45, + 0x97, 0x5d, 0xbc, 0x31, 0xb8, 0x09, 0x91, 0x37, +]; + +#[rustfmt::skip] +const K6_512: [u8; 64] = [ + 0xe1, 0xb5, 0x2c, 0x4f, 0xf8, 0xce, 0x9c, 0x4b, + 0x60, 0xbd, 0x8e, 0xc7, 0x85, 0xab, 0x7b, 0xf3, + 0xdf, 0xfc, 0x70, 0x23, 0xf7, 0xc5, 0x15, 0x88, + 0xf9, 0x6b, 0x94, 0xee, 0xba, 0x80, 0xca, 0x3b, + 0x9b, 0x9e, 0xd0, 0x5a, 0xb2, 0xac, 0x87, 0x97, + 0xbb, 0x70, 0x39, 0xd6, 0x81, 0xf2, 0xe4, 0x1f, + 0xcf, 0xe6, 0xdd, 0xda, 0xb2, 0xe9, 0x51, 0x22, + 0xd9, 0xc7, 0x16, 0xc2, 0xb8, 0x40, 0x6b, 0xd4, +]; + +// === diagnostic: HMAC-SHA512 #6 inner = SHA512(K0^ipad ‖ msg) === +#[rustfmt::skip] +const HMAC6_512_INNER: [u8; 64] = [ + 0x8e, 0xe4, 0xc6, 0x81, 0xf4, 0x7a, 0xfd, 0x0c, + 0x0c, 0x42, 0x5b, 0x8e, 0x23, 0x27, 0x43, 0x04, + 0x8d, 0xe6, 0xb5, 0xa3, 0x7c, 0x77, 0x85, 0x43, + 0x49, 0xd1, 0x34, 0xa1, 0x74, 0xe4, 0xe5, 0x82, + 0xc5, 0xfc, 0x6f, 0x55, 0xb6, 0xfd, 0xbd, 0xb9, + 0xf8, 0xc0, 0x87, 0x9a, 0xad, 0x1e, 0x87, 0xda, + 0xb6, 0x94, 0x4f, 0xd4, 0x30, 0x28, 0x8b, 0x24, + 0x8d, 0xfb, 0x0c, 0x3f, 0x6b, 0xf4, 0xb3, 0xbf, +]; diff --git a/target/ast10x0/tests/peripherals/i2c/i2c_init/system.json5 b/target/ast10x0/tests/peripherals/i2c/i2c_init/system.json5 index 91aaebac..fc775aef 100644 --- a/target/ast10x0/tests/peripherals/i2c/i2c_init/system.json5 +++ b/target/ast10x0/tests/peripherals/i2c/i2c_init/system.json5 @@ -13,6 +13,6 @@ flash_start_address: 0x00000500, // After vector table flash_size_bytes: 262144, // 256KB for kernel code (in RAM) ram_start_address: 0x00040500, // RAM starts after code - ram_size_bytes: 393216, // 384KB for data + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) }, } diff --git a/target/ast10x0/tests/peripherals/i2c/i2c_irq/slave_system.json5 b/target/ast10x0/tests/peripherals/i2c/i2c_irq/slave_system.json5 index 3a30e0f5..2e672a0e 100644 --- a/target/ast10x0/tests/peripherals/i2c/i2c_irq/slave_system.json5 +++ b/target/ast10x0/tests/peripherals/i2c/i2c_irq/slave_system.json5 @@ -12,6 +12,6 @@ flash_start_address: 0x00000500, flash_size_bytes: 262144, ram_start_address: 0x00040500, - ram_size_bytes: 393216, + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) }, } diff --git a/target/ast10x0/tests/peripherals/i2c/i2c_irq/system.json5 b/target/ast10x0/tests/peripherals/i2c/i2c_irq/system.json5 index c11b564b..bc5cc4d3 100644 --- a/target/ast10x0/tests/peripherals/i2c/i2c_irq/system.json5 +++ b/target/ast10x0/tests/peripherals/i2c/i2c_irq/system.json5 @@ -14,6 +14,6 @@ flash_start_address: 0x00000500, // After vector table flash_size_bytes: 262144, // 256KB for kernel code (in RAM) ram_start_address: 0x00040500, // RAM starts after code - ram_size_bytes: 393216, // 384KB for data + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) }, } diff --git a/target/ast10x0/tests/peripherals/i2c/i2c_slave_rx/master_system.json5 b/target/ast10x0/tests/peripherals/i2c/i2c_slave_rx/master_system.json5 index 62af5992..f32bb66e 100644 --- a/target/ast10x0/tests/peripherals/i2c/i2c_slave_rx/master_system.json5 +++ b/target/ast10x0/tests/peripherals/i2c/i2c_slave_rx/master_system.json5 @@ -13,6 +13,6 @@ flash_start_address: 0x00000500, flash_size_bytes: 262144, // 256KB ram_start_address: 0x00040500, - ram_size_bytes: 393216, // 384KB + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) }, } diff --git a/target/ast10x0/tests/peripherals/i2c/i2c_slave_rx/system.json5 b/target/ast10x0/tests/peripherals/i2c/i2c_slave_rx/system.json5 index 96d9f406..e616a9e5 100644 --- a/target/ast10x0/tests/peripherals/i2c/i2c_slave_rx/system.json5 +++ b/target/ast10x0/tests/peripherals/i2c/i2c_slave_rx/system.json5 @@ -13,6 +13,6 @@ flash_start_address: 0x00000500, // After vector table flash_size_bytes: 262144, // 256KB for kernel code (in RAM) ram_start_address: 0x00040500, // RAM starts after code - ram_size_bytes: 393216, // 384KB for data + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) }, } diff --git a/target/ast10x0/tests/peripherals/i2c/i2c_slave_rx_ipc/master_system.json5 b/target/ast10x0/tests/peripherals/i2c/i2c_slave_rx_ipc/master_system.json5 index 5f50abb7..5ed25ec0 100644 --- a/target/ast10x0/tests/peripherals/i2c/i2c_slave_rx_ipc/master_system.json5 +++ b/target/ast10x0/tests/peripherals/i2c/i2c_slave_rx_ipc/master_system.json5 @@ -13,6 +13,6 @@ flash_start_address: 0x00000500, flash_size_bytes: 262144, // 256KB ram_start_address: 0x00040500, - ram_size_bytes: 393216, // 384KB + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) }, } diff --git a/target/ast10x0/tests/peripherals/i3c/i3c_init/BUILD.bazel b/target/ast10x0/tests/peripherals/i3c/i3c_init/BUILD.bazel new file mode 100644 index 00000000..8be8d5d3 --- /dev/null +++ b/target/ast10x0/tests/peripherals/i3c/i3c_init/BUILD.bazel @@ -0,0 +1,79 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@pigweed//pw_kernel/tooling:system_image.bzl", "system_image", "system_image_test") +load("@pigweed//pw_kernel/tooling:target_codegen.bzl", "target_codegen") +load("@pigweed//pw_kernel/tooling:target_linker_script.bzl", "target_linker_script") +load("@pigweed//pw_kernel/tooling/panic_detector:rust_binary_no_panics_test.bzl", "rust_binary_no_panics_test") +load("@rules_rust//rust:defs.bzl", "rust_binary") +load("//target/ast10x0:defs.bzl", "TARGET_COMPATIBLE_WITH") + +system_image( + name = "i3c", + kernel = ":target", + platform = "//target/ast10x0", + system_config = ":system_config", + tags = ["kernel"], + userspace = False, +) + +system_image_test( + name = "i3c_init_test", + image = ":i3c", + tags = ["hardware"], + target_compatible_with = select({ + "//target/ast10x0:qemu_enabled": ["@platforms//:incompatible"], + "//conditions:default": [], + }), +) + +rust_binary_no_panics_test( + name = "no_panics_test", + binary = ":i3c", + tags = ["kernel"], +) + +filegroup( + name = "system_config", + srcs = ["system.json5"], +) + +target_codegen( + name = "codegen", + arch = "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + system_config = ":system_config", + target_compatible_with = TARGET_COMPATIBLE_WITH, +) + +target_linker_script( + name = "linker_script", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + template = "//target/ast10x0:linker_script_template", +) + +rust_binary( + name = "target", + srcs = ["target.rs"], + edition = "2024", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + deps = [ + ":codegen", + ":linker_script", + "//target/ast10x0:config", + "//target/ast10x0:entry", + "//target/ast10x0/board:ast10x0_board", + "//target/ast10x0/peripherals", + "@ast1060_pac", + "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + "@pigweed//pw_kernel/kernel", + "@pigweed//pw_kernel/subsys/console:console_backend", + "@pigweed//pw_kernel/target:target_common", + "@pigweed//pw_log/rust:pw_log", + "@pigweed//pw_status/rust:pw_status", + "@rust_crates//:cortex-m", + "@rust_crates//:cortex-m-semihosting", + ], +) diff --git a/target/ast10x0/tests/peripherals/i3c/i3c_init/README.md b/target/ast10x0/tests/peripherals/i3c/i3c_init/README.md new file mode 100644 index 00000000..cc31d8d5 --- /dev/null +++ b/target/ast10x0/tests/peripherals/i3c/i3c_init/README.md @@ -0,0 +1,17 @@ +# AST10x0 I3C init smoke test + +Mirrors `tests/peripherals/i2c/i2c_init`. Brings up the I3C controller via the +`ast10x0_peripherals::i3c` driver (ported from `aspeed-rust/src/i3c/`; see +`target/ast10x0/peripherals/i3c/plans/goal.md`) and verifies the init-time +hardware state. + +What runs where: + +- **Build + `no_panics_test`** (`--config=virt_ast10x0`, kernel tag): the binary + must compile and be panic-free. This is the CI gate under QEMU. +- **`i3c_init_test`** (`hardware` tag): executes the init/register-verify on real + hardware only — `target_compatible_with` marks it incompatible when + `qemu_enabled`, because QEMU `ast1030-evb` does not model the I3C pads/PHY. + +Pass/fail is signalled by writing `TEST_RESULT:PASS` / `TEST_RESULT:FAIL` to the +console, the same sentinel protocol the I2C tests use. diff --git a/target/ast10x0/tests/peripherals/i3c/i3c_init/system.json5 b/target/ast10x0/tests/peripherals/i3c/i3c_init/system.json5 new file mode 100644 index 00000000..4c654338 --- /dev/null +++ b/target/ast10x0/tests/peripherals/i3c/i3c_init/system.json5 @@ -0,0 +1,18 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +// AST10x0 Kernel I3C Test Configuration +// Uses the same memory layout as the kernel-only / I2C tests. +{ + arch: { + type: "armv7m", + vector_table_start_address: 0x00000000, + vector_table_size_bytes: 1280, // 0x500 (320 vectors) + }, + kernel: { + flash_start_address: 0x00000500, // After vector table + flash_size_bytes: 262144, // 256KB for kernel code (in RAM) + ram_start_address: 0x00040500, // RAM starts after code + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) + }, +} diff --git a/target/ast10x0/tests/peripherals/i3c/i3c_init/target.rs b/target/ast10x0/tests/peripherals/i3c/i3c_init/target.rs new file mode 100644 index 00000000..67319fc6 --- /dev/null +++ b/target/ast10x0/tests/peripherals/i3c/i3c_init/target.rs @@ -0,0 +1,115 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +#![no_std] +#![no_main] + +//! I3C controller init smoke test. +//! +//! Brings up I3C bus 0 (`PAC I3c`) through the `ast10x0_peripherals::i3c` +//! driver — the behavioral-parity port of `aspeed-rust/src/i3c/` +//! (see `target/ast10x0/peripherals/i3c/plans/goal.md`). Validates the clock +//! configuration, constructs the controller behind the confined-`unsafe` +//! façade with a busy-spin yield hook, runs the `Uninitialized -> Ready` +//! bring-up (`start()`), and (on real hardware) verifies the +//! controller-enable bit. Reports PASS/FAIL via the console sentinel, +//! matching the I2C tests. + +use ast10x0_board::{Ast10x0Board, Ast10x0BoardDescriptor}; +use ast10x0_peripherals::i3c::{Ast1060I3c, I3cConfig, I3cController}; +use ast10x0_peripherals::scu::pinctrl; +use codegen as _; +use console_backend::console_backend_write_all; +use entry as _; +use target_common::{declare_target, TargetInterface}; + +pub struct Target {} + +/// One driver type serves every bus; the instance is selected at runtime. +type I3cHw = Ast1060I3c; +/// Bus index under test (PAC `I3c`, the first instance). +const I3C_BUS: u8 = 0; + +/// Busy-spin yield hook (bare-metal wait policy). A named `fn` (not a closure) +/// keeps the `I3cCore` type nameable for the `singleton!` storage. +fn yield_spin(_ns: u32) { + core::hint::spin_loop(); +} + +/// Example platform core clock (Hz) for timing computation. The AST1060 I3C +/// core is fed from the HCLK domain; 200 MHz is a representative value and is +/// only used to derive the timing-register fields during `init`. +const CORE_CLK_HZ: u32 = 200_000_000; +/// Target I3C push-pull SCL (12.5 MHz, SDR0). +const I3C_SCL_HZ: u32 = 12_500_000; +/// Target legacy-I2C SCL (Fast-mode, 400 kHz). +const I2C_SCL_HZ: u32 = 400_000; + +fn run_i3c_init_smoke_test() -> Result<(), &'static str> { + pw_log::info!("=== AST10x0 I3C init smoke test ==="); + + let board = Ast10x0Board::new(Ast10x0BoardDescriptor { + pinctrl_groups: &[pinctrl::PINCTRL_I3C0], + i2c_buses: &[], + }); + // SAFETY: Test target runs once at boot with exclusive access to the board. + unsafe { board.init() }.expect("board init failed"); + pw_log::info!("Board-level pinctrl applied for I3C1"); + + let mut config = I3cConfig::new() + .core_clk_hz(CORE_CLK_HZ) + .i3c_scl_hz(I3C_SCL_HZ) + .i2c_scl_hz(I2C_SCL_HZ); + config.core_period = 1_000_000_000 / CORE_CLK_HZ; + + config + .validate_clock() + .map_err(|_| "i3c clock validation failed")?; + pw_log::info!("Clock configuration validated"); + + // SAFETY: the test owns I3C bus 0 for its lifetime and uses the matching + // PAC register blocks; the busy-spin hook is the bare-metal wait policy. + let hw = unsafe { I3cHw::new(I3C_BUS, yield_spin) }.ok_or("invalid I3C bus index")?; + let ctrl = I3cController::new(hw, &mut config); + pw_log::info!("Controller constructed"); + + // `start()` claims the IRQ slot (single-shot) and programs the hardware. + // This smoke test leaves the NVIC line masked (its system.json5 has no + // I3C vector entry), so no interrupt can be delivered. + let _ctrl = ctrl.start().map_err(|_| "controller start failed")?; + pw_log::info!("controller start complete"); + + // On real hardware the controller-enable bit must be set after a primary + // (non-secondary) init. QEMU `ast1030-evb` does not model the I3C block, so + // the on-hardware register check is exercised only by the hardware-tagged + // `i3c_init_test`; here we confirm the bring-up sequence ran to completion. + // SAFETY: exclusive ownership of I3C bus 0 during the test. + let regs = unsafe { &*ast1060_pac::I3c::ptr() }; + let enabled = regs.i3cd000().read().enbl_i3cctrl().bit_is_set(); + pw_log::info!("i3cd000.enbl_i3cctrl = {}", enabled as u8); + + pw_log::info!("=== AST10x0 I3C init smoke test complete ==="); + Ok(()) +} + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 Kernel I3C"; + + fn main() -> ! { + let sentinel: &[u8] = match run_i3c_init_smoke_test() { + Ok(()) => b"TEST_RESULT:PASS\n", + Err(error) => { + pw_log::error!("I3C init smoke test failed: {}", error as &str); + b"TEST_RESULT:FAIL\n" + } + }; + + if console_backend_write_all(sentinel).is_err() { + pw_log::error!("failed to write test result sentinel"); + } + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/peripherals/i3c/i3c_irq/BUILD.bazel b/target/ast10x0/tests/peripherals/i3c/i3c_irq/BUILD.bazel new file mode 100644 index 00000000..f1193cac --- /dev/null +++ b/target/ast10x0/tests/peripherals/i3c/i3c_irq/BUILD.bazel @@ -0,0 +1,139 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@pigweed//pw_kernel/tooling:system_image.bzl", "system_image") +load("@pigweed//pw_kernel/tooling:target_codegen.bzl", "target_codegen") +load("@pigweed//pw_kernel/tooling:target_linker_script.bzl", "target_linker_script") +load("@pigweed//pw_kernel/tooling/panic_detector:rust_binary_no_panics_test.bzl", "rust_binary_no_panics_test") +load("@rules_rust//rust:defs.bzl", "rust_binary") +load("//target/ast10x0:defs.bzl", "TARGET_COMPATIBLE_WITH", "system_image_test") + +COMMON_DEPS = [ + "//target/ast10x0:config", + "//target/ast10x0:entry", + "//target/ast10x0/board:ast10x0_board", + "//target/ast10x0/peripherals", + "@ast1060_pac", + "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + "@pigweed//pw_kernel/kernel", + "@pigweed//pw_kernel/subsys/console:console_backend", + "@pigweed//pw_kernel/target:target_common", + "@pigweed//pw_log/rust:pw_log", + "@pigweed//pw_status/rust:pw_status", + "@rust_crates//:cortex-m", + "@rust_crates//:cortex-m-semihosting", +] + +# --------------------------------------------------------------------------- +# Controller image (device A) +# --------------------------------------------------------------------------- + +filegroup( + name = "system_config", + srcs = ["system.json5"], +) + +target_codegen( + name = "codegen", + arch = "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + system_config = ":system_config", + target_compatible_with = TARGET_COMPATIBLE_WITH, +) + +target_linker_script( + name = "linker_script", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + template = "//target/ast10x0:linker_script_template", +) + +rust_binary( + name = "target", + srcs = ["target.rs"], + edition = "2024", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + deps = [ + ":codegen", + ":linker_script", + ] + COMMON_DEPS, +) + +system_image( + name = "controller", + kernel = ":target", + platform = "//target/ast10x0", + system_config = ":system_config", + tags = ["kernel"], + userspace = False, +) + +system_image_test( + name = "irq_test", + image = ":controller", + slave_image = ":slave", + tags = ["hardware"], + target_compatible_with = select({ + "//target/ast10x0:qemu_enabled": ["@platforms//:incompatible"], + "//conditions:default": [], + }), +) + +rust_binary_no_panics_test( + name = "no_panics_test", + binary = ":controller", + tags = ["kernel"], +) + +# --------------------------------------------------------------------------- +# Target image (device B) +# --------------------------------------------------------------------------- + +filegroup( + name = "slave_system_config", + srcs = ["slave_system.json5"], +) + +target_codegen( + name = "slave_codegen", + arch = "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + crate_name = "codegen", + system_config = ":slave_system_config", + target_compatible_with = TARGET_COMPATIBLE_WITH, +) + +target_linker_script( + name = "slave_linker_script", + system_config = ":slave_system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + template = "//target/ast10x0:linker_script_template", +) + +rust_binary( + name = "slave_target", + srcs = ["slave_target.rs"], + edition = "2024", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + deps = [ + ":slave_codegen", + ":slave_linker_script", + ] + COMMON_DEPS, +) + +system_image( + name = "slave", + kernel = ":slave_target", + platform = "//target/ast10x0", + system_config = ":slave_system_config", + tags = ["kernel"], + userspace = False, +) + +rust_binary_no_panics_test( + name = "slave_no_panics_test", + binary = ":slave", + tags = ["kernel"], +) diff --git a/target/ast10x0/tests/peripherals/i3c/i3c_irq/slave_system.json5 b/target/ast10x0/tests/peripherals/i3c/i3c_irq/slave_system.json5 new file mode 100644 index 00000000..f44b90d7 --- /dev/null +++ b/target/ast10x0/tests/peripherals/i3c/i3c_irq/slave_system.json5 @@ -0,0 +1,23 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +// AST10x0 I3C IBI Test — target image (device B). Same layout as the controller. +{ + arch: { + type: "armv7m", + vector_table_start_address: 0x00000000, + vector_table_size_bytes: 1536, // 0x600: exception vectors + PW_KERNEL_INTERRUPT_TABLE_ARRAY up to IRQ 104 + }, + kernel: { + flash_start_address: 0x00000600, + flash_size_bytes: 262144, + ram_start_address: 0x00040600, + ram_size_bytes: 391680, // ends at RAM_NC boundary (0x000A0000) + interrupt_table: { + table: { + // I3C2 IRQ (bus 2, used by the HV IBI test). + "104": "crate::i3c2_irq", + }, + }, + }, +} diff --git a/target/ast10x0/tests/peripherals/i3c/i3c_irq/slave_target.rs b/target/ast10x0/tests/peripherals/i3c/i3c_irq/slave_target.rs new file mode 100644 index 00000000..bb3fd128 --- /dev/null +++ b/target/ast10x0/tests/peripherals/i3c/i3c_irq/slave_target.rs @@ -0,0 +1,340 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! I3C In-Band-Interrupt test — target side (device B). +//! +//! Faithful openprot port of aspeed-rust `tests-hw/src/i3c_test.rs::test_i3c_target` +//! (@ ce3b567). Companion to `target.rs`; runs on the AST1060 Test Harness on +//! I3C **bus 2** (PAC `I3c2`) HV pads (`PINCTRL_HVI3C2`). +//! +//! Boot order (mirrors the reference): power **the controller first**, then this +//! target — the controller must already be draining the IBI work queue when this +//! target raises its Hot-Join. +//! +//! Flow (mirrors the reference): come up in secondary mode, attach a device, +//! raise a Hot-Join, wait for the controller to assign a dynamic address, then +//! send 10 IBIs (each making a 16-byte payload available for the controller to +//! read). Panic-hygiene-only differences from the reference (Delta D9). +//! +//! Under QEMU this image is build- + `no_panics`-checked; the real exchange runs +//! under the `hardware`-tagged `irq_test` (`--config=k_ast1060_evb`). + +#![no_std] +#![no_main] + +use ast10x0_board::{Ast10x0Board, Ast10x0BoardDescriptor}; +use ast10x0_peripherals::i3c::{ + i3c_ibi_workq_consumer, Ast1060I3c, I3cConfig, I3cController, I3cTargetConfig, IbiConsumer, + IbiWork, +}; +use ast10x0_peripherals::scu::pinctrl; +use codegen as _; +use console_backend::console_backend_write_all; +use cortex_m::peripheral::NVIC; +use entry as _; +use kernel::Kernel; +use target_common::{declare_target, TargetInterface}; + +pub struct Target {} + +/// One driver type serves every bus; the instance is selected at runtime. +type I3cHw = Ast1060I3c; + +/// Bus index under test (PAC `I3c2`, HV pads). +const I3C_BUS: u8 = 2; + +/// Number of IBIs the target raises once it has a dynamic address. +const MAX_IBIS: u32 = 10; +/// Give the controller time to finish init and open the hot-join ACK window. +const HOT_JOIN_STARTUP_DELAY_SPINS: u32 = 0x1000_0000; +/// Re-raise hot-join while waiting in case the first request hit the NACK window. +const HOT_JOIN_RETRY_SPINS: u32 = 0x0400_0000; +/// Maximum hot-join retry windows. +const HOT_JOIN_MAX_RETRIES: u32 = 64; +const WAIT_MASTER_WRITE_SPINS: u32 = 0x0400_0000; +const XFER_DATA_LEN: usize = 16; + +fn spin_wait(mut cycles: u32) { + while cycles != 0 { + core::hint::spin_loop(); + cycles = cycles.wrapping_sub(1); + } +} + +/// Read-only register snapshot for debugging (never pops a queue). +fn dump_slave_i3c2(label: u32) { + let regs = unsafe { &*ast1060_pac::I3c2::ptr() }; + let status = regs.i3cd03c().read().bits(); + let queue = regs.i3cd04c().read().bits(); + let present = regs.i3cd054().read().bits(); + let event_ctrl = regs.i3cd038().read().bits(); + let dev_addr = regs.i3cd004().read().bits(); + pw_log::info!( + "[SDUMP{}] status={:08x} queue={:08x}", + label as u32, + status as u32, + queue as u32 + ); + pw_log::info!( + "[SDUMP{}] present={:08x} event_ctrl={:08x}", + label as u32, + present as u32, + event_ctrl as u32 + ); + pw_log::info!("[SDUMP{}] dev_addr={:08x}", label as u32, dev_addr as u32); +} + +/// Log a compact hot-join error code. +fn log_hot_join_err(e: ast10x0_peripherals::i3c::I3cError) { + use ast10x0_peripherals::i3c::I3cError; + let code: u32 = match e { + I3cError::Access => 1, + I3cError::Invalid => 2, + _ => 0xff, + }; + pw_log::error!("target_raise_hot_join failed: code={}", code as u32); +} + +fn log_target_hj_state(label: u32) { + let regs = unsafe { &*ast1060_pac::I3c2::ptr() }; + let dev_addr = regs.i3cd004().read().bits(); + let event_ctrl = regs.i3cd038().read().bits(); + let device_char = regs.i3cd008().read().bits(); + pw_log::info!( + "[DBG] target hj label={} dev_addr={}", + label as u32, + dev_addr as u32 + ); + pw_log::info!( + "[DBG] target hj event_ctrl={} device_char={}", + event_ctrl as u32, + device_char as u32 + ); +} + +/// Logs the first [`XFER_DATA_LEN`] bytes of a received master write. The +/// work item's inline buffer is larger (`IBI_MWR_DATA_MAX`); this test only +/// exchanges 16-byte payloads. +fn log_target_master_write(exchange: u32, len: u8, data: &[u8]) { + let mut d = [0u8; XFER_DATA_LEN]; + let take = data.len().min(d.len()); + d[..take].copy_from_slice(&data[..take]); + let w0 = u32::from_be_bytes([d[0], d[1], d[2], d[3]]); + let w1 = u32::from_be_bytes([d[4], d[5], d[6], d[7]]); + let w2 = u32::from_be_bytes([d[8], d[9], d[10], d[11]]); + let w3 = u32::from_be_bytes([d[12], d[13], d[14], d[15]]); + pw_log::info!( + "TARGET_RX_FROM_MASTER #{} {}B {:08x} {:08x} {:08x} {:08x}", + exchange as u32, + len as u32, + w0 as u32, + w1 as u32, + w2 as u32, + w3 as u32 + ); +} + +fn log_target_read_payload(ibi_count: u32, data: &[u8; XFER_DATA_LEN]) { + let w0 = u32::from_be_bytes([data[0], data[1], data[2], data[3]]); + let w1 = u32::from_be_bytes([data[4], data[5], data[6], data[7]]); + let w2 = u32::from_be_bytes([data[8], data[9], data[10], data[11]]); + let w3 = u32::from_be_bytes([data[12], data[13], data[14], data[15]]); + pw_log::info!( + "TARGET_TX_TO_MASTER #{} 16B {:08x} {:08x} {:08x} {:08x}", + ibi_count as u32, + w0 as u32, + w1 as u32, + w2 as u32, + w3 as u32 + ); +} + +fn wait_for_master_write(ibi_cons: &mut IbiConsumer, exchange: u32) -> Result<(), &'static str> { + let mut spin_count = 0u32; + loop { + let Some(work) = ibi_cons.dequeue() else { + core::hint::spin_loop(); + spin_count = spin_count.wrapping_add(1); + if spin_count >= WAIT_MASTER_WRITE_SPINS { + return Err("master write not received"); + } + continue; + }; + + match work { + IbiWork::Overflow => return Err("IBI queue overflow"), + IbiWork::TargetMasterWrite { len, data, .. } => { + log_target_master_write(exchange, len, &data); + return Ok(()); + } + IbiWork::TargetDaAssignment => pw_log::info!("[IBI] TargetDaAssignment"), + IbiWork::HotJoin => pw_log::info!("[IBI] hotjoin"), + IbiWork::Sirq { addr, len, .. } => { + pw_log::info!("[IBI] SIRQ from 0x{:02x} len {}", addr as u32, len as u32); + } + } + } +} + +/// Calibrated busy-wait used as the driver's yield/delay hook. Mirrors the +/// reference `DummyDelay::delay_ns` (busy-loop of ~`ns / 100` nops). A named +/// `fn` (not a closure) keeps the driver type nameable. +fn yield_delay(ns: u32) { + for _ in 0..(ns / 100) { + core::hint::spin_loop(); + } +} + +/// Build + validate the configuration in its own `#[inline(never)]` frame so +/// builder temporaries are freed on return — the kernel bootstrap stack is +/// only 2 KiB and the config embeds the ~0.5 KiB device tables. The caller +/// keeps the single live config and lends it to the controller (`&mut`). +#[inline(never)] +fn build_config() -> Result { + // Secondary (target) timing — identical to the reference target. + let mut config = I3cConfig::new() + .core_clk_hz(200_000_000) + .secondary(true) + .i2c_scl_hz(1_000_000) + .i3c_scl_hz(12_500_000) + .i3c_pp_scl_hi_period_ns(36) + .i3c_pp_scl_lo_period_ns(36) + .i3c_od_scl_hi_period_ns(0) + .i3c_od_scl_lo_period_ns(0) + .sda_tx_hold_ns(0) + .dcr(0xcc) + .target_config(I3cTargetConfig::new(0, Some(9), 0xae)); + config.init_runtime_fields(); + config + .validate_clock() + .map_err(|_| "invalid clock configuration")?; + Ok(config) +} + +fn run_target() -> Result<(), &'static str> { + pw_log::info!("####### I3C target test #######"); + + let board = Ast10x0Board::new(Ast10x0BoardDescriptor { + pinctrl_groups: &[pinctrl::PINCTRL_HVI3C2], + i2c_buses: &[], + }); + // SAFETY: single call at boot with exclusive access to the board. + unsafe { board.init() }.expect("board init failed"); + + // Build the config in a separate (never-inlined) frame, keep the single + // live copy here, and lend it to the controller — see `build_config`. + let mut config = build_config()?; + // SAFETY: the test owns I3C bus 2 and uses the matching PAC blocks. + let hw = unsafe { I3cHw::new(I3C_BUS, yield_delay) }.ok_or("invalid I3C bus index")?; + let mut ctrl = I3cController::new(hw, &mut config) + .start() + .map_err(|_| "controller start failed")?; + let bus = ctrl.bus_num() as usize; + let mut ibi_cons = i3c_ibi_workq_consumer(bus).ok_or("IBI consumer unavailable")?; + pw_log::info!("IBI work queue ready on bus {}", bus as u32); + + // Kernel vector is in place and the handler is registered; this + // integration layer owns the NVIC line for the bus it selected + // (`I3C_BUS` = 2 -> `Interrupt::i3c2`), so unmask it now. + // SAFETY: handler registered and hardware initialized (Ready state); + // unmasking cannot deliver an IRQ into partially-initialized state. + unsafe { NVIC::unmask(ast1060_pac::Interrupt::i3c2) }; + + pw_log::info!("waiting before hot-join..."); + spin_wait(HOT_JOIN_STARTUP_DELAY_SPINS); + pw_log::info!("raising hot-join; waiting for dynamic address assignment..."); + if let Err(e) = ctrl.target_raise_hot_join() { + log_hot_join_err(e); + } + log_target_hj_state(0); + + // Wait for the controller to assign our dynamic address. + let mut spin_count = 0u32; + let mut retries = 0u32; + loop { + let Some(work) = ibi_cons.dequeue() else { + core::hint::spin_loop(); + spin_count = spin_count.wrapping_add(1); + if spin_count & (HOT_JOIN_RETRY_SPINS - 1) == 0 { + retries += 1; + if retries > HOT_JOIN_MAX_RETRIES { + // Fail instead of waiting forever. + return Err( + "hot-join: exceeded retry budget waiting for dynamic address assignment", + ); + } + pw_log::info!("[DBG] retry hot-join, attempt {}", retries as u32); + if let Err(e) = ctrl.target_raise_hot_join() { + log_hot_join_err(e); + } + log_target_hj_state(1); + } + continue; + }; + match work { + IbiWork::Overflow => return Err("IBI queue overflow"), + IbiWork::TargetDaAssignment => { + let da = ctrl.target_dynamic_address(); + if let Some(da) = da { + pw_log::info!("[IBI] dyn addr 0x{:02x} assigned by master", da as u32); + } + ctrl.target_on_dynamic_address_assigned(); + break; + } + IbiWork::HotJoin => pw_log::info!("[IBI] hotjoin"), + IbiWork::Sirq { addr, len, .. } => { + pw_log::info!("[IBI] SIRQ from 0x{:02x} len {}", addr as u32, len as u32); + } + IbiWork::TargetMasterWrite { len, data, .. } => { + log_target_master_write(0, len, &data); + } + } + } + + // Raise IBIs, each presenting a 16-byte incrementing payload for the master. + let mut ibi_count = 0u32; + while ibi_count < MAX_IBIS { + let mut data = [0u8; XFER_DATA_LEN]; + for (i, b) in data.iter_mut().enumerate() { + *b = u8::try_from(i).unwrap_or(0); + } + dump_slave_i3c2(ibi_count); + if ctrl.target_get_ibi_payload(&mut data).is_err() { + dump_slave_i3c2(0xdead); + return Err("target_get_ibi_payload failed"); + } + log_target_read_payload(ibi_count, &data); + wait_for_master_write(&mut ibi_cons, ibi_count)?; + ibi_count += 1; + } + + pw_log::info!("I3C target test done"); + Ok(()) +} + +pub fn i3c2_irq(_k: K) { + ast10x0_peripherals::i3c::dispatch_i3c_irq(2); +} + +codegen::declare_kernel_interrupt_handlers!(); + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 Kernel I3C IBI (target)"; + + fn main() -> ! { + let sentinel: &[u8] = match run_target() { + Ok(()) => b"TEST_RESULT:PASS\n", + Err(error) => { + pw_log::error!("I3C IBI target test failed: {}", error as &str); + b"TEST_RESULT:FAIL\n" + } + }; + if console_backend_write_all(sentinel).is_err() { + pw_log::error!("failed to write target test result sentinel"); + } + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/peripherals/i3c/i3c_irq/system.json5 b/target/ast10x0/tests/peripherals/i3c/i3c_irq/system.json5 new file mode 100644 index 00000000..91a7c0ce --- /dev/null +++ b/target/ast10x0/tests/peripherals/i3c/i3c_irq/system.json5 @@ -0,0 +1,24 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +// AST10x0 I3C IBI Test — controller image (device A). Single kernel binary; +// memory layout mirrors i3c_init / i2c_irq to keep the linker happy. +{ + arch: { + type: "armv7m", + vector_table_start_address: 0x00000000, + vector_table_size_bytes: 1536, // 0x600: exception vectors + PW_KERNEL_INTERRUPT_TABLE_ARRAY up to IRQ 104 + }, + kernel: { + flash_start_address: 0x00000600, // After vector table + flash_size_bytes: 262144, // 256KB for kernel code (in RAM) + ram_start_address: 0x00040600, // RAM starts after code + ram_size_bytes: 391680, // ends at RAM_NC boundary (0x000A0000) + interrupt_table: { + table: { + // I3C2 IRQ (bus 2, used by the HV IBI test). + "104": "crate::i3c2_irq", + }, + }, + }, +} diff --git a/target/ast10x0/tests/peripherals/i3c/i3c_irq/target.rs b/target/ast10x0/tests/peripherals/i3c/i3c_irq/target.rs new file mode 100644 index 00000000..39250b12 --- /dev/null +++ b/target/ast10x0/tests/peripherals/i3c/i3c_irq/target.rs @@ -0,0 +1,387 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! I3C In-Band-Interrupt test — controller side (device A). +//! +//! Faithful openprot port of aspeed-rust `tests-hw/src/i3c_test.rs::test_i3c_master` +//! (@ ce3b567). Runs on the AST1060 Test Harness with I3C **bus 2** (PAC `I3c2`) +//! wired between device A and device B on the **HV** pads (`PINCTRL_HVI3C2`), the +//! same bus/pad set the reference uses. Load the `:slave` image on device B. +//! +//! Boot order (mirrors the reference): bring up **this controller first** so it +//! is already draining the IBI work queue, then power the target — the target +//! raises a Hot-Join which this controller answers by assigning a dynamic +//! address. +//! +//! Flow (mirrors the reference): bring up the controller, pre-attach a device by +//! PID, enable its IBI, then drain the IBI work queue — on Hot-Join assign a +//! dynamic address; on a target SIR do a private read followed by a private +//! write; stop after 10 exchanges. +//! +//! Differences from the reference are panic-hygiene only (Delta D9): `unwrap`s +//! become `?`/`pw_log`, and `DummyDelay` (a no-op in the reference) is dropped. +//! Under QEMU this image is build- + `no_panics`-checked; the two-device run is +//! the `hardware`-tagged `irq_test` (`--config=k_ast1060_evb`). + +#![no_std] +#![no_main] + +use ast10x0_board::{Ast10x0Board, Ast10x0BoardDescriptor}; +use ast10x0_peripherals::i3c::{ + i3c_ibi_workq_consumer, Ast1060I3c, I3cConfig, I3cController, IbiWork, Ready, +}; +use ast10x0_peripherals::scu::pinctrl; +use codegen as _; +use console_backend::console_backend_write_all; +use cortex_m::peripheral::NVIC; +use entry as _; +use kernel::Kernel; +use target_common::{declare_target, TargetInterface}; + +pub struct Target {} + +/// One driver type serves every bus; the instance is selected at runtime. +type I3cHw = Ast1060I3c; +type I3c2Controller<'c> = I3cController<'c, I3cHw, Ready>; + +/// Bus index under test (PAC `I3c2`, HV pads). +const I3C_BUS: u8 = 2; + +/// PID of the peer target (matches the `:slave` image / the reference). +const KNOWN_PID: u64 = 0x07ec_a003_2000; +/// Stop after this many master<->target exchanges. +const MAX_EXCHANGES: u32 = 10; +const XFER_DATA_LEN: usize = 16; +const WAIT_LOG_SPINS: u32 = 0x0400_0000; +/// Maximum consecutive idle spins while waiting for IBI work. +const MAX_WAIT_SPINS: u32 = WAIT_LOG_SPINS * 8; + +/// Calibrated busy-wait used as the driver's yield/delay hook. Mirrors the +/// reference `DummyDelay::delay_ns` (busy-loop of ~`ns / 100` nops). A named +/// `fn` (not a closure) keeps the driver type nameable. +fn yield_delay(ns: u32) { + for _ in 0..(ns / 100) { + core::hint::spin_loop(); + } +} + +fn log_master_read_payload(exchange: u32, len: u32, data: &[u8; XFER_DATA_LEN]) { + let w0 = u32::from_be_bytes([data[0], data[1], data[2], data[3]]); + let w1 = u32::from_be_bytes([data[4], data[5], data[6], data[7]]); + let w2 = u32::from_be_bytes([data[8], data[9], data[10], data[11]]); + let w3 = u32::from_be_bytes([data[12], data[13], data[14], data[15]]); + pw_log::info!( + "MASTER_RX_FROM_TARGET #{} {}B {:08x} {:08x} {:08x} {:08x}", + exchange as u32, + len as u32, + w0 as u32, + w1 as u32, + w2 as u32, + w3 as u32 + ); +} + +fn log_master_write_payload(exchange: u32, data: &[u8; XFER_DATA_LEN]) { + let w0 = u32::from_be_bytes([data[0], data[1], data[2], data[3]]); + let w1 = u32::from_be_bytes([data[4], data[5], data[6], data[7]]); + let w2 = u32::from_be_bytes([data[8], data[9], data[10], data[11]]); + let w3 = u32::from_be_bytes([data[12], data[13], data[14], data[15]]); + pw_log::info!( + "MASTER_TX_TO_TARGET #{} 16B {:08x} {:08x} {:08x} {:08x}", + exchange as u32, + w0 as u32, + w1 as u32, + w2 as u32, + w3 as u32 + ); +} + +/// Build + validate the configuration in its own `#[inline(never)]` frame so +/// builder temporaries are freed on return — the kernel bootstrap stack is +/// only 2 KiB and the config embeds the ~0.5 KiB device tables. The caller +/// keeps the single live config and lends it to the controller (`&mut`). +#[inline(never)] +fn build_config() -> Result { + // Controller (primary) timing — identical to the reference master. + let mut config = I3cConfig::new() + .core_clk_hz(200_000_000) + .secondary(false) + .i2c_scl_hz(1_000_000) + .i3c_scl_hz(12_500_000) + .i3c_pp_scl_hi_period_ns(250) + .i3c_pp_scl_lo_period_ns(250) + .i3c_od_scl_hi_period_ns(0) + .i3c_od_scl_lo_period_ns(0) + .sda_tx_hold_ns(20); + config.init_runtime_fields(); + config + .validate_clock() + .map_err(|_| "invalid clock configuration")?; + Ok(config) +} + +/// Read-only register snapshot for debugging (never pops a queue). +fn dump_i3c2(label: u32) { + let regs = unsafe { &*ast1060_pac::I3c2::ptr() }; + let status = regs.i3cd03c().read().bits(); + let queue = regs.i3cd04c().read().bits(); + let present = regs.i3cd054().read().bits(); + let dat0 = regs.i3cd280().read().bits(); + pw_log::info!( + "[DUMP{}] status={:08x} queue={:08x}", + label as u32, + status as u32, + queue as u32 + ); + pw_log::info!( + "[DUMP{}] present={:08x} dat0={:08x}", + label as u32, + present as u32, + dat0 as u32 + ); + let dev_addr = regs.i3cd004().read().bits(); + let sir_rej = regs.i3cd030().read().bits(); + let sten = regs.i3cd040().read().bits(); + let sgen = regs.i3cd044().read().bits(); + pw_log::info!( + "[DUMP{}] dev_addr={:08x} sir_reject={:08x}", + label as u32, + dev_addr as u32, + sir_rej as u32 + ); + pw_log::info!( + "[DUMP{}] status_en={:08x} signal_en={:08x}", + label as u32, + sten as u32, + sgen as u32 + ); +} + +#[inline(never)] +fn master_read_from_target( + ctrl: &mut I3c2Controller<'_>, +) -> Result<(u32, [u8; XFER_DATA_LEN]), &'static str> { + let mut rx_buf = [0u8; 128]; + let actual_len = ctrl + .priv_read(KNOWN_PID, &mut rx_buf) + .map_err(|_| "private read failed")?; + let mut data = [0u8; XFER_DATA_LEN]; + let take = (actual_len as usize).min(data.len()).min(rx_buf.len()); + data[..take].copy_from_slice(&rx_buf[..take]); + Ok((actual_len, data)) +} + +#[inline(never)] +fn master_write_to_target( + ctrl: &mut I3c2Controller<'_>, + exchange: u32, +) -> Result<(), &'static str> { + let mut tx_buf: [u8; XFER_DATA_LEN] = [ + 0xde, 0xad, 0xbe, 0xef, 0xca, 0xfe, 0xba, 0xbe, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, + 0x88, + ]; + ctrl.priv_write(KNOWN_PID, &mut tx_buf) + .map_err(|_| "private write failed")?; + log_master_write_payload(exchange, &tx_buf); + Ok(()) +} + +fn run_controller() -> Result<(), &'static str> { + pw_log::info!("####### I3C master test #######"); + + let board = Ast10x0Board::new(Ast10x0BoardDescriptor { + pinctrl_groups: &[pinctrl::PINCTRL_HVI3C2], + i2c_buses: &[], + }); + // SAFETY: single call at boot with exclusive access to the board. + unsafe { board.init() }.expect("board init failed"); + + // Build the config in a separate (never-inlined) frame, keep the single + // live copy here, and lend it to the controller — see `build_config`. + let mut config = build_config()?; + // SAFETY: the test owns I3C bus 2 and uses the matching PAC blocks. + let hw = unsafe { I3cHw::new(I3C_BUS, yield_delay) }.ok_or("invalid I3C bus index")?; + let mut ctrl = I3cController::new(hw, &mut config).start().map_err(|e| { + use ast10x0_peripherals::i3c::I3cError; + // 1=InvalidParam (validate_clock), 2=Timeout (reset-poll in init), + // 3=Busy (IRQ slot already claimed), 0xff=anything else. + let code: u32 = match e { + I3cError::InvalidParam => 1, + I3cError::Timeout => 2, + I3cError::Busy => 3, + _ => 0xff, + }; + pw_log::error!("controller start failed: code={}", code as u32); + "controller start failed" + })?; + let bus = ctrl.bus_num() as usize; + let mut ibi_cons = i3c_ibi_workq_consumer(bus).ok_or("IBI consumer unavailable")?; + pw_log::info!("IBI work queue ready on bus {}", bus as u32); + + // The kernel vector (system.json5 IRQ 104 -> `i3c2_irq`) is in place and + // the handler is registered; this integration layer owns the NVIC line + // for the bus it selected (`I3C_BUS` = 2 -> `Interrupt::i3c2`), so unmask + // it now. + // SAFETY: handler registered and hardware initialized (Ready state); + // unmasking cannot deliver an IRQ into partially-initialized state. + unsafe { NVIC::unmask(ast1060_pac::Interrupt::i3c2) }; + pw_log::info!("I3C2 controller ready"); + + let dyn_addr = 8; + ctrl.attach_i3c_dev(KNOWN_PID, dyn_addr, 0) + .map_err(|_| "attach_i3c_dev failed")?; + pw_log::info!("pre-attached dev at slot 0, dyn addr {}", dyn_addr as u32); + + let mut received = 0u32; + let mut spin_count = 0u32; + loop { + let Some(work) = ibi_cons.dequeue() else { + core::hint::spin_loop(); + spin_count = spin_count.wrapping_add(1); + if spin_count >= MAX_WAIT_SPINS { + return Err("timed out waiting for IBI work"); + } + if spin_count & (WAIT_LOG_SPINS - 1) == 0 { + let irq_count = I3C2_IRQ_COUNT.load(core::sync::atomic::Ordering::Relaxed); + let status = I3C2_LAST_STATUS.load(core::sync::atomic::Ordering::Relaxed); + let queue_status = + I3C2_LAST_QUEUE_STATUS.load(core::sync::atomic::Ordering::Relaxed); + let status_en = I3C2_LAST_STATUS_EN.load(core::sync::atomic::Ordering::Relaxed); + let signal_en = I3C2_LAST_SIGNAL_EN.load(core::sync::atomic::Ordering::Relaxed); + let ibi_count = (queue_status >> 24) & 0x1f; + let ibi_buf_blr = (queue_status >> 16) & 0xff; + let resp_blr = (queue_status >> 8) & 0xff; + pw_log::info!( + "[DBG] waiting irq_count={} spin={}", + irq_count as u32, + spin_count as u32 + ); + pw_log::info!( + "[DBG] i3c2 status={} queue={}", + status as u32, + queue_status as u32 + ); + pw_log::info!( + "[DBG] i3c2 ibi_count={} ibi_buf_blr={}", + ibi_count as u32, + ibi_buf_blr as u32 + ); + pw_log::info!( + "[DBG] i3c2 resp_blr={} status_en={}", + resp_blr as u32, + status_en as u32 + ); + pw_log::info!( + "[DBG] i3c2 signal_en={} reserved={}", + signal_en as u32, + 0 as u32 + ); + } + continue; + }; + // Measure consecutive idle time only. + spin_count = 0; + match work { + IbiWork::Overflow => return Err("IBI queue overflow"), + IbiWork::HotJoin => { + pw_log::info!("[IBI] hotjoin"); + dump_i3c2(0); + ctrl.handle_hot_join() + .map_err(|_| "handle_hot_join failed")?; + match ctrl.assign_dynamic_address(dyn_addr) { + Ok(da) => pw_log::info!("DA assigned: 0x{:02x}", da as u32), + Err(e) => { + use ast10x0_peripherals::i3c::I3cError; + // 1=ENTDAA failed (AddrInUse), 2=GETPID/GETBCR failed + // (Invalid), 3=bookkeeping/IBI-enable failed (Other), + // 0xff=anything else + let code: u32 = match e { + I3cError::AddrInUse => 1, + I3cError::Invalid => 2, + I3cError::Other => 3, + _ => 0xff, + }; + pw_log::error!("assign_dynamic_address failed: code={}", code as u32); + // DA assignment failure invalidates the test. + return Err("assign_dynamic_address failed"); + } + } + dump_i3c2(1); + } + IbiWork::Sirq { addr, len, .. } => { + pw_log::info!("[IBI] SIRQ from 0x{:02x} len {}", addr as u32, len as u32); + ctrl.acknowledge_ibi(addr) + .map_err(|_| "acknowledge_ibi failed")?; + + let exchange = received; + let (read_len, read_data) = master_read_from_target(&mut ctrl)?; + log_master_read_payload(exchange, read_len, &read_data); + + master_write_to_target(&mut ctrl, exchange)?; + received += 1; + + if received >= MAX_EXCHANGES { + pw_log::info!("I3C master test done"); + return Ok(()); + } + } + IbiWork::TargetDaAssignment => pw_log::info!("[IBI] TargetDaAssignment"), + IbiWork::TargetMasterWrite { len, .. } => { + pw_log::info!("[IBI] TargetMasterWrite len {}", len as u32); + } + } + } +} + +static I3C2_IRQ_COUNT: core::sync::atomic::AtomicU32 = core::sync::atomic::AtomicU32::new(0); +static I3C2_LAST_STATUS: core::sync::atomic::AtomicU32 = core::sync::atomic::AtomicU32::new(0); +static I3C2_LAST_QUEUE_STATUS: core::sync::atomic::AtomicU32 = + core::sync::atomic::AtomicU32::new(0); +static I3C2_LAST_STATUS_EN: core::sync::atomic::AtomicU32 = core::sync::atomic::AtomicU32::new(0); +static I3C2_LAST_SIGNAL_EN: core::sync::atomic::AtomicU32 = core::sync::atomic::AtomicU32::new(0); + +pub fn i3c2_irq(_k: K) { + // Do not read i3cd018 here: that register pops the IBI queue entry. + let regs = unsafe { &*ast1060_pac::I3c2::ptr() }; + I3C2_LAST_STATUS.store( + regs.i3cd03c().read().bits(), + core::sync::atomic::Ordering::Relaxed, + ); + I3C2_LAST_QUEUE_STATUS.store( + regs.i3cd04c().read().bits(), + core::sync::atomic::Ordering::Relaxed, + ); + I3C2_LAST_STATUS_EN.store( + regs.i3cd040().read().bits(), + core::sync::atomic::Ordering::Relaxed, + ); + I3C2_LAST_SIGNAL_EN.store( + regs.i3cd044().read().bits(), + core::sync::atomic::Ordering::Relaxed, + ); + I3C2_IRQ_COUNT.fetch_add(1, core::sync::atomic::Ordering::Relaxed); + ast10x0_peripherals::i3c::dispatch_i3c_irq(2); +} + +codegen::declare_kernel_interrupt_handlers!(); + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 Kernel I3C IBI (controller)"; + + fn main() -> ! { + let sentinel: &[u8] = match run_controller() { + Ok(()) => b"TEST_RESULT:PASS\n", + Err(error) => { + pw_log::error!("I3C IBI controller test failed: {}", error as &str); + b"TEST_RESULT:FAIL\n" + } + }; + if console_backend_write_all(sentinel).is_err() { + pw_log::error!("failed to write controller test result sentinel"); + } + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/peripherals/sgpiom/sgpiom_smoke/system.json5 b/target/ast10x0/tests/peripherals/sgpiom/sgpiom_smoke/system.json5 index 30eb85e7..d3e435a1 100644 --- a/target/ast10x0/tests/peripherals/sgpiom/sgpiom_smoke/system.json5 +++ b/target/ast10x0/tests/peripherals/sgpiom/sgpiom_smoke/system.json5 @@ -12,6 +12,6 @@ flash_start_address: 0x00000500, flash_size_bytes: 262144, ram_start_address: 0x00040500, - ram_size_bytes: 393216, + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) }, } diff --git a/target/ast10x0/tests/smc/dma_irq/system.json5 b/target/ast10x0/tests/smc/dma_irq/system.json5 index ed5fedc9..a9564688 100644 --- a/target/ast10x0/tests/smc/dma_irq/system.json5 +++ b/target/ast10x0/tests/smc/dma_irq/system.json5 @@ -12,7 +12,7 @@ flash_start_address: 0x00000500, flash_size_bytes: 262144, ram_start_address: 0x00040500, - ram_size_bytes: 393216, + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) interrupt_table: { table: { // FMC IRQ. diff --git a/target/ast10x0/tests/smc/read/BUILD.bazel b/target/ast10x0/tests/smc/read/BUILD.bazel index d740fafe..d437777e 100644 --- a/target/ast10x0/tests/smc/read/BUILD.bazel +++ b/target/ast10x0/tests/smc/read/BUILD.bazel @@ -50,6 +50,29 @@ rust_binary( ], ) +rust_binary( + name = "target_spi2", + srcs = [ + "target_spi2.rs", + "//target/ast10x0/tests/smc:target_debug.rs", + ], + edition = "2024", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + deps = [ + ":codegen", + ":linker_script", + "//target/ast10x0:entry", + "//target/ast10x0/board:ast10x0_board", + "//target/ast10x0/peripherals", + "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + "@pigweed//pw_kernel/kernel", + "@pigweed//pw_kernel/subsys/console:console_backend", + "@pigweed//pw_kernel/target:target_common", + "@pigweed//pw_log/rust:pw_log", + ], +) + rust_binary( name = "target", srcs = [ @@ -95,6 +118,28 @@ system_image_test( visibility = ["//visibility:public"], ) +system_image( + name = "smc_spi2_read_test", + kernel = ":target_spi2", + platform = "//target/ast10x0", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + userspace = False, + visibility = ["//visibility:public"], +) + +system_image_test( + name = "smc_spi2_read_evb_test", + image = ":smc_spi2_read_test", + tags = ["hardware"], + target_compatible_with = select({ + "//target/ast10x0:qemu_enabled": ["@platforms//:incompatible"], + "//conditions:default": [], + }), + visibility = ["//visibility:public"], +) + rust_binary_no_panics_test( name = "spi1_no_panics_test", binary = ":smc_spi1_read_test", diff --git a/target/ast10x0/tests/smc/read/system.json5 b/target/ast10x0/tests/smc/read/system.json5 index ed5fedc9..a9564688 100644 --- a/target/ast10x0/tests/smc/read/system.json5 +++ b/target/ast10x0/tests/smc/read/system.json5 @@ -12,7 +12,7 @@ flash_start_address: 0x00000500, flash_size_bytes: 262144, ram_start_address: 0x00040500, - ram_size_bytes: 393216, + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) interrupt_table: { table: { // FMC IRQ. diff --git a/target/ast10x0/tests/smc/read/target_spi2.rs b/target/ast10x0/tests/smc/read/target_spi2.rs new file mode 100644 index 00000000..e3407062 --- /dev/null +++ b/target/ast10x0/tests/smc/read/target_spi2.rs @@ -0,0 +1,166 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! AST10x0 SMC SPI2 read smoke test target. + +#![no_std] +#![no_main] +use ast10x0_board::{apply_spim_external_mux, enable_flash_power}; +#[allow(unused_imports)] +use ast10x0_peripherals::scu::{ + pinctrl::{PINCTRL_SPI2_QUAD, PINCTRL_SPIM3_DEFAULT, PINCTRL_SPIM4_DEFAULT}, + ScuExtMuxSelect, ScuRegisters, SpiMonitorInstance, SpiMonitorPassthrough, SpiMonitorSource, +}; +use ast10x0_peripherals::smc::{ + ChipSelect, FlashConfig, SmcConfig, SmcController, SmcError, SmcTopology, SpiTransaction, + SpiUninit, TransferMode, +}; +use console_backend::console_backend_write_all; +use target_common::{declare_target, TargetInterface}; +use {console_backend as _, entry as _}; + +#[path = "../target_debug.rs"] +mod target_debug; +use target_debug::{dump_smc_read, dump_smc_register}; + +const SPI_FLASH_CONFIG: FlashConfig = FlashConfig { + capacity_mb: 32, + page_size: 256, + sector_size: 4096, + block_size: 65536, + spi_clock_mhz: 25, +}; + +pub struct Target {} + +fn config_spi2_master_controller() -> Result<(), SmcError> { + let scu = unsafe { ScuRegisters::new_global_unlocked() }; + scu.apply_pinctrl_group(PINCTRL_SPIM3_DEFAULT); + scu.apply_pinctrl_group(PINCTRL_SPIM4_DEFAULT); + scu.apply_pinctrl_group(PINCTRL_SPI2_QUAD); + if !enable_flash_power(&scu) { + pw_log::info!("GPIOL2/GPIOL3 flash power readback failed"); + return Err(SmcError::HardwareError); + } + apply_spim_external_mux(SpiMonitorInstance::Spim2, ScuExtMuxSelect::Mux1); + + // Configure the mux for the SPI master controller path. + scu.set_spim_internal_master_route(SpiMonitorInstance::Spim2, SpiMonitorSource::Spi2); + scu.set_spim_passthrough(SpiMonitorInstance::Spim2, SpiMonitorPassthrough::Enabled); + scu.set_spim_ext_mux(SpiMonitorInstance::Spim2, ScuExtMuxSelect::Mux1); + pw_log::info!("SCU pinmux and SPIM routing configured for SPI2 monitoring"); + + for _ in 0..1_000_000 { + core::hint::spin_loop(); + } + Ok(()) +} + +fn run_spi2_read_test() -> Result<(), SmcError> { + config_spi2_master_controller()?; + + let config = SmcConfig { + controller_id: SmcController::Spi2, + cs0: Some(SPI_FLASH_CONFIG), + cs1: None, + dma_enabled: true, + enable_interrupts: false, + topology: SmcTopology::NormalSpi { master_idx: 2 }, + }; + + pw_log::info!("=== AST10x0 SMC SPI2 read test ==="); + let spi = unsafe { SpiUninit::new(SmcController::Spi2, config)? }; + let mut spi = spi.init()?; + spi.spi_nor_read_init(ChipSelect::Cs0)?; + + if !spi.is_ready() { + return Err(SmcError::HardwareError); + } + + pw_log::info!("=== SPI2 controller register ==="); + dump_smc_register(0x7E64_0000, 16); + dump_smc_register(0x7E64_0080, 16); + pw_log::info!("=== SCU QSPI Mux routing register ==="); + dump_smc_register(0x7E6E_20F0, 2); + dump_smc_register(0x7E6E_2418, 2); + dump_smc_register(0x7e6e_2694, 2); + dump_smc_register(0x7E78_0020, 2); + dump_smc_register(0x7E78_0070, 2); + let mut jedec = [0u8; 3]; + SpiTransaction::transceive_user_with_spim( + &mut spi, + SpiMonitorInstance::Spim2, + ChipSelect::Cs0, + &[0x9f], + &[], + &mut jedec, + TransferMode::Mode111, + )?; + pw_log::info!( + "SPI2 CS0 JEDEC ID: {:02x} {:02x} {:02x}", + jedec[0] as u32, + jedec[1] as u32, + jedec[2] as u32 + ); + + if jedec[0] == 0xff { + pw_log::info!("SPI2 CS0 JEDEC manufacturer is 0xff; skipping read test"); + return Ok(()); + } + + pw_log::info!("=== SPI2 read ==="); + let mut buf = [0u8; 64]; + let n = SpiTransaction::read_with_spim( + &mut spi, + SpiMonitorInstance::Spim2, + ChipSelect::Cs0, + 0x0, + &mut buf, + )?; + if n != buf.len() { + return Err(SmcError::HardwareError); + } + dump_smc_read(&buf, buf.len() as u32); + + pw_log::info!("=== SPI2 DMA read @ 0x00000000 ==="); + let dma_buf = unsafe { core::slice::from_raw_parts_mut(0x41500 as *mut u8, 256) }; + let mut dma_txn = SpiTransaction::dma_read_with_spim( + &mut spi, + SpiMonitorInstance::Spim2, + ChipSelect::Cs0, + 0x0, + 0x41500usize, + dma_buf.len() as u32, + )?; + + loop { + match dma_txn.poll_dma_completion() { + core::task::Poll::Pending => {} + core::task::Poll::Ready(result) => { + result?; + break; + } + } + } + dump_smc_read(dma_buf, dma_buf.len() as u32); + + Ok(()) +} + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 SMC SPI2 read Test"; + + fn main() -> ! { + let sentinel = if run_spi2_read_test().is_ok() { + b"TEST_RESULT:PASS\n" + } else { + b"TEST_RESULT:FAIL\n" + }; + let _ = console_backend_write_all(sentinel); + + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/smc/write/system.json5 b/target/ast10x0/tests/smc/write/system.json5 index 6c3a1a65..fa1cac11 100644 --- a/target/ast10x0/tests/smc/write/system.json5 +++ b/target/ast10x0/tests/smc/write/system.json5 @@ -12,6 +12,6 @@ flash_start_address: 0x00000500, flash_size_bytes: 262144, ram_start_address: 0x00040500, - ram_size_bytes: 393216, + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) }, } diff --git a/target/ast10x0/tests/spimonitor/BUILD.bazel b/target/ast10x0/tests/spimonitor/BUILD.bazel new file mode 100644 index 00000000..8618bbf1 --- /dev/null +++ b/target/ast10x0/tests/spimonitor/BUILD.bazel @@ -0,0 +1,49 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@pigweed//pw_kernel/tooling:target_codegen.bzl", "target_codegen") +load("@pigweed//pw_kernel/tooling:target_linker_script.bzl", "target_linker_script") +load("//target/ast10x0:defs.bzl", "TARGET_COMPATIBLE_WITH") +load(":spimonitor_test.bzl", "spimonitor_setup_all", "spimonitor_test") + +filegroup( + name = "system_config", + srcs = ["system.json5"], +) + +target_codegen( + name = "codegen", + arch = "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m", + system_config = ":system_config", + target_compatible_with = TARGET_COMPATIBLE_WITH, +) + +target_linker_script( + name = "linker_script", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = TARGET_COMPATIBLE_WITH, + template = "//target/ast10x0:linker_script_template", +) + +spimonitor_test(1, TARGET_COMPATIBLE_WITH) + +spimonitor_test(2, TARGET_COMPATIBLE_WITH) + +spimonitor_test(3, TARGET_COMPATIBLE_WITH) + +spimonitor_test(4, TARGET_COMPATIBLE_WITH) + +spimonitor_setup_all(TARGET_COMPATIBLE_WITH) + +alias( + name = "target", + actual = ":target_spim1", + visibility = ["//visibility:public"], +) + +alias( + name = "spimonitor_test", + actual = ":spimonitor1_test", + visibility = ["//visibility:public"], +) diff --git a/target/ast10x0/tests/spimonitor/setup_all_spim.rs b/target/ast10x0/tests/spimonitor/setup_all_spim.rs new file mode 100644 index 00000000..d1ae10ea --- /dev/null +++ b/target/ast10x0/tests/spimonitor/setup_all_spim.rs @@ -0,0 +1,576 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Configure SPIM1 through SPIM4 and keep all monitors active. + +#![no_std] +#![no_main] + +use core::cell::UnsafeCell; + +#[path = "test_common.rs"] +mod test_common; + +use ast10x0_board::{ + apply_spim_external_mux, bmc_spim_csin_levels, bmc_spim_path_debug, delay_us, + enable_flash_power, release_spi_flash_resets, set_bmc_resets, spim_external_mux_state, +}; +use ast10x0_peripherals::scu::{ + pinctrl::PINCTRL_SPI1_QUAD, ScuExtMuxSelect, ScuRegisters, SpiMonitorInstance, SpiMonitorSource, +}; +use ast10x0_peripherals::smc::{ + ChipSelect, FlashConfig, SmcConfig, SmcController, SmcError, SmcTopology, SpiReady, SpiUninit, + TransferMode, +}; +use ast10x0_peripherals::spimonitor::registers::SpiMonitorRegisters; +use ast10x0_peripherals::spimonitor::{ + ConfiguredSpiMonitor, LockedSpiMonitor, PrivilegeDirection, PrivilegeOp, SpiMonitorController, + SpiMonitorPolicy, ViolationLogEntry, +}; +use target_common::{declare_target, TargetInterface}; +use test_common::TestConfig; +use {console_backend as _, entry as _}; + +struct Spim1Config; +struct Spim2Config; +struct Spim3Config; +struct Spim4Config; + +impl test_common::TestConfig for Spim1Config { + const INSTANCE: SpiMonitorInstance = SpiMonitorInstance::Spim0; + const CONTROLLER: SpiMonitorController = SpiMonitorController::Spim0; +} + +impl test_common::TestConfig for Spim2Config { + const INSTANCE: SpiMonitorInstance = SpiMonitorInstance::Spim1; + const CONTROLLER: SpiMonitorController = SpiMonitorController::Spim1; +} + +impl test_common::TestConfig for Spim3Config { + const INSTANCE: SpiMonitorInstance = SpiMonitorInstance::Spim2; + const CONTROLLER: SpiMonitorController = SpiMonitorController::Spim2; +} + +impl test_common::TestConfig for Spim4Config { + const INSTANCE: SpiMonitorInstance = SpiMonitorInstance::Spim3; + const CONTROLLER: SpiMonitorController = SpiMonitorController::Spim3; +} + +#[repr(align(16))] +struct LogRam(UnsafeCell<[u32; test_common::LOG_RAM_WORDS]>); + +// SAFETY: Each buffer is exclusively assigned to one SPIPF instance. +unsafe impl Sync for LogRam {} + +static SPIM1_LOG: LogRam = LogRam(UnsafeCell::new([0; test_common::LOG_RAM_WORDS])); +static SPIM2_LOG: LogRam = LogRam(UnsafeCell::new([0; test_common::LOG_RAM_WORDS])); +static SPIM3_LOG: LogRam = LogRam(UnsafeCell::new([0; test_common::LOG_RAM_WORDS])); +static SPIM4_LOG: LogRam = LogRam(UnsafeCell::new([0; test_common::LOG_RAM_WORDS])); + +const WRITE_PROTECTED_LENGTH: u32 = 0x0010_0000; +const MONITOR_POLL_INTERVAL_US: u32 = 10_000; +const BMC_CSIN_RECOVERY_TIMEOUT_US: u32 = 500_000; +const BMC_RECOVERY_RETRY_DELAY_US: u32 = 1_000_000; +const BMC_CSIN_MASK: u32 = (1 << 0) | (1 << 14); +const ENABLE_RUNTIME_DEBUG_LOGS: bool = false; +const BMC_FLASH_CONFIG: FlashConfig = FlashConfig { + capacity_mb: 128, + page_size: 256, + sector_size: 4096, + block_size: 65536, + spi_clock_mhz: 25, +}; +const ALLOW_COMMANDS: [u8; 32] = [ + 0x03, 0x13, 0x0b, 0x0c, 0x6b, 0x6c, 0x01, 0x05, 0x35, 0x06, 0x04, 0x20, 0x21, 0x9f, 0x5a, 0xb7, + 0xe9, 0x32, 0x34, 0xd8, 0xdc, 0x02, 0x12, 0x3b, 0x3c, 0x70, 0xbb, 0xbc, 0x50, 0xeb, 0xec, 0xc2, +]; + +fn log_buffer(log: &'static LogRam) -> &'static mut [u32] { + // SAFETY: The caller assigns each static buffer to exactly one monitor. + unsafe { &mut *log.0.get() } +} + +fn raw_log_word(log: &'static LogRam, index: usize) -> u32 { + // SAFETY: The index comes from the bounded SPIPF log pointer. + unsafe { core::ptr::read_volatile((*log.0.get()).as_ptr().add(index)) } +} + +fn log_violation(id: u32, index: u32, word: u32) { + match ViolationLogEntry::parse(word) { + ViolationLogEntry::BlockedCommand(command) => pw_log::info!( + "SPIM{} BLOCKED COMMAND log[{}]: cmd=0x{:02x}, raw=0x{:08x}", + id as u32, + index as u32, + command as u32, + word as u32 + ), + ViolationLogEntry::BlockedWriteAddr(address) => pw_log::info!( + "SPIM{} BLOCKED WRITE log[{}]: address=0x{:08x}, raw=0x{:08x}", + id as u32, + index as u32, + address as u32, + word as u32 + ), + ViolationLogEntry::BlockedReadAddr(address) => pw_log::info!( + "SPIM{} BLOCKED READ log[{}]: address=0x{:08x}, raw=0x{:08x}", + id as u32, + index as u32, + address as u32, + word as u32 + ), + ViolationLogEntry::Invalid(raw) => pw_log::info!( + "SPIM{} INVALID LOG log[{}]: raw=0x{:08x}", + id as u32, + index as u32, + raw as u32 + ), + } +} + +fn log_violation_status(id: u32, status: u32) { + pw_log::info!( + "SPIM{} status=0x{:08x}: command_blocked={}, write_blocked={}, read_blocked={}", + id as u32, + status as u32, + (status & (1 << 0) != 0) as u32, + (status & (1 << 1) != 0) as u32, + (status & (1 << 2) != 0) as u32 + ); +} + +fn acknowledge_violations(regs: &SpiMonitorRegisters) -> u32 { + let pending = regs.read_ctrl2() & 0x7; + if pending != 0 { + regs.modify_ctrl2(|bits| *bits |= pending); + } + pending +} + +macro_rules! runtime_debug { + ($($arg:tt)*) => { + if ENABLE_RUNTIME_DEBUG_LOGS { + pw_log::info!($($arg)*); + } + }; +} + +fn recover_bmc_path( + scu: &ScuRegisters, + spim1: &ConfiguredSpiMonitor, + spim2: &ConfiguredSpiMonitor, +) { + runtime_debug!("BMC recovery: asserting BMC reset"); + if !set_bmc_resets(true) { + runtime_debug!("BMC recovery: reset assertion readback failed"); + } + + runtime_debug!("BMC recovery: routing SPIM1/2 flashes to RoT"); + apply_spim_external_mux(Spim1Config::INSTANCE, ScuExtMuxSelect::Mux1); + delay_us(1_000); + + loop { + if !set_bmc_resets(true) { + runtime_debug!("BMC recovery: reset assertion readback failed"); + } + if spim_external_mux_state(Spim1Config::INSTANCE) != Some(ScuExtMuxSelect::Mux1) { + runtime_debug!( + "BMC recovery: RoT mux readback failed; retrying in {} us", + BMC_RECOVERY_RETRY_DELAY_US as u32 + ); + apply_spim_external_mux(Spim1Config::INSTANCE, ScuExtMuxSelect::Mux1); + delay_us(BMC_RECOVERY_RETRY_DELAY_US); + continue; + } + spim1.reset_filter_state(); + spim2.reset_filter_state(); + + runtime_debug!("BMC recovery: resetting and probing spi1@0 and spi1@1"); + if reset_bmc_flashes(scu, false).is_err() { + runtime_debug!( + "BMC recovery: flash reset/probe failed; retrying in {} us", + BMC_RECOVERY_RETRY_DELAY_US as u32 + ); + delay_us(BMC_RECOVERY_RETRY_DELAY_US); + continue; + } + + spim1.reset_filter_state(); + spim2.reset_filter_state(); + acknowledge_violations(spim1.regs()); + acknowledge_violations(spim2.regs()); + + runtime_debug!("BMC recovery: handing SPIM1/2 flashes back to BMC"); + apply_spim_external_mux(Spim1Config::INSTANCE, ScuExtMuxSelect::Mux0); + delay_us(60_000); + if spim_external_mux_state(Spim1Config::INSTANCE) != Some(ScuExtMuxSelect::Mux0) { + runtime_debug!( + "BMC recovery: BMC mux readback failed; retrying in {} us", + BMC_RECOVERY_RETRY_DELAY_US as u32 + ); + apply_spim_external_mux(Spim1Config::INSTANCE, ScuExtMuxSelect::Mux1); + delay_us(BMC_RECOVERY_RETRY_DELAY_US); + continue; + } + + if !set_bmc_resets(false) { + runtime_debug!( + "BMC recovery: reset release readback failed; retrying in {} us", + BMC_RECOVERY_RETRY_DELAY_US as u32 + ); + apply_spim_external_mux(Spim1Config::INSTANCE, ScuExtMuxSelect::Mux1); + delay_us(BMC_RECOVERY_RETRY_DELAY_US); + continue; + } + + runtime_debug!("BMC recovery: complete"); + return; + } +} + +fn monitor_spim_violations( + spim1: &ConfiguredSpiMonitor, + spim2: &ConfiguredSpiMonitor, + spim3: &LockedSpiMonitor, + spim4: &LockedSpiMonitor, +) -> ! { + let monitors = [ + (1u32, spim1.regs(), &SPIM1_LOG), + (2u32, spim2.regs(), &SPIM2_LOG), + (3u32, spim3.regs(), &SPIM3_LOG), + (4u32, spim4.regs(), &SPIM4_LOG), + ]; + let mut log_indices = [ + spim1.regs().read_log_idx_reg(), + spim2.regs().read_log_idx_reg(), + spim3.regs().read_log_idx_reg(), + spim4.regs().read_log_idx_reg(), + ]; + let mut poll_count = 0u32; + let mut bmc_csin_low_us = 0u32; + + if ENABLE_RUNTIME_DEBUG_LOGS { + for (id, regs, _) in monitors { + pw_log::info!( + "SPIM{} ctrl/status/lock=0x{:08x}/0x{:08x}/0x{:08x}", + id as u32, + regs.read_ctrl() as u32, + regs.read_ctrl2() as u32, + regs.read_lock_status() as u32 + ); + } + pw_log::info!("Monitoring BMC and host traffic; SPIPF logs blocked transactions only"); + } + + loop { + for (slot, (id, regs, log)) in monitors.iter().enumerate() { + let next_index = regs.read_log_idx_reg(); + if next_index != log_indices[slot] { + let status = regs.read_ctrl2(); + pw_log::info!( + "SPIM{} NEW VIOLATION: log {} -> {}", + *id as u32, + log_indices[slot] as u32, + next_index as u32 + ); + log_violation_status(*id, status); + + let end = next_index.min(test_common::LOG_RAM_WORDS as u32); + for index in log_indices[slot]..end { + log_violation(*id, index, raw_log_word(log, index as usize)); + } + + let acknowledged = acknowledge_violations(regs); + pw_log::info!( + "SPIM{} acknowledged status 0x{:08x}", + *id as u32, + acknowledged as u32 + ); + log_indices[slot] = next_index; + } + } + + let csin_levels = bmc_spim_csin_levels(); + if csin_levels != BMC_CSIN_MASK { + bmc_csin_low_us = bmc_csin_low_us.saturating_add(MONITOR_POLL_INTERVAL_US); + if bmc_csin_low_us >= BMC_CSIN_RECOVERY_TIMEOUT_US { + runtime_debug!( + "BMC CSIN timeout: levels=0x{:08x}, low for {} us", + csin_levels as u32, + bmc_csin_low_us as u32 + ); + let scu = unsafe { ScuRegisters::new_global_unlocked() }; + recover_bmc_path(&scu, spim1, spim2); + log_indices[0] = spim1.regs().read_log_idx_reg(); + log_indices[1] = spim2.regs().read_log_idx_reg(); + bmc_csin_low_us = 0; + } + } else { + bmc_csin_low_us = 0; + } + + poll_count = poll_count.wrapping_add(1); + if ENABLE_RUNTIME_DEBUG_LOGS && poll_count % 100 == 0 { + let scu = unsafe { ScuRegisters::new_global_unlocked() }; + let mux = match spim_external_mux_state(Spim1Config::INSTANCE) { + Some(ScuExtMuxSelect::Mux0) => 0u32, + Some(ScuExtMuxSelect::Mux1) => 1u32, + None => 0xffff_ffff, + }; + let host_mux = match spim_external_mux_state(Spim3Config::INSTANCE) { + Some(ScuExtMuxSelect::Mux0) => 0u32, + Some(ScuExtMuxSelect::Mux1) => 1u32, + None => 0xffff_ffff, + }; + let path = bmc_spim_path_debug(); + pw_log::info!( + "SPIM health: SCU0F0=0x{:08x}, mux BMC/host={}/{}, CSIN=0x{:08x}", + scu.route_control_raw() as u32, + mux as u32, + host_mux as u32, + bmc_spim_csin_levels() as u32 + ); + pw_log::info!( + "SPIM log_idx 1/2/3/4={}/{}/{}/{}", + monitors[0].1.read_log_idx_reg() as u32, + monitors[1].1.read_log_idx_reg() as u32, + monitors[2].1.read_log_idx_reg() as u32, + monitors[3].1.read_log_idx_reg() as u32 + ); + pw_log::info!( + "SPIM status 1/2/3/4=0x{:08x}/0x{:08x}/0x{:08x}/0x{:08x}", + monitors[0].1.read_ctrl2() as u32, + monitors[1].1.read_ctrl2() as u32, + monitors[2].1.read_ctrl2() as u32, + monitors[3].1.read_ctrl2() as u32 + ); + pw_log::info!( + "BMC path: SCU410/4B0/690=0x{:08x}/0x{:08x}/0x{:08x}, SCU610=0x{:08x}", + path.scu410 as u32, + path.scu4b0 as u32, + path.scu690 as u32, + path.scu610 as u32 + ); + pw_log::info!( + "BMC path: GPIO000/004=0x{:08x}/0x{:08x}, SGPIOM570/554=0x{:08x}/0x{:08x}", + path.gpio_data as u32, + path.gpio_direction as u32, + path.sgpio_latch as u32, + path.sgpio_config as u32 + ); + } + delay_us(MONITOR_POLL_INTERVAL_US); + } +} + +fn reset_one_bmc_flash( + scu: &ScuRegisters, + spi: &SpiReady, + monitor: SpiMonitorInstance, + chip_select: ChipSelect, +) -> Result<[u8; 3], SmcError> { + scu.set_spim_internal_mux(SpiMonitorSource::Spi1, monitor as u8 + 1) + .map_err(|_| SmcError::HardwareError)?; + let proprietary_state = scu.spim_proprietary_pre_config(); + + let result = (|| { + spi.transceive_user(chip_select, &[0x66], &[], &mut [], TransferMode::Mode111)?; + delay_us(10_000); + spi.transceive_user(chip_select, &[0x99], &[], &mut [], TransferMode::Mode111)?; + delay_us(50_000); + spi.transceive_user(chip_select, &[0xe9], &[], &mut [], TransferMode::Mode111)?; + + let mut jedec = [0u8; 3]; + spi.transceive_user(chip_select, &[0x9f], &[], &mut jedec, TransferMode::Mode111)?; + Ok(jedec) + })(); + + if let Some(state) = proprietary_state { + scu.spim_proprietary_post_config(state); + } + scu.clear_spim_internal_master_route(); + result +} + +fn reset_bmc_flashes(scu: &ScuRegisters, log_jedec: bool) -> Result<(), SmcError> { + scu.apply_pinctrl_group(PINCTRL_SPI1_QUAD); + let config = SmcConfig { + controller_id: SmcController::Spi1, + cs0: Some(BMC_FLASH_CONFIG), + cs1: Some(BMC_FLASH_CONFIG), + dma_enabled: false, + enable_interrupts: false, + topology: SmcTopology::HostSpi { master_idx: 0 }, + }; + let spi = unsafe { SpiUninit::new(SmcController::Spi1, config)? }.init()?; + + for (index, monitor, chip_select) in [ + (0u32, SpiMonitorInstance::Spim0, ChipSelect::Cs0), + (1u32, SpiMonitorInstance::Spim1, ChipSelect::Cs1), + ] { + let jedec = reset_one_bmc_flash(scu, &spi, monitor, chip_select)?; + if log_jedec { + pw_log::info!( + "spi1@{} reset complete, JEDEC ID: {:02x} {:02x} {:02x}", + index as u32, + jedec[0] as u32, + jedec[1] as u32, + jedec[2] as u32 + ); + } + if matches!(jedec, [0x00, 0x00, 0x00] | [0xff, 0xff, 0xff]) { + return Err(SmcError::HardwareError); + } + } + Ok(()) +} + +fn production_policy() -> SpiMonitorPolicy { + let mut policy = SpiMonitorPolicy::empty(); + policy.allow_commands.copy_from_slice(&ALLOW_COMMANDS); + policy.allow_command_count = ALLOW_COMMANDS.len(); + let _ = policy.add_region( + 0, + WRITE_PROTECTED_LENGTH, + PrivilegeDirection::Write, + PrivilegeOp::Disable, + ); + policy +} + +fn setup_all_spim() -> Result<(), test_common::TestError> { + let scu = unsafe { ScuRegisters::new_global_unlocked() }; + let policy = production_policy(); + //let spim4_policy = spim4_test_policy(); + + pw_log::info!("=== GPIO flash power ==="); + if !enable_flash_power(&scu) { + pw_log::info!("FAIL: GPIOL2/GPIOL3 flash power readback"); + return Err(test_common::TestError::Check); + } + pw_log::info!("PASS: GPIOL2 and GPIOL3 set high"); + + pw_log::info!("=== Release SPI flash reset outputs ==="); + if !release_spi_flash_resets() { + pw_log::info!("FAIL: SGPIOM CPU/BMC SPI reset outputs did not release"); + return Err(test_common::TestError::Check); + } + pw_log::info!("PASS: SGPIOM outputs 6 and 7 released high"); + + pw_log::info!("=== Hold BMC in reset ==="); + if !set_bmc_resets(true) { + pw_log::info!("FAIL: SGPIOM BMC reset outputs did not assert"); + return Err(test_common::TestError::Check); + } + pw_log::info!("PASS: SGPIOM outputs 8 and 9 asserted low"); + + pw_log::info!("=== SPIM1 ==="); + test_common::configure_wiring::(&scu)?; + let spim1 = test_common::initialize_monitor_with_policy::( + log_buffer(&SPIM1_LOG), + &policy, + )?; + test_common::dump_policy(&spim1, WRITE_PROTECTED_LENGTH)?; + test_common::validate_one_mib_write_protection(&spim1)?; + test_common::validate_filtering(&spim1)?; + + pw_log::info!("=== SPIM2 ==="); + test_common::configure_wiring::(&scu)?; + let spim2 = test_common::initialize_monitor_with_policy::( + log_buffer(&SPIM2_LOG), + &policy, + )?; + test_common::dump_policy(&spim2, WRITE_PROTECTED_LENGTH)?; + test_common::validate_one_mib_write_protection(&spim2)?; + test_common::validate_filtering(&spim2)?; + + pw_log::info!("=== SPIM3 ==="); + test_common::configure_wiring::(&scu)?; + let spim3 = test_common::initialize_monitor_with_policy::( + log_buffer(&SPIM3_LOG), + &policy, + )?; + test_common::dump_policy(&spim3, WRITE_PROTECTED_LENGTH)?; + test_common::validate_one_mib_write_protection(&spim3)?; + test_common::validate_filtering(&spim3)?; + let spim3 = test_common::lock_monitor(spim3)?; + + pw_log::info!("=== SPIM4 ==="); + test_common::configure_wiring::(&scu)?; + let spim4 = test_common::initialize_monitor_with_policy::( + log_buffer(&SPIM4_LOG), + &policy, + )?; + test_common::dump_policy(&spim4, WRITE_PROTECTED_LENGTH)?; + test_common::validate_one_mib_write_protection(&spim4)?; + test_common::validate_filtering(&spim4)?; + let spim4 = test_common::lock_monitor(spim4)?; + + if scu.route_control_raw() & 0x0fff_0000 != 0 { + pw_log::info!( + "FAIL: unexpected SCU flash-reset routing: 0x{:08x}", + scu.route_control_raw() as u32 + ); + return Err(test_common::TestError::Check); + } + pw_log::info!("All SPIM1-4 monitors are filtering traffic"); + pw_log::info!("SPIM3/4 policies are locked; SPIM1/2 match unlocked Zephyr runtime"); + pw_log::info!( + "SCU0F0 after SPIM setup: 0x{:08x}", + scu.route_control_raw() as u32 + ); + + pw_log::info!("=== Reset BMC flashes through internal SPI1 ==="); + if reset_bmc_flashes(&scu, true).is_err() { + pw_log::info!("FAIL: BMC flash reset/readback through SPI1"); + return Err(test_common::TestError::Check); + } + pw_log::info!("PASS: spi1@0 and spi1@1 are in a known SPI state"); + + pw_log::info!("=== Hand BMC flash mux to external BMC master ==="); + spim1.reset_filter_state(); + spim2.reset_filter_state(); + test_common::validate_filtering(&spim1)?; + test_common::validate_filtering(&spim2)?; + pw_log::info!( + "SPIM1/2 pre-release ctrl=0x{:08x}/0x{:08x}", + spim1.regs().read_ctrl() as u32, + spim2.regs().read_ctrl() as u32 + ); + + apply_spim_external_mux(Spim1Config::INSTANCE, ScuExtMuxSelect::Mux0); + if spim_external_mux_state(Spim1Config::INSTANCE) != Some(ScuExtMuxSelect::Mux0) { + pw_log::info!("FAIL: SPIM1/2 external BMC mux handoff"); + return Err(test_common::TestError::Check); + } + pw_log::info!("PASS: SPIM1/2 mux switched from RoT=1 to BMC=0"); + + pw_log::info!("Waiting 60 ms for flash routing to settle"); + delay_us(60_000); + + pw_log::info!("=== Release BMC reset ==="); + if !set_bmc_resets(false) { + pw_log::info!("FAIL: SGPIOM BMC reset outputs did not release"); + return Err(test_common::TestError::Check); + } + pw_log::info!("PASS: SGPIOM outputs 8 and 9 released high"); + + pw_log::info!("Firmware will remain active until the user stops or resets it"); + monitor_spim_violations(&spim1, &spim2, &spim3, &spim4) +} + +struct Target; + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 Setup All External SPI Monitors"; + + fn main() -> ! { + if setup_all_spim().is_err() { + pw_log::info!("FAIL: setup all SPIM monitors"); + } + + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/spimonitor/spimonitor_test.bzl b/target/ast10x0/tests/spimonitor/spimonitor_test.bzl new file mode 100644 index 00000000..e229ed10 --- /dev/null +++ b/target/ast10x0/tests/spimonitor/spimonitor_test.bzl @@ -0,0 +1,100 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@pigweed//pw_kernel/tooling:system_image.bzl", "system_image", "system_image_test") +load("@pigweed//pw_kernel/tooling/panic_detector:rust_binary_no_panics_test.bzl", "rust_binary_no_panics_test") +load("@rules_rust//rust:defs.bzl", "rust_binary") + +def spimonitor_test(index, target_compatible_with): + target_name = "target_spim{}".format(index) + image_name = "spimonitor{}_test".format(index) + + rust_binary( + name = target_name, + srcs = [ + "test_common.rs", + "test_spim{}.rs".format(index), + ], + crate_root = "test_spim{}.rs".format(index), + edition = "2024", + tags = ["kernel"], + target_compatible_with = target_compatible_with, + deps = [ + ":codegen", + ":linker_script", + "//target/ast10x0:entry", + "//target/ast10x0/board:ast10x0_board", + "//target/ast10x0/peripherals", + "@pigweed//pw_kernel/subsys/console:console_backend", + "@pigweed//pw_kernel/target:target_common", + "@pigweed//pw_log/rust:pw_log", + ], + ) + + system_image( + name = image_name, + kernel = ":" + target_name, + platform = "//target/ast10x0", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = target_compatible_with, + userspace = False, + visibility = ["//visibility:public"], + ) + + system_image_test( + name = "spimonitor{}_evb_test".format(index), + image = ":" + image_name, + tags = ["hardware"], + target_compatible_with = select({ + "//target/ast10x0:qemu_enabled": ["@platforms//:incompatible"], + "//conditions:default": [], + }), + visibility = ["//visibility:public"], + ) + + rust_binary_no_panics_test( + name = "spimonitor{}_no_panics_test".format(index), + binary = ":" + image_name, + tags = ["kernel"], + ) + +def spimonitor_setup_all(target_compatible_with): + rust_binary( + name = "setup_all_spim", + srcs = [ + "setup_all_spim.rs", + "test_common.rs", + ], + crate_root = "setup_all_spim.rs", + edition = "2024", + tags = ["kernel"], + target_compatible_with = target_compatible_with, + deps = [ + ":codegen", + ":linker_script", + "//target/ast10x0:entry", + "//target/ast10x0/board:ast10x0_board", + "//target/ast10x0/peripherals", + "@pigweed//pw_kernel/subsys/console:console_backend", + "@pigweed//pw_kernel/target:target_common", + "@pigweed//pw_log/rust:pw_log", + ], + ) + + system_image( + name = "setup_all_spim_image", + kernel = ":setup_all_spim", + platform = "//target/ast10x0", + system_config = ":system_config", + tags = ["kernel"], + target_compatible_with = target_compatible_with, + userspace = False, + visibility = ["//visibility:public"], + ) + + rust_binary_no_panics_test( + name = "setup_all_spim_no_panics_test", + binary = ":setup_all_spim_image", + tags = ["kernel"], + ) diff --git a/target/ast10x0/tests/spimonitor/system.json5 b/target/ast10x0/tests/spimonitor/system.json5 new file mode 100644 index 00000000..5c0e9ecb --- /dev/null +++ b/target/ast10x0/tests/spimonitor/system.json5 @@ -0,0 +1,17 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +// AST10x0 kernel-only SPI monitor smoke test configuration. +{ + arch: { + type: "armv7m", + vector_table_start_address: 0x00000000, + vector_table_size_bytes: 1280, + }, + kernel: { + flash_start_address: 0x00000500, + flash_size_bytes: 262144, + ram_start_address: 0x00040500, + ram_size_bytes: 391936, + }, +} diff --git a/target/ast10x0/tests/spimonitor/test_common.rs b/target/ast10x0/tests/spimonitor/test_common.rs new file mode 100644 index 00000000..928c6b5e --- /dev/null +++ b/target/ast10x0/tests/spimonitor/test_common.rs @@ -0,0 +1,326 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Shared AST10x0 external SPI monitor configuration tests. + +#![allow(dead_code)] + +use core::cell::UnsafeCell; + +use ast10x0_board::{apply_spim_external_mux, apply_spim_pinctrl, spim_external_mux_state}; +use ast10x0_peripherals::scu::{ + ScuError, ScuExtMuxSelect, ScuRegisters, SpiMonitorInstance, SpiMonitorPassthrough, + SpiMonitorSource, +}; +use ast10x0_peripherals::spimonitor::{ + ConfiguredSpiMonitor, LockState, PassthroughMode, PrivilegeDirection, PrivilegeOp, SpiMonitor, + SpiMonitorController, SpiMonitorError, SpiMonitorPolicy, SpiMonitorState, Uninitialized, +}; + +pub const PROTECTED_LENGTH: u32 = 0x0010_0000; +const LOG_RAM_BYTES: usize = 0x200; +pub const LOG_RAM_WORDS: usize = LOG_RAM_BYTES / core::mem::size_of::(); +const COMMAND_VALID_MASK: u32 = (1 << 30) | (1 << 31); +const COMMAND_LOCKED: u32 = 1 << 23; +const LOCK_REQUIRED: u32 = (1 << 0) | (1 << 1) | (1 << 4) | (1 << 5) | (1 << 30) | (1 << 31); + +pub trait TestConfig { + const INSTANCE: SpiMonitorInstance; + const CONTROLLER: SpiMonitorController; +} + +#[repr(align(16))] +struct LogRam(UnsafeCell<[u32; LOG_RAM_WORDS]>); + +// SAFETY: Each test image is single-threaded and owns one SPIPF log buffer. +unsafe impl Sync for LogRam {} + +static LOG_RAM: LogRam = LogRam(UnsafeCell::new([0; LOG_RAM_WORDS])); + +#[derive(Clone, Copy)] +pub enum TestError { + Monitor, + Scu, + Check, +} + +impl From for TestError { + fn from(_: SpiMonitorError) -> Self { + Self::Monitor + } +} + +impl From for TestError { + fn from(_: ScuError) -> Self { + Self::Scu + } +} + +macro_rules! test_check { + ($condition:expr, $message:literal) => { + if !$condition { + pw_log::info!($message); + return Err(TestError::Check); + } + }; +} + +fn log_buffer() -> &'static mut [u32] { + // SAFETY: The test is single-threaded and calls this exactly once. + unsafe { &mut *LOG_RAM.0.get() } +} + +pub fn configure_wiring(scu: &ScuRegisters) -> Result<(), TestError> { + pw_log::info!("START: external monitor pinctrl, routing, and mux"); + apply_spim_pinctrl(scu, C::INSTANCE); + scu.disable_spim_cs_internal_pull_down(C::INSTANCE); + + // SPIPF observes external BMC/host traffic. Do not detour SPI1 or SPI2. + scu.set_spim_internal_mux(SpiMonitorSource::Spi1, 0)?; + test_check!( + scu.route_control_raw() & 0x0f == 0, + "FAIL: internal SPI master detour is enabled" + ); + + // SCU passthrough enables the external signal path through SPIPF. + scu.set_spim_passthrough(C::INSTANCE, SpiMonitorPassthrough::Enabled); + scu.set_spim_miso_multi_func(C::INSTANCE, true); + scu.set_spim_filter(C::INSTANCE, true); + + // This board provides ext-mux-sel-gpios. Match the Zephyr driver by + // driving those GPIOs only; SCU0F0[15:12] is used only when no external + // mux GPIOs are described. + apply_spim_external_mux(C::INSTANCE, ScuExtMuxSelect::Mux1); + test_check!( + spim_external_mux_state(C::INSTANCE) == Some(ScuExtMuxSelect::Mux1), + "FAIL: external mux 1 GPIO readback" + ); + + test_check!( + scu.route_control_raw() & 0x0f == 0, + "FAIL: external monitor setup changed internal SPI routing" + ); + pw_log::info!("PASS: external monitor pinctrl, routing, and mux"); + Ok(()) +} + +pub fn build_policy() -> SpiMonitorPolicy { + let mut policy = SpiMonitorPolicy::empty(); + policy.allow_commands[..9] + .copy_from_slice(&[0x9f, 0x05, 0x06, 0x04, 0x02, 0x12, 0x20, 0x21, 0x0c]); + policy.allow_command_count = 9; + let _ = policy.add_region( + 0, + PROTECTED_LENGTH, + PrivilegeDirection::Write, + PrivilegeOp::Disable, + ); + policy +} + +pub fn initialize_monitor( + buffer: &'static mut [u32], +) -> Result { + initialize_monitor_with_policy::(buffer, &build_policy()) +} + +pub fn initialize_monitor_with_policy( + buffer: &'static mut [u32], + policy: &SpiMonitorPolicy, +) -> Result { + pw_log::info!("START: monitor reset, policy, and log RAM"); + let monitor = unsafe { SpiMonitor::::new(C::CONTROLLER) }; + monitor.software_reset(); + test_check!( + monitor.regs().read_ctrl() & (1 << 15) == 0, + "FAIL: software reset did not deassert" + ); + + let configured = monitor.apply_policy(policy)?; + test_check!( + configured.state() == SpiMonitorState::Configured, + "FAIL: monitor did not enter configured state" + ); + + configured.configure_log(buffer)?; + test_check!( + configured.regs().read_log_capacity_entries() as usize == LOG_RAM_WORDS, + "FAIL: 0x200-byte log RAM configuration" + ); + test_check!( + configured.regs().read_log_idx_reg() == 0, + "FAIL: violation log pointer was not reset" + ); + + configured.set_push_pull(true); + configured.set_passthrough(PassthroughMode::Disabled); + configured.enable(); + test_check!( + configured.regs().read_ctrl() & (1 << 2) != 0, + "FAIL: monitor filter is not enabled" + ); + pw_log::info!("PASS: monitor reset, policy, and log RAM"); + Ok(configured) +} + +#[allow(dead_code)] +pub fn dump_policy( + configured: &ConfiguredSpiMonitor, + write_protected_length: u32, +) -> Result<(), TestError> { + pw_log::info!("allow-command table:"); + for slot in 0..32 { + let value = configured.regs().read_allow_cmd_slot(slot); + if value != 0 { + pw_log::info!( + " slot {:02}: cmd=0x{:02x}, raw=0x{:08x}", + slot as u32, + (value & 0xff) as u32, + value as u32 + ); + } + } + + pw_log::info!( + "write-protected region: start=0x00000000, length=0x{:08x}", + write_protected_length as u32 + ); + Ok(()) +} + +#[allow(dead_code)] +pub fn validate_filtering(configured: &ConfiguredSpiMonitor) -> Result<(), TestError> { + test_check!( + configured.regs().read_ctrl() & 0x7 == 0x4, + "FAIL: SPIPF filtering mode readback" + ); + pw_log::info!("PASS: SPIPF filtering mode"); + Ok(()) +} + +#[allow(dead_code)] +pub fn validate_one_mib_write_protection( + configured: &ConfiguredSpiMonitor, +) -> Result<(), TestError> { + test_check!( + configured.privilege_word(PrivilegeDirection::Read, 0)? == u32::MAX + && configured.privilege_word(PrivilegeDirection::Read, 1)? == u32::MAX + && configured.privilege_word(PrivilegeDirection::Read, 2)? == u32::MAX, + "FAIL: read privilege table is not unrestricted" + ); + test_check!( + configured.privilege_word(PrivilegeDirection::Write, 0)? == 0 + && configured.privilege_word(PrivilegeDirection::Write, 1)? == 0, + "FAIL: first 1 MiB is not write protected" + ); + test_check!( + configured.privilege_word(PrivilegeDirection::Write, 2)? == u32::MAX, + "FAIL: writes at and above 0x00100000 are not enabled" + ); + pw_log::info!("PASS: reads allowed; writes below 0x00100000 blocked"); + pw_log::info!("PASS: writes at 0x00110000 allowed"); + Ok(()) +} + +#[allow(dead_code)] +pub fn lock_monitor( + configured: ConfiguredSpiMonitor, +) -> Result { + Ok(configured.lock()?) +} + +fn test_passthrough_control(configured: &ConfiguredSpiMonitor) -> Result<(), TestError> { + pw_log::info!("START: passthrough control readback"); + configured.set_passthrough(PassthroughMode::Enabled); + test_check!( + configured.regs().read_ctrl() & 0x3 == 0x1, + "FAIL: single-bit passthrough readback" + ); + configured.set_passthrough(PassthroughMode::MultiEnabled); + test_check!( + configured.regs().read_ctrl() & 0x3 == 0x2, + "FAIL: multi-bit passthrough readback" + ); + configured.set_passthrough(PassthroughMode::Disabled); + test_check!( + configured.regs().read_ctrl() & 0x3 == 0, + "FAIL: passthrough disable readback" + ); + pw_log::info!("PASS: passthrough control readback"); + Ok(()) +} + +fn test_command_policy(configured: &ConfiguredSpiMonitor) -> Result<(), TestError> { + pw_log::info!("START: command table add and remove"); + configured.remove_command(0x05)?; + let status_slot = configured.add_command(0x05, false)?; + let status_value = configured + .regs() + .read_allow_cmd_slot_checked(status_slot) + .ok_or(TestError::Check)?; + test_check!( + status_value & COMMAND_VALID_MASK != 0, + "FAIL: command add readback" + ); + configured.remove_command(0x05)?; + let status_value = configured + .regs() + .read_allow_cmd_slot_checked(status_slot) + .ok_or(TestError::Check)?; + test_check!(status_value == 0, "FAIL: command remove did not clear slot"); + configured.add_command(0x05, false)?; + pw_log::info!("PASS: command table add and remove"); + Ok(()) +} + +fn test_address_policy(configured: &ConfiguredSpiMonitor) -> Result<(), TestError> { + pw_log::info!("START: protected and unprotected address policy"); + test_check!( + configured.privilege_word(PrivilegeDirection::Write, 0)? == 0, + "FAIL: protected write region programming" + ); + test_check!( + configured.privilege_word(PrivilegeDirection::Write, 2)? == u32::MAX, + "FAIL: unprotected write region programming" + ); + pw_log::info!("PASS: protected and unprotected address policy"); + Ok(()) +} + +fn test_policy_locking(configured: ConfiguredSpiMonitor) -> Result<(), TestError> { + pw_log::info!("START: policy locking and readback"); + configured.lock_command(0x9f)?; + let locked = configured.lock()?; + test_check!( + locked.lock_state() == LockState::Locked, + "FAIL: monitor lock state" + ); + test_check!( + locked.regs().read_lock_status() & LOCK_REQUIRED == LOCK_REQUIRED, + "FAIL: lock register readback" + ); + let slot = locked.regs().read_allow_cmd_slot(2); + locked.regs().write_allow_cmd_slot(2, 0); + test_check!( + locked.regs().read_allow_cmd_slot(2) == slot && slot & COMMAND_LOCKED != 0, + "FAIL: command lock did not prevent modification" + ); + pw_log::info!("PASS: policy locking and readback"); + Ok(()) +} + +pub fn run() -> Result<(), TestError> { + pw_log::info!("=== AST10x0 external SPI monitor configuration test ==="); + + let scu = unsafe { ScuRegisters::new_global_unlocked() }; + configure_wiring::(&scu)?; + let configured = initialize_monitor::(log_buffer())?; + test_passthrough_control(&configured)?; + test_command_policy(&configured)?; + test_address_policy(&configured)?; + test_policy_locking(configured)?; + + pw_log::info!("External traffic blocking requires a BMC/host stimulus"); + pw_log::info!("=== all SPI monitor configuration tests passed ==="); + Ok(()) +} diff --git a/target/ast10x0/tests/spimonitor/test_spim1.rs b/target/ast10x0/tests/spimonitor/test_spim1.rs new file mode 100644 index 00000000..0aa6a20b --- /dev/null +++ b/target/ast10x0/tests/spimonitor/test_spim1.rs @@ -0,0 +1,40 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +#![no_std] +#![no_main] + +#[path = "test_common.rs"] +mod test_common; + +use ast10x0_peripherals::scu::SpiMonitorInstance; +use ast10x0_peripherals::spimonitor::SpiMonitorController; +use console_backend::console_backend_write_all; +use target_common::{declare_target, TargetInterface}; +use {console_backend as _, entry as _}; + +struct Spim1Config; + +impl test_common::TestConfig for Spim1Config { + const INSTANCE: SpiMonitorInstance = SpiMonitorInstance::Spim0; + const CONTROLLER: SpiMonitorController = SpiMonitorController::Spim0; +} + +struct Target; + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 External SPIM1 Configuration Test"; + + fn main() -> ! { + let sentinel = if test_common::run::().is_ok() { + b"TEST_RESULT:PASS\n" + } else { + b"TEST_RESULT:FAIL\n" + }; + let _ = console_backend_write_all(sentinel); + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/spimonitor/test_spim2.rs b/target/ast10x0/tests/spimonitor/test_spim2.rs new file mode 100644 index 00000000..cae247c6 --- /dev/null +++ b/target/ast10x0/tests/spimonitor/test_spim2.rs @@ -0,0 +1,40 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +#![no_std] +#![no_main] + +#[path = "test_common.rs"] +mod test_common; + +use ast10x0_peripherals::scu::SpiMonitorInstance; +use ast10x0_peripherals::spimonitor::SpiMonitorController; +use console_backend::console_backend_write_all; +use target_common::{declare_target, TargetInterface}; +use {console_backend as _, entry as _}; + +struct Spim2Config; + +impl test_common::TestConfig for Spim2Config { + const INSTANCE: SpiMonitorInstance = SpiMonitorInstance::Spim1; + const CONTROLLER: SpiMonitorController = SpiMonitorController::Spim1; +} + +struct Target; + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 External SPIM2 Configuration Test"; + + fn main() -> ! { + let sentinel = if test_common::run::().is_ok() { + b"TEST_RESULT:PASS\n" + } else { + b"TEST_RESULT:FAIL\n" + }; + let _ = console_backend_write_all(sentinel); + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/spimonitor/test_spim3.rs b/target/ast10x0/tests/spimonitor/test_spim3.rs new file mode 100644 index 00000000..e6ce1597 --- /dev/null +++ b/target/ast10x0/tests/spimonitor/test_spim3.rs @@ -0,0 +1,40 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +#![no_std] +#![no_main] + +#[path = "test_common.rs"] +mod test_common; + +use ast10x0_peripherals::scu::SpiMonitorInstance; +use ast10x0_peripherals::spimonitor::SpiMonitorController; +use console_backend::console_backend_write_all; +use target_common::{declare_target, TargetInterface}; +use {console_backend as _, entry as _}; + +struct Spim3Config; + +impl test_common::TestConfig for Spim3Config { + const INSTANCE: SpiMonitorInstance = SpiMonitorInstance::Spim2; + const CONTROLLER: SpiMonitorController = SpiMonitorController::Spim2; +} + +struct Target; + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 External SPIM3 Configuration Test"; + + fn main() -> ! { + let sentinel = if test_common::run::().is_ok() { + b"TEST_RESULT:PASS\n" + } else { + b"TEST_RESULT:FAIL\n" + }; + let _ = console_backend_write_all(sentinel); + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/spimonitor/test_spim4.rs b/target/ast10x0/tests/spimonitor/test_spim4.rs new file mode 100644 index 00000000..3d437157 --- /dev/null +++ b/target/ast10x0/tests/spimonitor/test_spim4.rs @@ -0,0 +1,40 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +#![no_std] +#![no_main] + +#[path = "test_common.rs"] +mod test_common; + +use ast10x0_peripherals::scu::SpiMonitorInstance; +use ast10x0_peripherals::spimonitor::SpiMonitorController; +use console_backend::console_backend_write_all; +use target_common::{declare_target, TargetInterface}; +use {console_backend as _, entry as _}; + +struct Spim4Config; + +impl test_common::TestConfig for Spim4Config { + const INSTANCE: SpiMonitorInstance = SpiMonitorInstance::Spim3; + const CONTROLLER: SpiMonitorController = SpiMonitorController::Spim3; +} + +struct Target; + +impl TargetInterface for Target { + const NAME: &'static str = "AST10x0 External SPIM4 Configuration Test"; + + fn main() -> ! { + let sentinel = if test_common::run::().is_ok() { + b"TEST_RESULT:PASS\n" + } else { + b"TEST_RESULT:FAIL\n" + }; + let _ = console_backend_write_all(sentinel); + #[expect(clippy::empty_loop)] + loop {} + } +} + +declare_target!(Target); diff --git a/target/ast10x0/tests/stress/mutex/kernel/system.json5 b/target/ast10x0/tests/stress/mutex/kernel/system.json5 index 56ff7088..4fcbf117 100644 --- a/target/ast10x0/tests/stress/mutex/kernel/system.json5 +++ b/target/ast10x0/tests/stress/mutex/kernel/system.json5 @@ -14,6 +14,6 @@ flash_start_address: 0x00000500, // After vector table flash_size_bytes: 262144, // 256KB for kernel code ram_start_address: 0x00040500, // RAM starts after code - ram_size_bytes: 393216, // 384KB for data + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) }, } diff --git a/target/ast10x0/tests/threads/kernel/system.json5 b/target/ast10x0/tests/threads/kernel/system.json5 index cc3ae8b9..333dd2a2 100644 --- a/target/ast10x0/tests/threads/kernel/system.json5 +++ b/target/ast10x0/tests/threads/kernel/system.json5 @@ -15,6 +15,6 @@ flash_start_address: 0x00000500, // After vector table flash_size_bytes: 262144, // 256KB for kernel code ram_start_address: 0x00040500, // RAM starts after code - ram_size_bytes: 393216, // 384KB for data + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) }, } diff --git a/target/ast10x0/tests/unittest_runner/system.json5 b/target/ast10x0/tests/unittest_runner/system.json5 index 737b396e..95673f87 100644 --- a/target/ast10x0/tests/unittest_runner/system.json5 +++ b/target/ast10x0/tests/unittest_runner/system.json5 @@ -15,6 +15,6 @@ flash_start_address: 0x00000500, // After vector table flash_size_bytes: 262144, // 256KB for kernel code ram_start_address: 0x00040500, // RAM starts after code - ram_size_bytes: 393216, // 384KB for data + ram_size_bytes: 391936, // ends at RAM_NC boundary (0x000A0000) }, } diff --git a/target/mock/BUILD.bazel b/target/mock/BUILD.bazel new file mode 100644 index 00000000..ddf861bd --- /dev/null +++ b/target/mock/BUILD.bazel @@ -0,0 +1,14 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@rules_rust//rust:defs.bzl", "rust_library") + +package(default_visibility = ["//visibility:public"]) + +rust_library( + name = "devices", + srcs = ["devices.rs"], + crate_name = "board_devices", + edition = "2024", + deps = ["//services/fwmanager/api:fwmanager_api"], +) diff --git a/target/mock/devices.rs b/target/mock/devices.rs new file mode 100644 index 00000000..ea5b7dfe --- /dev/null +++ b/target/mock/devices.rs @@ -0,0 +1,53 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Mock board: a device table exercising every device archetype the +//! orchestrator manages. Not a real board — consumed by host tests and QEMU +//! runs until a hardware target declares its own table. + +#![no_std] + +use core::time::Duration; + +use fwmanager_api::config::{BootCheckpoint, BootSignal, CommitPolicy, DeviceConfig}; + +/// Declaration order is the boot order: the orchestrator releases devices +/// top to bottom, one at a time. +/// +/// The mock board's reset controller and boot monitor both address +/// signals by plain index, so both id types are `u8`. +pub const MANAGED_DEVICES: &[DeviceConfig] = &[ + // Direct-flash SPI device (BMC archetype): the eRoT fronts its flash. + // Single checkpoint: it raises a boot-complete GPIO. + DeviceConfig { + name: "bmc", + reset_signal: 7, + checkpoints: &[BootCheckpoint { + name: "boot-complete", + signal: BootSignal::GpioBootComplete(12), + window: Duration::from_secs(90), + }], + commit_policy: CommitPolicy::Liveness, + }, + // PLDM device (NIC archetype): self-updating, SPDM-capable. Two + // checkpoints, exercising the multi-checkpoint path. + DeviceConfig { + name: "nic", + reset_signal: 3, + checkpoints: &[ + BootCheckpoint { + name: "mctp-ready", + signal: BootSignal::MctpReady, + window: Duration::from_secs(20), + }, + BootCheckpoint { + name: "heartbeat", + signal: BootSignal::Heartbeat, + window: Duration::from_secs(10), + }, + ], + commit_policy: CommitPolicy::LivenessAndAttestation, + }, +]; + +const _: () = fwmanager_api::config::validate(MANAGED_DEVICES); diff --git a/third_party/crates_io/Cargo.lock b/third_party/crates_io/Cargo.lock index 0707859c..3af825cf 100644 --- a/third_party/crates_io/Cargo.lock +++ b/third_party/crates_io/Cargo.lock @@ -271,6 +271,7 @@ checksum = "8ec610d8f49840a5b376c69663b6369e71f4b34484b9b2eb29fb918d92516cb9" dependencies = [ "bare-metal", "bitfield 0.13.2", + "critical-section", "embedded-hal 0.2.7", "volatile-register", ] @@ -1295,6 +1296,7 @@ dependencies = [ "cortex-m", "cortex-m-rt", "cortex-m-semihosting", + "critical-section", "ctr", "ecdsa", "embedded-hal 1.0.0", diff --git a/third_party/crates_io/Cargo.toml b/third_party/crates_io/Cargo.toml index a373d132..7833db31 100644 --- a/third_party/crates_io/Cargo.toml +++ b/third_party/crates_io/Cargo.toml @@ -39,9 +39,10 @@ vcell = "0.1.2" zerocopy = { version = "0.8.48", default-features = false, features = ["derive"] } zeroize = { version = "1.8", default-features = false, features = ["derive"] } -cortex-m = "0.7.7" +cortex-m = { version = "0.7.7", features = ["critical-section-single-core"] } cortex-m-rt = "0.7.5" cortex-m-semihosting = "0.5.0" +critical-section = "1.2" embedded-hal = "1.0" embedded-hal-async = "1.0" embedded-hal-nb = "1.0" diff --git a/util/io/BUILD.bazel b/util/io/BUILD.bazel new file mode 100644 index 00000000..9c680766 --- /dev/null +++ b/util/io/BUILD.bazel @@ -0,0 +1,23 @@ +# Licensed under the Apache-2.0 license +# SPDX-License-Identifier: Apache-2.0 + +load("@rules_rust//rust:defs.bzl", "rust_library", "rust_test") + +rust_library( + name = "io", + srcs = [ + "io.rs", + ], + crate_name = "util_io", + edition = "2024", + visibility = ["//visibility:public"], + deps = [ + "//util/error", + "@pigweed//pw_status/rust:pw_status", + ], +) + +rust_test( + name = "io_test", + crate = ":io", +) diff --git a/util/io/io.rs b/util/io/io.rs new file mode 100644 index 00000000..1b834b80 --- /dev/null +++ b/util/io/io.rs @@ -0,0 +1,78 @@ +// Licensed under the Apache-2.0 license +// SPDX-License-Identifier: Apache-2.0 + +//! Input/Output traits and utilities. + +#![no_std] + +use util_error::{ErrorCode, ErrorModule}; + +/// The generic IO error module. +pub const IO_GENERIC: ErrorModule = ErrorModule::new(0x494F); // ascii: IO +/// The read operation is out of bounds. +pub const IO_GENERIC_READ_OUT_OF_BOUNDS: ErrorCode = + IO_GENERIC.from_pw(1, pw_status::Error::OutOfRange); + +/// Trait for random access read operations. +pub trait RandomRead { + type Error; + /// Reads data from the source into the destination buffer. + /// + /// # Arguments + /// * `start_addr`: The offset from which to start reading. + /// * `dst`: The buffer to read data into. + fn read(&mut self, start_addr: usize, dst: &mut [u8]) -> Result<(), Self::Error>; + + /// Returns the total size of the readable data in bytes. + fn size(&mut self) -> Result; +} + +impl RandomRead for &[u8] { + type Error = ErrorCode; + fn read(&mut self, start_addr: usize, dst: &mut [u8]) -> Result<(), Self::Error> { + // Explicit wrapping add. Overflows are expected to + // be detected in the indexing operation + let end_addr = start_addr.wrapping_add(dst.len()); + let src = self + .get(start_addr..end_addr) + .ok_or(IO_GENERIC_READ_OUT_OF_BOUNDS)?; + dst.copy_from_slice(src); + Ok(()) + } + fn size(&mut self) -> Result { + Ok(self.len()) + } +} + +#[cfg(test)] +mod test { + use super::*; + + #[test] + fn should_read() { + let mut src: &[u8] = &[1, 2, 3, 4, 5, 6, 7, 8, 9]; + let mut dst: [u8; 3] = [0; 3]; + assert!(src.read(6, &mut dst).is_ok()); + assert_eq!(&dst, &[7, 8, 9]); + assert_eq!(RandomRead::size(&mut src).unwrap(), 9); + } + + #[test] + fn should_fail() { + let mut src: &[u8] = &[1, 2, 3, 4, 5, 6, 7, 8, 9]; + let mut dst: [u8; 3] = [0; 3]; + assert!(src.read(7, &mut dst).is_err()); + } + + #[test] + fn invalid_start_address_should_not_panic() { + let mut src: &[u8] = &[1, 2, 3, 4, 5, 6, 7, 8]; + let mut dst: [u8; 4] = [0; 4]; + // Set `start_addr` so that adding `dst.len()` causes it to + // wrap around and become smaller than `src.len()` + let start_addr: usize = usize::MAX - (dst.len() - 1); + // Should not panic + let result = src.read(start_addr, &mut dst); + assert!(result.is_err()); + } +}