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eGPU (Thunderbolt): transient PCIe Completion Timeout is fatal; nv_pci_driver registers no pci_error_handlers #1229

Description

@arc-uri-el

Summary

On an external GPU (eGPU) over Thunderbolt, a transient PCIe Completion Timeout on the eGPU link is unrecoverable, because nv_pci_driver registers no pci_error_handlers. The kernel prints "can't recover (no error_detected callback)", the GPU state corrupts, and the next GPU access faults (Xid 31 MMU fault), freezing the desktop (reboot-only recovery).

Environment

  • RTX 5090 (GB202) via a Thunderbolt eGPU enclosure (Razer Core X V2), driver 610.43.02, Linux 7.0.13.
  • The GPU drives a Wayland (KDE Plasma) desktop.

The failure

When the GPU downclocks at idle (dynamic P-states), the PCIe/Thunderbolt link renegotiates speed (Gen4 <-> Gen1). A transaction during that transition hits a Completion Timeout:

pcieport 0000:00:01.2: AER: Uncorrectable (Non-Fatal) error received from 0000:63:00.0
snd_hda_intel 0000:63:00.1: PCIe Bus Error: Uncorrectable (Non-Fatal), type=Transaction Layer
  [14] CmpltTO (Completion Timeout, First)   [18] MalfTLP
  TLP Header: 0xffffffff 0xffffffff 0xffffffff 0xffffffff   (device unresponsive)
nvidia 0000:63:00.0: AER: can't recover (no error_detected callback)
pcieport 0000:62:00.0: AER: device recovery failed
NVRM: Xid (PCI:0000:63:00): 31, name=plasmashell, MMU Fault: ENGINE GR_HOST0 HUBCLIENT_ESC0 ... FAULT_PDE

Because there is no AER recovery, a transient link error becomes fatal: the GPU drops out from under the compositor and the desktop freezes.

Root cause

nv_pci_driver (kernel-open/nvidia/nv-pci.c) defines .probe, .remove, .shutdown, but no .err_handler. With no pci_error_handlers, the PCIe AER core has no error_detected/slot_reset callback to drive recovery, so any uncorrectable error on the device is reported as unrecoverable.

Suggested fix

Register a struct pci_error_handlers on nv_pci_driver implementing at least error_detected (quiesce the device, request PCI_ERS_RESULT_NEED_RESET), slot_reset (re-initialize after the secondary-bus reset), and resume. eGPU links are inherently more prone to transient errors (hotplug, power/link-speed transitions) than fixed PCIe slots, so a recovery path would turn these unrecoverable freezes into recoverable blips.

Note

This is distinct from the RTD3 GC6 idle crash on eGPUs (PR #1228, the GSP attempting a host-coordinated power-down). This issue is the separate PCIe-error-recovery gap. Both are exposed once the eGPU is allowed to idle/downclock with dynamic P-states.

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